From: "Sunil V L" <sunilvl@ventanamicro.com>
To: devel@edk2.groups.io, andrei.warkentin@intel.com
Cc: Daniel Schaefer <git@danielschaefer.me>
Subject: Re: [edk2-devel] [edk2 3/3] OvmfPkg: RiscVVirt: Add missing SerialPortInitialize to Sec
Date: Fri, 10 Mar 2023 11:56:55 +0530 [thread overview]
Message-ID: <ZArNr0RiB9GaenY1@sunil-laptop> (raw)
In-Reply-To: <20230303180410.6344-4-andrei.warkentin@intel.com>
On Fri, Mar 03, 2023 at 12:04:10PM -0600, Andrei Warkentin wrote:
> If the SerialPortLib had any initialization needed, this
> would be skipped in the RiscVVirt Sec. Follow the example
> seen elsewhere (ArmVirtPkg PrePi).
>
> Seen with BaseSerialPortLibRiscVSbi not using DBCN in Sec, yet
> using DBCN elsewhere.
>
> Cc: Daniel Schaefer <git@danielschaefer.me>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
> ---
> OvmfPkg/RiscVVirt/Sec/SecMain.inf | 1 +
> OvmfPkg/RiscVVirt/Sec/SecMain.h | 1 +
> OvmfPkg/RiscVVirt/Sec/SecMain.c | 4 +++-
> 3 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.inf b/OvmfPkg/RiscVVirt/Sec/SecMain.inf
> index aed35d3af596..0e2a5785e8a4 100644
> --- a/OvmfPkg/RiscVVirt/Sec/SecMain.inf
> +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.inf
> @@ -48,6 +48,7 @@ [LibraryClasses]
> FdtLib
> MemoryAllocationLib
> HobLib
> + SerialPortLib
>
> [Ppis]
> gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED
> diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.h b/OvmfPkg/RiscVVirt/Sec/SecMain.h
> index 83a8058efe40..7c7650f0d298 100644
> --- a/OvmfPkg/RiscVVirt/Sec/SecMain.h
> +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.h
> @@ -29,6 +29,7 @@
> #include <Library/PrePiLib.h>
> #include <Library/PlatformInitLib.h>
> #include <Library/PrePiHobListPointerLib.h>
> +#include <Library/SerialPortLib.h>
> #include <Register/RiscV64/RiscVImpl.h>
>
> /**
> diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.c b/OvmfPkg/RiscVVirt/Sec/SecMain.c
> index adf73f2eb66c..db309ebdf1a3 100644
> --- a/OvmfPkg/RiscVVirt/Sec/SecMain.c
> +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.c
> @@ -1,7 +1,7 @@
> /** @file
> RISC-V SEC phase module for Qemu Virt.
>
> - Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
Should be 2008 - 2023
Otherwise, LGTM.
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
prev parent reply other threads:[~2023-03-10 6:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-03 18:04 [edk2 0/3] v3 RISC-V SBI-backed SerialLib Andrei Warkentin
2023-03-03 18:04 ` [edk2 1/3] MdePkg: BaseRiscVSbiLib: make more useful to consumers Andrei Warkentin
2023-03-10 6:23 ` Sunil V L
2023-03-03 18:04 ` [edk2 2/3] [PATCH v3] MdePkg: add SBI-based SeriaPortLib for RISC-V Andrei Warkentin
2023-03-10 7:19 ` Sunil V L
2023-03-03 18:04 ` [edk2 3/3] OvmfPkg: RiscVVirt: Add missing SerialPortInitialize to Sec Andrei Warkentin
2023-03-10 6:26 ` Sunil V L [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZArNr0RiB9GaenY1@sunil-laptop \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox