From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by mx.groups.io with SMTP id smtpd.web10.5019.1681988070300957791 for ; Thu, 20 Apr 2023 03:54:30 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=RYjsryl6; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: quicinc.com, ip: 205.220.180.131, mailfrom: quic_llindhol@quicinc.com) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33KApHVh006084; Thu, 20 Apr 2023 10:54:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=date : from : to : cc : subject : message-id : references : mime-version : content-type : in-reply-to; s=qcppdkim1; bh=RCAuHa3rMju2zGHI4ifECE7v0kkxiN6CCRRUhpvNBr4=; b=RYjsryl6Uz3+7x5qLEqqoUJBtBh6rhIVjtHePF7GRod9Ms2+3qYh+5+AgySlUZwiIIew hqSFQjrRSXtmIAtrSUy6wkomb/fQ9OkSkri3sq6dgQQ0vtAUBFJfFy7xWpidW66V0JrX +LjMEqYxD9wp/kUwVVYVEqRkUnnXv6DQNPcfKVuUBRhnQzXAEeSDfY4xQhOTjgqUqtRm xh9Ri3bUTbcCGzDy958y3x1rCQAJzHnGnowxgxFN1rzz36uJYFSQv8p/TvXCe6O9FaIv OWZZe/86zNa7Bcd7G+whpCEJkywNKh11Nyqh1hPQJhphzLuMkgRrocWVA4XM9w1fspF1 ew== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q2hd9jnca-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Apr 2023 10:54:27 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33KAsQuh022948 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Apr 2023 10:54:26 GMT Received: from qc-i7.hemma.eciton.net (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 20 Apr 2023 03:54:24 -0700 Date: Thu, 20 Apr 2023 11:54:21 +0100 From: "Leif Lindholm" To: Marcin Juszkiewicz CC: , Ard Biesheuvel , Rebecca Cran , Pedro Falcato Subject: Re: [PATCH v5 1/2] ArmLib: add functions to read system registers Message-ID: References: <1753ABF1A296B040.11304@groups.io> <20230407152957.157494-1-marcin.juszkiewicz@linaro.org> <20230407152957.157494-2-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 In-Reply-To: <20230407152957.157494-2-marcin.juszkiewicz@linaro.org> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: orANQMaO3iL3VjjDK9E_HkdSwdkgvGTS X-Proofpoint-ORIG-GUID: orANQMaO3iL3VjjDK9E_HkdSwdkgvGTS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-20_06,2023-04-20_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 impostorscore=0 adultscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=714 phishscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304200087 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline On Fri, Apr 07, 2023 at 17:29:56 +0200, Marcin Juszkiewicz wrote: > ArmCpuInfo uses those to read system registers and other parts of EDK2 > may find them useful. This is excellent, thanks! Sorry for nitpicking, but could you please sort the function declarations and definitions alphabetically? / Leif > Signed-off-by: Marcin Juszkiewicz > --- > ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 48 +++++++++++++++++++ > .../Library/ArmLib/AArch64/AArch64Support.S | 32 +++++++++++++ > 2 files changed, 80 insertions(+) > > diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h > index 330481fc50db..d9744a66cdcf 100644 > --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h > +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h > @@ -44,6 +44,54 @@ ArmReadIdAA64Pfr0 ( > VOID > ); > > +UINTN > +EFIAPI > +ArmReadIdAA64Pfr1 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Dfr0 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Dfr1 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Isar0 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Isar1 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Isar2 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Mmfr0 ( > + VOID > + ); > + > +UINTN > +EFIAPI > +ArmReadIdAA64Mmfr1 ( > + VOID > + ); > + > /** Reads the ID_AA64MMFR2_EL1 register. > > @return The contents of the ID_AA64MMFR2_EL1 register. > diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > index d3cc1e86716b..3e8d461bc819 100644 > --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > @@ -482,4 +482,36 @@ ASM_FUNC(ArmWriteCntHctl) > msr cnthctl_el2, x0 > ret > > +ASM_FUNC(ArmReadIdAA64Pfr1) > + mrs x0, ID_AA64PFR1_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Dfr0) > + mrs x0, ID_AA64DFR0_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Dfr1) > + mrs x0, ID_AA64DFR1_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Isar0) > + mrs x0, ID_AA64ISAR0_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Isar1) > + mrs x0, ID_AA64ISAR1_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Isar2) > + mrs x0, ID_AA64ISAR2_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Mmfr0) > + mrs x0, ID_AA64MMFR0_EL1 > + ret > + > +ASM_FUNC(ArmReadIdAA64Mmfr1) > + mrs x0, ID_AA64MMFR1_EL1 > + ret > + > ASM_FUNCTION_REMOVE_IF_UNREFERENCED > -- > 2.40.0 >