From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f174.google.com (mail-pf1-f174.google.com [209.85.210.174]) by mx.groups.io with SMTP id smtpd.web11.1105.1685725782533600563 for ; Fri, 02 Jun 2023 10:09:42 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=D84TPZsE; spf=pass (domain: ventanamicro.com, ip: 209.85.210.174, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pf1-f174.google.com with SMTP id d2e1a72fcca58-651e298be3fso1823136b3a.2 for ; Fri, 02 Jun 2023 10:09:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1685725782; x=1688317782; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=7zhZvFIK0zuTFQWMlR2qMcmBfCUvVaE0bRrEdP1SE6A=; b=D84TPZsEC3OEJZdnkj3qwOrISFPr+XFOXwwil0Cw2euNdXym2WYzgXxB75oMbZ6V/H Rrd//u/y+iBE2DuLOti/JRSPMl19uUufWLTTTsSuC/Kjee5uhBdBsOm6BiIZOZ7d8WXq S5leymX5nk7sW9gvemuOSGiToKpxdWdiLza2QfRaRq+tqo71hNyOCiOYGN5p6SdzOQSM gZjwTH/kj8K5nDD8DCYgjPO3CQBKCeJ55/BRUZIirGiMV3wgFeU+e7U6UzJ4VVOci78G yiCHmi6DCeQmlTuz4B0qmreyj6AVPDrfMXsgVJMJJyRsCbUIY8nybUUws1YrRejdfed2 phgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685725782; x=1688317782; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=7zhZvFIK0zuTFQWMlR2qMcmBfCUvVaE0bRrEdP1SE6A=; b=Dnl2nO09eRuq+PE6uKR9XSi8wjV3p9f7A2opznN+mXYeygxWVy8nU0bq81uxhZZuYq OAh93bxHNwCG7Vh7RZjUGAR4NjVAQXjyB/cXkeCYsqvx9QT0W+RQmVLQsVsphaTCiu7e n8F5AG+T+p8Wq6WGsHhPKlX572ynCIvy25clR477yYLhWBdwxb5vUndsc11q+fI6zSdV 8SgHWA1pOkjuZvzPWyGOkaFX4riTOPAxSOwpRhFHHT6AD1h3mCTjAwvt0uKNpOX59vRG zF/URGDKENjbeVbTpD9r87ULXiiM6qauJgWkaqJ1TSR3X3bLmDvjjCMHAfxJhVsvZ7bZ 4tRA== X-Gm-Message-State: AC+VfDztlVbgMkX/FDjdfpW74vtmr8zz8K8+d9tW6Crytk9h6YT3rRsS vdib6vSlG/H0IDExsqtBdQcOWMbVAqzJlmoL1n0= X-Google-Smtp-Source: ACHHUZ5xen1C5gL3whoMaRKEoF8K4CKbT0EU0+Plg5suc1XTlqbsQqx7D9/DKYgJENqTMvYZq9xn0Q== X-Received: by 2002:a17:90a:5e09:b0:256:d262:e686 with SMTP id w9-20020a17090a5e0900b00256d262e686mr553477pjf.19.1685725782074; Fri, 02 Jun 2023 10:09:42 -0700 (PDT) Return-Path: Received: from sunil-laptop ([106.51.186.3]) by smtp.gmail.com with ESMTPSA id l12-20020a17090aec0c00b0025671de4606sm3420017pjy.4.2023.06.02.10.09.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Jun 2023 10:09:41 -0700 (PDT) Date: Fri, 2 Jun 2023 22:39:36 +0530 From: "Sunil V L" To: Yong Li Cc: devel@edk2.groups.io, Andrei Warkentin , Evan Chai , Tuan Phan Subject: Re: [PATCH v2 1/1] MdePkg/BaseLib: Add SpeculationBarrier implementation for RiscV64 Message-ID: References: <5105ea68520e82932c4253e087438db53546ea6d.1685616822.git.yong.li@intel.com> MIME-Version: 1.0 In-Reply-To: <5105ea68520e82932c4253e087438db53546ea6d.1685616822.git.yong.li@intel.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Jun 01, 2023 at 06:56:05PM +0800, Yong Li wrote: > Implement the SpeculationBarrier with implementations consisting of > fence instruction which provides finer-grain memory orderings. > Perform Data Barrier in RiscV: fence rw,rw > Perform Instruction Barrier in RiscV: fence.i; fence r,r > More detail is in Appendix A: RVWMO Explanatory Material in > https://github.com/riscv/riscv-isa-manual > > This API is first introduced in the below commits for IA32 and x64 > https://github.com/tianocore/edk2/commit/d9f1cac51bd354507e880e614d11a1dc160d38a3 > https://github.com/tianocore/edk2/commit/e83d841fdc2878959185c4c6cc38a7a1e88377a4 > and below the commit for ARM and AArch64 implementation > https://github.com/tianocore/edk2/commit/c0959b4426b2da45cdb8146a5116bb4fd9b86534 > > This commit is to add the RiscV64 implementation which will be used by > variable service under Variable/RuntimeDxe > > Cc: Andrei Warkentin > Cc: Evan Chai > Cc: Sunil V L > Cc: Tuan Phan > Signed-off-by: Yong Li > --- Reviewed-by: Sunil V L Thanks, Sunil