From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 9C05BAC19C3 for ; Mon, 21 Aug 2023 18:27:28 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=iQZmTC/TKx5A67Tou8Zo4YcAGTOI5meQToZsylJSxXg=; c=relaxed/simple; d=groups.io; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Disposition; s=20140610; t=1692642447; v=1; b=AwdYniL76XW6CMXyKZVq9FXLE5JKG2ZbkwmOeKW9s/qIus6PB22E8rJALlmc/SqpTugdHhSv zDeB+cFwO2cTmZvwNbnIhwuB2oUUgLrLhyom1EpzGndiOrnsABRNhz9vuwNUiKmQDsf1BKGsGyL bLN7wMHs7E7pos3UEbC/oFSk= X-Received: by 127.0.0.2 with SMTP id QdgpYY7687511xOK3ZHeNlLZ; Mon, 21 Aug 2023 11:27:27 -0700 X-Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by mx.groups.io with SMTP id smtpd.web10.772.1692642446910725627 for ; Mon, 21 Aug 2023 11:27:26 -0700 X-Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37LI4aZr015236; Mon, 21 Aug 2023 18:27:26 GMT X-Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3sm6f9s42a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 21 Aug 2023 18:27:26 +0000 X-Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37LIRP2W020108 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 21 Aug 2023 18:27:25 GMT X-Received: from qc-i7.hemma.eciton.net (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Mon, 21 Aug 2023 11:27:24 -0700 Date: Mon, 21 Aug 2023 19:27:21 +0100 From: "Leif Lindholm" To: Marcin Juszkiewicz CC: , Ard Biesheuvel , Graeme Gregory Subject: Re: [edk2-devel] [PATCH edk2-platforms v4 3/3] Platform/SbsaQemu: handle systems without GIC ITS Message-ID: References: <20230821150757.128280-1-marcin.juszkiewicz@linaro.org> <20230821150757.128280-4-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 In-Reply-To: <20230821150757.128280-4-marcin.juszkiewicz@linaro.org> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-GUID: OGEb9mUwoAud7znO-q0-8oS0xqX_3Ikf X-Proofpoint-ORIG-GUID: OGEb9mUwoAud7znO-q0-8oS0xqX_3Ikf Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,quic_llindhol@quicinc.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: fhsgJMwFhlzQTvGpWex6C7bwx7686176AA= Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=AwdYniL7; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=quicinc.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On Mon, Aug 21, 2023 at 17:07:57 +0200, Marcin Juszkiewicz wrote: > If firmware is used with QEMU 8.0 or older then there will be no GIC ITS > support. > > In such case we would not add information about it into MCFG and there > will be no IORT table. > > Signed-off-by: Marcin Juszkiewicz > --- > .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 - > .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 1 + > .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 218 +++++++++++++++++- > Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc | 135 ----------- Hmm, wait. Patch 1/3 adds Iort.aslc and patch 3/3 deletes it. I know 1/3 is Shashi's original implementation and 3/3 is heavily based on that (if rewritten), but there's no point in merging the churn. What does this set look like as a single squashed patch? (I think doing that would also address all previous comments I made.) > 4 files changed, 208 insertions(+), 147 deletions(-) > delete mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc > > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > index 554c5e4b6f9e..97021f7971c7 100644 > --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf > @@ -22,7 +22,6 @@ [Sources] > Gtdt.aslc > Mcfg.aslc > Spcr.aslc > - Iort.aslc > > [Packages] > ArmPlatformPkg/ArmPlatformPkg.dec > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > index 3ec7ffd8dd5c..14d760b36400 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf > @@ -49,6 +49,7 @@ [Pcd] > gArmTokenSpaceGuid.PcdGicDistributorBase > gArmTokenSpaceGuid.PcdGicRedistributorsBase > gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase > + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase > > [Depex] > gEfiAcpiTableProtocolGuid ## CONSUMES > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > index 961482269678..bd3ba75f52fa 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > @@ -8,6 +8,7 @@ > **/ > #include > #include > +#include > #include > #include > #include > @@ -21,6 +22,36 @@ > #include > #include > > +#pragma pack(1) > + > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node; > + UINT32 Identifiers; > +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; > + > +typedef struct > +{ > + EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; > + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap; > +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; > + > +typedef struct > +{ > + EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; > + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap; > +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; > + > +typedef struct { > + EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; > + SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode; > + SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; > + SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; > +} SBSA_IO_REMAPPING_STRUCTURE; > + > +static UINTN GicItsBase; > + > +#pragma pack () > + > /* > * A Function to Compute the ACPI Table Checksum > */ > @@ -40,6 +71,159 @@ AcpiPlatformChecksum ( > Buffer[ChecksumOffset] = CalculateCheckSum8(Buffer, Size); > } > > +/* > + * A function that add the IORT ACPI table. > + IN EFI_ACPI_COMMON_HEADER *CurrentTable > + */ > +EFI_STATUS > +AddIortTable ( > + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable > + ) > +{ > + EFI_STATUS Status; > + UINTN TableHandle; > + UINT32 TableSize; > + EFI_PHYSICAL_ADDRESS PageAddress; > + UINT8 *New; > + > + // Initialize IORT ACPI Header > + EFI_ACPI_6_0_IO_REMAPPING_TABLE Header = { > + SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, > + SBSA_IO_REMAPPING_STRUCTURE, > + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00), > + 3, > + sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset > + 0 }; > + > + // Initialize SMMU3 Structure > + SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE Smmu3 = { > + { > + { > + EFI_ACPI_IORT_TYPE_SMMUv3, > + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE), > + 2, // Revision > + 0, // Reserved > + 1, // NumIdMapping > + OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap) // IdReference > + }, > + PcdGet64 (PcdSmmuBase), // Base address > + EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags > + 0, // Reserved > + 0, // VATOS address > + EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model > + 74, // Event > + 75, // Pri > + 77, // Gerror > + 76, // Sync > + 0, // Proximity domain > + 1 // DevIDMappingIndex > + }, > + { > + 0x0000, // InputBase > + 0xffff, // NumIds > + 0x0000, // OutputBase > + OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReference > + 0 // Flags > + } > + }; > + > +//NOTE(hrw): update to IORT E.e? > + SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE Rc = { > + { > + { > + EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type > + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length > + 0, // Revision > + 0, // Reserved > + 1, // NumIdMappings > + OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // IdReference > + }, > + 1, // CacheCoherent > + 0, // AllocationHints > + 0, // Reserved > + 0, // MemoryAccessFlags > + EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute > + 0x0, // PciSegmentNumber > + //0, //MemoryAddressSizeLimit > + }, > + { > + 0x0000, // InputBase > + 0xffff, // NumIds > + 0x0000, // OutputBase > + OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReference > + 0, // Flags > + } > + }; > + > + SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Its = { > + // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE > + { > + // EFI_ACPI_6_0_IO_REMAPPING_NODE > + { > + EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type > + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length > + 0, // Revision > + 0, // Identifier > + 0, // NumIdMappings > + 0, // IdReference > + }, > + 1, // ITS count > + }, > + 0, // GIC ITS Identifiers > + }; > + > + // Calculate the new table size based on the number of cores > + TableSize = sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE) + > + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE) + > + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE) + > + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE); > + > + Status = gBS->AllocatePages ( > + AllocateAnyPages, > + EfiACPIReclaimMemory, > + EFI_SIZE_TO_PAGES (TableSize), > + &PageAddress > + ); > + if (EFI_ERROR(Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to allocate pages for IORT table\n")); > + return EFI_OUT_OF_RESOURCES; > + } > + > + New = (UINT8 *)(UINTN) PageAddress; > + ZeroMem (New, TableSize); > + > + // Add the ACPI Description table header > + CopyMem (New, &Header, sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE)); > + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; > + New += sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE); > + > + // ITS Node > + CopyMem (New, &Its, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE)); > + New += sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE); > + > + // SMMUv3 Node > + CopyMem (New, &Smmu3, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE)); > + New += sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE); > + > + // RC Node > + CopyMem (New, &Rc, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE)); > + New += sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE); > + > + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); > + > + Status = AcpiTable->InstallAcpiTable ( > + AcpiTable, > + (EFI_ACPI_COMMON_HEADER *)PageAddress, > + TableSize, > + &TableHandle > + ); > + if (EFI_ERROR(Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to install IORT table\n")); > + } > + > + return Status; > +} > + > /* > * A function that add the MADT ACPI table. > IN EFI_ACPI_COMMON_HEADER *CurrentTable > @@ -91,11 +275,6 @@ AddMadtTable ( > // Initialize GIC Redistributor Structure > EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT(); > > - // Initialize GIC ITS Structure > - EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its = SBSAQEMU_MADT_GIC_ITS_INIT(0); > - > - DEBUG ((DEBUG_ERROR, "itsBaseAddr is 0x%4x\n", PcdGet64 (PcdGicItsBase))); > - > // Get CoreCount which was determined eariler after parsing device tree > NumCores = PcdGet32 (PcdCoreCount); > > @@ -103,8 +282,14 @@ AddMadtTable ( > TableSize = sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER) + > (sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) + > sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) + > - sizeof (EFI_ACPI_6_0_GICR_STRUCTURE) + > - sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); > + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); > + > + // Initialize GIC ITS Structure > + EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its = SBSAQEMU_MADT_GIC_ITS_INIT(0); > + > + if (GicItsBase > 0) { > + TableSize += sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); > + } > > Status = gBS->AllocatePages ( > AllocateAnyPages, > @@ -144,9 +329,11 @@ AddMadtTable ( > CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE)); > New += sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); > > - // GIC ITS Structure > - CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE)); > - New += sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); > + if (GicItsBase > 0) { > + // GIC ITS Structure > + CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE)); > + New += sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); > + } > > AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); > > @@ -317,7 +504,7 @@ AddSsdtTable ( > } > > /* > - * A function that adds the SSDT ACPI table. This is a fix, but unrelated to patch context. Please put in separate patch. / Leif > + * A function that adds the PPTT ACPI table. > */ > EFI_STATUS > AddPpttTable ( > @@ -448,6 +635,15 @@ InitializeSbsaQemuAcpiDxe ( > return Status; > } > > + GicItsBase = PcdGet64 (PcdGicItsBase); > + > + if (GicItsBase > 0) { > + Status = AddIortTable (AcpiTable); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to add IORT table\n")); > + } > + } > + > Status = AddMadtTable (AcpiTable); > if (EFI_ERROR(Status)) { > DEBUG ((DEBUG_ERROR, "Failed to add MADT table\n")); > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc > deleted file mode 100644 > index ec4ce504efd1..000000000000 > --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc > +++ /dev/null > @@ -1,135 +0,0 @@ > -/** @file > - > - Copyright (c) 2023, Linaro Ltd. All rights reserved.
> - > - SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > -#include > -#include > -#include > - > -#pragma pack(1) > - > -typedef struct { > - EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node; > - UINT32 Identifiers; > -} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; > - > -typedef struct > -{ > - EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; > - EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap; > -} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; > - > -typedef struct > -{ > - EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; > - EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap; > -} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; > - > -typedef struct { > - EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; > - SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode; > - SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; > - SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; > -} SBSA_IO_REMAPPING_STRUCTURE; > - > -#pragma pack () > - > -STATIC SBSA_IO_REMAPPING_STRUCTURE Iort = { > - { > - SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, > - SBSA_IO_REMAPPING_STRUCTURE, > - EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00), > - 3, // NumNodes > - sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset > - 0 // Reserved > - }, > - // SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE > - { > - // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE > - { > - // EFI_ACPI_6_0_IO_REMAPPING_NODE > - { > - EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type > - sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length > - 0, // Revision > - 0, // Reserved > - 0, // NumIdMappings > - 0, // IdReference > - }, > - 1, // ITS count > - }, > - 0, // GIC ITS Identifiers > - }, > - // SMMU > - { > - // EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE > - { > - // EFI_ACPI_6_0_IO_REMAPPING_NODE > - { > - EFI_ACPI_IORT_TYPE_SMMUv3, // Type > - sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE), // Length > - 2, // Revision > - 0, // Reserved > - 1, // NumIdMapping > - OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap), // IdReference > - }, > - 0x60050000, // Base address > - EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags > - 0, // Reserved > - 0, // VATOS address > - EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model > - 74, // Event > - 75, // Pri > - 77, // Gerror > - 76, // Sync > - 0, // Proximity domain > - 1, // DevIDMappingIndex > - }, > - // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE > - { > - 0x0000, // InputBase > - 0xffff, // NumIds > - 0x0000, // OutputBase > - OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReference > - 0, // Flags > - }, > - }, > - // SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE > - { > - // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE > - { > - // EFI_ACPI_6_0_IO_REMAPPING_NODE > - { > - EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type > - sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length > - 0, // Revision > - 0, // Reserved > - 1, // NumIdMappings > - OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // IdReference > - }, > - 1, // CacheCoherent > - 0, // AllocationHints > - 0, // Reserved > - 0, // MemoryAccessFlags > - EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute > - 0x0, // PciSegmentNumber > - //0, //MemoryAddressSizeLimit > - }, > - // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE > - { > - 0x0000, // InputBase > - 0xffff, // NumIds > - 0x0000, // OutputBase > - OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReference > - 0, // Flags > - } > - } > -}; > - > -#pragma pack() > - > -VOID* CONST ReferenceAcpiTable = &Iort; > \ No newline at end of file > -- > 2.41.0 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107933): https://edk2.groups.io/g/devel/message/107933 Mute This Topic: https://groups.io/mt/100874755/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/1913456212/xyzzy [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-