Re: [edk2-devel] [PATCH v3 5/8] Sophgo/SG2042Pkg: Add SEC module.

["Sunil V L" <sunilvl@ventanamicro.com>]

On Thu, Sep 07, 2023 at 06:25:48PM +0800, caiyuqing_hz@163.com wrote:
> From: caiyuqing379 <202235273@mail.sdu.edu.cn>
> 
> This module supports Sophgo SG2042 EVB platform. It uses the
> PEI less design. Add this module in SG2042Pkg leveraging the
> one from OvmfPkg/RiscVVirt.
> 
> Signed-off-by: caiyuqing379 <202235273@mail.sdu.edu.cn>
> Co-authored-by: USER0FISH <libing1202@outlook.com>
> Cc: dahogn <dahogn@hotmail.com>
> Cc: meng-cz <mengcz1126@gmail.com>
> Cc: yli147 <yong.li@intel.com>
> Cc: ChaiEvan <evan.chai@intel.com>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> ---
>  Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf |  68 +++++
>  Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h   | 104 +++++++
>  Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c       |  29 ++
>  Silicon/Sophgo/SG2042Pkg/Sec/Memory.c    | 347 +++++++++++++++++++++++
>  Silicon/Sophgo/SG2042Pkg/Sec/Platform.c  | 130 +++++++++
>  Silicon/Sophgo/SG2042Pkg/Sec/SecMain.c   | 115 ++++++++
>  Silicon/Sophgo/SG2042Pkg/Sec/SecEntry.S  |  18 ++
>  7 files changed, 811 insertions(+)
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Platform.c
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.c
>  create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecEntry.S
> 
> diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf b/Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf
> new file mode 100644
> index 000000000000..3b4d6d6b86bc
> --- /dev/null
> +++ b/Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf
> @@ -0,0 +1,68 @@
> +## @file
> +#  SEC Driver for RISC-V
> +#
> +#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
> +#  Copyright (c) 2023, Academy of Intelligent Innovation, Shandong Universiy, China.P.R. All rights reserved.<BR>
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001B
> +  BASE_NAME                      = SecMainRiscV64
> +  FILE_GUID                      = 125E1236-9D4F-457B-BF7E-6311C88A1621
> +  MODULE_TYPE                    = SEC
> +  VERSION_STRING                 = 1.0
> +  ENTRY_POINT                    = SecMain
> +
> +#
> +# The following information is for reference only and not required by the build tools.
> +#
> +#  VALID_ARCHITECTURES           = RISCV64
> +#
> +
> +[Sources]
> +  SecEntry.S
> +  SecMain.c
> +  SecMain.h
> +  Cpu.c
> +  Memory.c
> +  Platform.c
> +
> +[Packages]
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  MdePkg/MdePkg.dec
> +  UefiCpuPkg/UefiCpuPkg.dec
> +  Silicon/Sophgo/SG2042Pkg/SG2042Pkg.dec
> +  Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  DebugLib
> +  PcdLib
> +  IoLib
> +  PeCoffLib
> +  LzmaDecompressLib
> +  RiscVSbiLib
> +  PrePiLib
> +  FdtLib
> +  MemoryAllocationLib
> +  HobLib
> +  SerialPortLib
> +
> +[FixedPcd]
> +  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase                         ## CONSUMES
> +  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize                         ## CONSUMES
> +  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionBaseAddress      ## CONSUMES
> +  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionSize             ## CONSUMES
> +  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase                       ## CONSUMES
> +  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize                       ## CONSUMES
> +
> +[Guids]
> +  gFdtHobGuid      ## PRODUCES
> +
> +[BuildOptions]
> +  GCC:*_*_*_PP_FLAGS = -D__ASSEMBLY__
> +
> diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h b/Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h
> new file mode 100644
> index 000000000000..9d615e9fa6a1
> --- /dev/null
> +++ b/Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h
> @@ -0,0 +1,104 @@
> +/** @file
> +  Master header file for SecCore.
> +
> +  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
> +  Copyright (c) 2023, Academy of Intelligent Innovation, Shandong Universiy, China.P.R. All rights reserved.<BR>
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef SEC_MAIN_H_
> +#define SEC_MAIN_H_
> +
> +#include <PiPei.h>
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugAgentLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/ExtractGuidedSectionLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PeCoffExtraActionLib.h>
> +#include <Library/PeCoffGetEntryPointLib.h>
> +#include <Library/PeCoffLib.h>
> +#include <Library/PeiServicesLib.h>
> +#include <Library/PeiServicesTablePointerLib.h>
> +#include <Library/DebugPrintErrorLevelLib.h>
> +#include <Library/PrintLib.h>
> +#include <Library/BaseRiscVSbiLib.h>
> +#include <Library/PrePiLib.h>
> +#include <Library/PrePiHobListPointerLib.h>
> +#include <Library/SerialPortLib.h>
> +#include <Register/RiscV64/RiscVImpl.h>
> +
> +/**
> +  Entry point to the C language phase of SEC. After the SEC assembly
> +  code has initialized some temporary memory and set up the stack,
> +  the control is transferred to this function.
> +
> +  @param SizeOfRam           Size of the temporary memory available for use.
> +  @param TempRamBase         Base address of temporary ram
> +  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.
> +**/
> +VOID
> +NORETURN
> +EFIAPI
> +SecStartup (
> +  IN  UINTN  BootHartId,
> +  IN  VOID   *DeviceTreeAddress
> +  );
> +
> +/**
> +  Auto-generated function that calls the library constructors for all of the module's
> +  dependent libraries.  This function must be called by the SEC Core once a stack has
> +  been established.
> +
> +**/
> +VOID
> +EFIAPI
> +ProcessLibraryConstructorList (
> +  VOID
> +  );
> +
> +/**
> +  Perform Platform PEIM initialization.
> +
> +  @return EFI_SUCCESS     The platform initialized successfully.
> +  @retval  Others        - As the error code indicates
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +PlatformPeimInitialization (
> +  IN  VOID  *DeviceTreeAddress
> +  );
> +
> +/**
> +  Perform Memory PEIM initialization.
> +
> +  @param  DeviceTreeAddress  Pointer to FDT.
> +  @return EFI_SUCCESS        The platform initialized successfully.
> +  @retval  Others          - As the error code indicates
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +MemoryPeimInitialization (
> +  IN  VOID  *DeviceTreeAddress
> +  );
> +
> +/**
> +  Perform CPU PEIM initialization.
> +
> +  @return EFI_SUCCESS     The platform initialized successfully.
> +  @retval  Others        - As the error code indicates
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuPeimInitialization (
> +  VOID
> +  );
> +
> +#endif
> diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c b/Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c
> new file mode 100644
> index 000000000000..c72bafdcc478
> --- /dev/null
> +++ b/Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c
> @@ -0,0 +1,29 @@
> +/** @file
> +The library call to pass the device tree to DXE via HOB.
> +
> +Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> +
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <PiPei.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +
> +/**
> +  Cpu Peim initialization.
> +
> +**/
> +EFI_STATUS
> +CpuPeimInitialization (
> +  VOID
> +  )
> +{
> +  //
> +  // for MMU type >= sv39
> +  //
> +  BuildCpuHob (40, 39);
> +
> +  return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> new file mode 100644
> index 000000000000..3fa4df148ad2
> --- /dev/null
> +++ b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> @@ -0,0 +1,347 @@
> +/** @file
> +  Memory Detection for SG2042 EVB.
> +
> +  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
> +  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
> +  Copyright (c) 2023, Academy of Intelligent Innovation, Shandong Universiy, China.P.R. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +Module Name:
> +
> +  MemDetect.c
> +
> +**/
> +
> +#include <PiPei.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PeimEntryPoint.h>
> +#include <Library/ResourcePublicationLib.h>
> +#include <Register/RiscV64/RiscVEncoding.h>
> +#include <Library/PrePiLib.h>
> +#include <libfdt.h>
> +#include <Guid/FdtHob.h>
> +
> +VOID
> +BuildMemoryTypeInformationHob (
> +  VOID
> +  );
> +
> +/**
> +  Create memory range resource HOB using the memory base
> +  address and size.
> +
> +  @param  MemoryBase     Memory range base address.
> +  @param  MemorySize     Memory range size.
> +
> +**/
> +STATIC
> +VOID
> +AddMemoryBaseSizeHob (
> +  IN EFI_PHYSICAL_ADDRESS  MemoryBase,
> +  IN UINT64                MemorySize
> +  )
> +{
> +  BuildResourceDescriptorHob (
> +    EFI_RESOURCE_SYSTEM_MEMORY,
> +    EFI_RESOURCE_ATTRIBUTE_PRESENT |
> +    EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
> +    EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
> +    EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
> +    EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
> +    EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
> +    EFI_RESOURCE_ATTRIBUTE_TESTED,
> +    MemoryBase,
> +    MemorySize
> +    );
> +}
> +
> +/**
> +  Create memory range resource HOB using memory base
> +  address and top address of the memory range.
> +
> +  @param  MemoryBase     Memory range base address.
> +  @param  MemoryLimit    Memory range size.
> +
> +**/
> +STATIC
> +VOID
> +AddMemoryRangeHob (
> +  IN EFI_PHYSICAL_ADDRESS  MemoryBase,
> +  IN EFI_PHYSICAL_ADDRESS  MemoryLimit
> +  )
> +{
> +  AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
> +}
> +
> +/**
> +  Publish system RAM and reserve memory regions.
> +
> +**/
> +STATIC
> +VOID
> +InitializeRamRegions (
> +  IN EFI_PHYSICAL_ADDRESS  SystemMemoryBase,
> +  IN UINT64                SystemMemorySize
> +  )
> +{
> +  AddMemoryRangeHob (
> +    SystemMemoryBase,
> +    SystemMemoryBase + SystemMemorySize
> +    );
> +}
> +
> +/** Get the number of cells for a given property
> +
> +  @param[in]  Fdt   Pointer to Device Tree (DTB)
> +  @param[in]  Node  Node
> +  @param[in]  Name  Name of the property
> +
> +  @return           Number of cells.
> +**/
> +STATIC
> +INT32
> +GetNumCells (
> +  IN VOID         *Fdt,
> +  IN INT32        Node,
> +  IN CONST CHAR8  *Name
> +  )
> +{
> +  CONST INT32  *Prop;
> +  INT32        Len;
> +  UINT32       Val;
> +
> +  Prop = fdt_getprop (Fdt, Node, Name, &Len);
> +  if (Prop == NULL) {
> +    return Len;
> +  }
> +
> +  if (Len != sizeof (*Prop)) {
> +    return -FDT_ERR_BADNCELLS;
> +  }
> +
> +  Val = fdt32_to_cpu (*Prop);
> +  if (Val > FDT_MAX_NCELLS) {
> +    return -FDT_ERR_BADNCELLS;
> +  }
> +
> +  return (INT32)Val;
> +}
> +
> +/** Mark reserved memory ranges in the EFI memory map
> +
> + * As per DT spec v0.4 Section 3.5.4,
> + * "Reserved regions with the no-map property must be listed in the
> + * memory map with type EfiReservedMemoryType. All other reserved
> + * regions must be listed with type EfiBootServicesData."
> +
> +  @param FdtPointer Pointer to FDT
> +
> +**/
> +STATIC
> +VOID
> +AddReservedMemoryMap (
> +  IN VOID  *FdtPointer
> +  )
> +{
> +  CONST INT32           *RegProp;
> +  INT32                 Node;
> +  INT32                 SubNode;
> +  INT32                 Len;
> +  EFI_PHYSICAL_ADDRESS  Addr;
> +  UINT64                Size;
> +  INTN                  NumRsv, i;
> +  INT32                 NumAddrCells, NumSizeCells;
> +
> +  NumRsv = fdt_num_mem_rsv (FdtPointer);
> +
> +  /* Look for an existing entry and add it to the efi mem map. */
> +  for (i = 0; i < NumRsv; i++) {
> +    if (fdt_get_mem_rsv (FdtPointer, i, &Addr, &Size) != 0) {
> +      continue;
> +    }
> +
> +    BuildMemoryAllocationHob (
> +      Addr,
> +      Size,
> +      EfiReservedMemoryType
> +      );
> +  }
> +
> +  /* process reserved-memory */
> +  Node = fdt_subnode_offset (FdtPointer, 0, "reserved-memory");
> +  if (Node >= 0) {
> +    NumAddrCells = GetNumCells (FdtPointer, Node, "#address-cells");
> +    if (NumAddrCells <= 0) {
> +      return;
> +    }
> +
> +    NumSizeCells = GetNumCells (FdtPointer, Node, "#size-cells");
> +    if (NumSizeCells <= 0) {
> +      return;
> +    }
> +
> +    fdt_for_each_subnode (SubNode, FdtPointer, Node) {
> +      RegProp = fdt_getprop (FdtPointer, SubNode, "reg", &Len);
> +
> +      if ((RegProp != 0) && (Len == ((NumAddrCells + NumSizeCells) * sizeof (INT32)))) {
> +        Addr = fdt32_to_cpu (RegProp[0]);
> +
> +        if (NumAddrCells > 1) {
> +          Addr = (Addr << 32) | fdt32_to_cpu (RegProp[1]);
> +        }
> +
> +        RegProp += NumAddrCells;
> +        Size     = fdt32_to_cpu (RegProp[0]);
> +
> +        if (NumSizeCells > 1) {
> +          Size = (Size << 32) | fdt32_to_cpu (RegProp[1]);
> +        }
> +
> +        DEBUG ((
> +          DEBUG_INFO,
> +          "%a: Adding Reserved Memory Addr = 0x%llx, Size = 0x%llx\n",
> +          __func__,
> +          Addr,
> +          Size
> +          ));
> +
> +        if (fdt_getprop (FdtPointer, SubNode, "no-map", &Len)) {
Ensure you document that OpenSBI 1.3/1.3.1 should be used which fixed
its no-map issue. Otherwise, you can get into some issues in linux
kernel.

Acked-by: Sunil V L <sunilvl@ventanamicro.com>



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