From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id AEBAF7803E0 for ; Wed, 15 Nov 2023 13:05:23 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=50nBtnj2YqWWQ3+YAtYp+o4mXHPMwAqFca5SF7viRBI=; c=relaxed/simple; d=groups.io; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Disposition; s=20140610; t=1700053522; v=1; b=oXW+uQj//55EWDM1ecRyQIN/O0VyuMykNhg35B5qQCjeSvbq31srHjn8qoqZVp4t+JWEtNGz zzQigDpavd3WwPDcnN/ZEJSV5YyZQZo0OU/sgotrEv7NrdjSqasBgSjbIkt1B5kWALq3o6tbAT7 q54YZRq2ifYSuyr8rRJI5aMU= X-Received: by 127.0.0.2 with SMTP id uoCkYY7687511xVDOVqVrM8y; Wed, 15 Nov 2023 05:05:22 -0800 X-Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by mx.groups.io with SMTP id smtpd.web11.12389.1700053521809996864 for ; Wed, 15 Nov 2023 05:05:21 -0800 X-Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AFAlBTL032487; Wed, 15 Nov 2023 13:05:18 GMT X-Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ucrb2gw16-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Nov 2023 13:05:17 +0000 X-Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AFD5HE7028119 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Nov 2023 13:05:17 GMT X-Received: from qc-i7.hemma.eciton.net (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 15 Nov 2023 05:05:14 -0800 Date: Wed, 15 Nov 2023 13:05:10 +0000 From: "Leif Lindholm" To: Marcin Juszkiewicz CC: , Ard Biesheuvel , Graeme Gregory , Jeremy Linton , Ling Jia , Marcin Wojtas , Peng Xie , Yiqi Shu Subject: Re: [edk2-devel] [PATCH edk2-platforms 1/1] set WritePolicyValid for all cache types Message-ID: References: <20231115124608.1712896-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 In-Reply-To: <20231115124608.1712896-1-marcin.juszkiewicz@linaro.org> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-GUID: NJBskOxjvuMJzyOD6S4M6npxVPJXzsU0 X-Proofpoint-ORIG-GUID: NJBskOxjvuMJzyOD6S4M6npxVPJXzsU0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,quic_llindhol@quicinc.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: gzgcvaTS7qkpRITRRrApaeLkx7686176AA= Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b="oXW+uQj/"; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=quicinc.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On Wed, Nov 15, 2023 at 13:46:08 +0100, Marcin Juszkiewicz wrote: > acpiview complains: > > ERROR: On Arm based systems, all cache properties must be provided in > the cache type structure. Missing 'Write Policy Valid' flag. > > ACPI specification says: > > > Set to 1 if the write policy attribute described is valid. A value > > of 0 indicates that, where possible, processor architecture specific > > discovery mechanisms should be used to ascertain the value of this > > attribute. Thanks for finding this. This is definitely an error (and I expect this is a single original error that has then been copied around to other platforms, so important to fix all of them). But I can see how that mistake was made. The ACPI specification makes no reference to what write policy means for instruction caches (i.e. nothing). However, the ACPI specification *does* make it crystal clear that "On Arm-based systems, all cache properties must be provided in the table.". So indicating that one of the entries is invalid is ... invalid. So apparently all Arm instruction caches are Write-back. Lol. > Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm I'll leave this one for a day or so before merging to allow reviewers/maintainers to see and respond. Regards, Leif > --- > Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 2 +- > Platform/RaspberryPi/AcpiTables/Pptt.aslc | 2 +- > Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc | 2 +- > Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc | 2 +- > Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc | 2 +- > Silicon/Socionext/SynQuacer/AcpiTables/Pptt.aslc | 2 +- > 6 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > index 983d17f6fa50..61d8bce8c959 100644 > --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h > @@ -126,7 +126,7 @@ typedef struct { > 1, /* AssociativityValid */ \ > 1, /* AllocationTypeValid */ \ > 1, /* CacheTypeValid */ \ > - 0, /* WritePolicyValid */ \ > + 1, /* WritePolicyValid */ \ > 1, /* LineSizeValid */ \ > }, \ > 0, /* NextLevelOfCache */ \ > diff --git a/Platform/RaspberryPi/AcpiTables/Pptt.aslc b/Platform/RaspberryPi/AcpiTables/Pptt.aslc > index a52bc5a31adf..b80f5ff1e057 100644 > --- a/Platform/RaspberryPi/AcpiTables/Pptt.aslc > +++ b/Platform/RaspberryPi/AcpiTables/Pptt.aslc > @@ -114,7 +114,7 @@ typedef struct { > 1, /* AssociativityValid */ \ > 1, /* AllocationTypeValid */ \ > 1, /* CacheTypeValid */ \ > - 0, /* WritePolicyValid */ \ > + 1, /* WritePolicyValid */ \ > 1, /* LineSizeValid */ \ > }, \ > 0, /* NextLevelOfCache */ \ > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc b/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc > index e03bfcd6211d..f3a9b90fb564 100644 > --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc > @@ -94,7 +94,7 @@ typedef struct { > 1, /* AssociativityValid */ \ > 1, /* AllocationTypeValid */ \ > 1, /* CacheTypeValid */ \ > - 0, /* WritePolicyValid */ \ > + 1, /* WritePolicyValid */ \ > 1, /* LineSizeValid */ \ > }, \ > 0, /* NextLevelOfCache */ \ > diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc > index f37c7511134d..3793cbbca0b5 100644 > --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc > +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc > @@ -94,7 +94,7 @@ typedef struct { > 1, /* AssociativityValid */ \ > 1, /* AllocationTypeValid */ \ > 1, /* CacheTypeValid */ \ > - 0, /* WritePolicyValid */ \ > + 1, /* WritePolicyValid */ \ > 1, /* LineSizeValid */ \ > }, \ > 0, /* NextLevelOfCache */ \ > diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc > index ae1a21df23b9..04652653563e 100644 > --- a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc > +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc > @@ -92,7 +92,7 @@ typedef struct { > 1, /* AssociativityValid */ \ > 1, /* AllocationTypeValid */ \ > 1, /* CacheTypeValid */ \ > - 0, /* WritePolicyValid */ \ > + 1, /* WritePolicyValid */ \ > 1, /* LineSizeValid */ \ > }, \ > 0, /* NextLevelOfCache */ \ > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Pptt.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Pptt.aslc > index e351d82b9763..f3e9149769ea 100644 > --- a/Silicon/Socionext/SynQuacer/AcpiTables/Pptt.aslc > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Pptt.aslc > @@ -91,7 +91,7 @@ typedef struct { > 1, /* AssociativityValid */ \ > 1, /* AllocationTypeValid */ \ > 1, /* CacheTypeValid */ \ > - 0, /* WritePolicyValid */ \ > + 1, /* WritePolicyValid */ \ > 1, /* LineSizeValid */ \ > }, \ > 0, /* NextLevelOfCache */ \ > -- > 2.41.0 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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