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From: "Sunil V L" <sunilvl@ventanamicro.com>
To: Dhaval <dhaval@rivosinc.com>
Cc: devel@edk2.groups.io, Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Jiewen Yao <jiewen.yao@intel.com>,
	Jordan Justen <jordan.l.justen@intel.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	Andrei Warkentin <andrei.warkentin@intel.com>,
	Laszlo Ersek <lersek@redhat.com>
Subject: Re: [edk2-devel] [PATCH v9 5/5] OvmfPkg/RiscVVirt: Override for RV CPU Features
Date: Wed, 6 Dec 2023 19:59:54 +0530	[thread overview]
Message-ID: <ZXCFYjGg6UkeZGCb@sunil-laptop> (raw)
In-Reply-To: <20231204082950.96914-6-dhaval@rivosinc.com>

Hi Dhaval,

Few minor comments.

1) Please use RISC-V instead of RV every where.

On Mon, Dec 04, 2023 at 01:59:50PM +0530, Dhaval wrote:
> This PCD provides a way for platform to override any
> HW features that are default enabled by previous stages
> of FW (like OpenSBI). For the case where previous/prev
> stage has disabled the feature, this override is not
> useful and its usage should be avoided.
> 
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: Andrei Warkentin <andrei.warkentin@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> 
> Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
> Acked-by: Laszlo Ersek <lersek@redhat.com>
> Reviewed-by: Andrei Warkentin <andrei.warkentin@...>
> ---
> 
> Notes:
>     V8:
>     - Added RV tag
>     V7:
>     - Added RB tag
>     v6:
>     - Modify PCD name according to changes made in Baselib implementation
>     V5:
>     - Introduce PCD for platform
> 
>  OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
> index fe320525153f..5d66f7fe6ae6 100644
> --- a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
> +++ b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
> @@ -203,6 +203,7 @@ [PcdsFeatureFlag]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
>  
>  [PcdsFixedAtBuild.common]
> +  gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0
Could you set this to 0xFFFFFFFFFFFFFFFE? Just disable only CMO?

Thanks,
Snil


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      reply	other threads:[~2023-12-06 14:30 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-04  8:29 [edk2-devel] [PATCH v9 0/5] Cache Management Operations Support For RISC-V Dhaval Sharma
2023-12-04  8:29 ` [edk2-devel] [PATCH v9 1/5] MdePkg: Move RISC-V Cache Management Declarations Into BaseLib Dhaval Sharma
2023-12-04  8:29 ` [edk2-devel] [PATCH v9 2/5] MdePkg: Rename Cache Management Function To Clarify Fence Based Op Dhaval Sharma
2023-12-04  8:29 ` [edk2-devel] [PATCH v9 3/5] MdePkg: Implement RISC-V Cache Management Operations Dhaval Sharma
2023-12-04  8:29 ` [edk2-devel] [PATCH v9 4/5] MdePkg: Utilize Cache Management Operations Implementation For RISC-V Dhaval Sharma
2023-12-06 14:20   ` Sunil V L
2023-12-07  5:01     ` Dhaval Sharma
2023-12-08  4:28       ` Sunil V L
2023-12-10 14:21         ` Dhaval Sharma
2023-12-11 13:11           ` Sunil V L
2023-12-11 15:09             ` Pedro Falcato
2023-12-11 15:20               ` Sunil V L
2023-12-11 15:41                 ` Pedro Falcato
2023-12-11 15:54   ` Pedro Falcato
2023-12-04  8:29 ` [edk2-devel] [PATCH v9 5/5] OvmfPkg/RiscVVirt: Override for RV CPU Features Dhaval Sharma
2023-12-06 14:29   ` Sunil V L [this message]

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