From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 3C5EBD811C7 for ; Thu, 28 Mar 2024 13:31:50 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=VslGiI1qyYjc8S0Q2UxQo2NPAZ8utlkOy1oHJlk4mcw=; c=relaxed/simple; d=groups.io; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Disposition; s=20240206; t=1711632708; v=1; b=5LvyI05CvXGn6jFtI4znFFcSm/UTT/SfNPGq2HX34NJhF/BJhLAj3xiPox79EuCTVs7BTcK9 XMBp0ZPxGy9jCtYQSlNuusoZJTc26W1E+3L7J246Erw90MXmjPVUIqLhDMQQLz+2lSW9uvRj1Ey WjShz3UW2/ZLys9k+dAQ4790pXLeD5Z8krWd8Jx1jojqyRh5wKjdyyoNAy7xrgOZKPIM5c/cJy9 6dOg+XG4ICx+9AV+n+myyLbMRbaW+ZvYSeDmqtzt1fWJ5IJ3ue+ksKXGc5JvJYojio+ywIaI2jY y44dWvwupq0sVhNlMB2rKEoBVkByV/2cj3EytVmHuay9g== X-Received: by 127.0.0.2 with SMTP id KSDIYY7687511xXUxpFi8nMc; Thu, 28 Mar 2024 06:31:48 -0700 X-Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by mx.groups.io with SMTP id smtpd.web11.16186.1711632708158054514 for ; Thu, 28 Mar 2024 06:31:48 -0700 X-Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 42SCIIS6022555; Thu, 28 Mar 2024 13:31:47 GMT X-Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3x54r610ne-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Mar 2024 13:31:46 +0000 (GMT) X-Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 42SDVjDj020274 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Mar 2024 13:31:45 GMT X-Received: from qc-i7.hemma.eciton.net (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 28 Mar 2024 06:31:43 -0700 Date: Thu, 28 Mar 2024 13:31:40 +0000 From: "Leif Lindholm" To: , CC: , , , Subject: Re: [edk2-devel] [PATCH v4 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime Message-ID: References: <20240328061935.3810595-1-xiongyining1480@phytium.com.cn> <20240328061935.3810595-2-xiongyining1480@phytium.com.cn> MIME-Version: 1.0 In-Reply-To: <20240328061935.3810595-2-xiongyining1480@phytium.com.cn> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-GUID: jvsP3NP1TiqVorOlix0qD9JGq6u4pZcL X-Proofpoint-ORIG-GUID: jvsP3NP1TiqVorOlix0qD9JGq6u4pZcL Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 28 Mar 2024 06:31:48 -0700 Reply-To: devel@edk2.groups.io,quic_llindhol@quicinc.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 0XyFTBQ3YsxARxr5x8qgxwhgx7686176AA= Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=5LvyI05C; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=quicinc.com (policy=none) On Thu, Mar 28, 2024 at 06:19:35 +0000, Xiong Yining wrote: > Add support to create SRAT(System resource affinity table) for > sbsa platform at runtime. > > Signed-off-by: Xiong Yining > Reviewed-by: Marcin Juszkiewicz > Reviewed-by: Leif Lindholm You are not supposed to add Reviewed-by: or Acked-by: tags unless whoever is commenting on your code indicates so by posting (for me) Reviewed-by: Leif Lindholm It is not an indicator of work in progress, it is a flag that the patch has been Reviewed and is ready to merge. This also means that if Reviewed-by: is given early in the process, but then you need to do substantial rework, you should *drop* any previously given Reviewed-by: tags. Marcin has never given his Reviewed-by for this patch, so I have dropped this before pushing. Pushed as 7c26299112f3. Thanks! / Leif > --- > .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 27 ++++++ > .../Include/Library/HardwareInfoLib.h | 10 ++ > .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 92 +++++++++++++++++++ > .../SbsaQemuHardwareInfoLib.c | 36 ++++++++ > 4 files changed, 165 insertions(+) > > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h > index 7595df4c8a2d..83a085cd86f4 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h > @@ -63,4 +63,31 @@ typedef struct { > > #define GTDT_WDTIMER_FLAGS (GTDT_WDTIMER_ACTIVE_HIGH | GTDT_WDTIMER_LEVEL_TRIGGERED) > > +#define SBSAQEMU_ACPI_MEMORY_AFFINITY_STRUCTURE_INIT( \ > + ProximityDomain, Base, Length, Flags) \ > + { \ > + 1, /* Type */ \ > + sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE), /* Length */ \ > + ProximityDomain, /* Proximity Domain */ \ > + 0, /* Reserved */ \ > + (Base) & 0xffffffff, /* Base Address Low */ \ > + ((Base) >> 32) & 0xffffffff , /* Base Address High */ \ > + (Length) & 0xffffffff, /* Length Low */ \ > + ((Length) >> 32) & 0xffffffff, /* Length High */ \ > + 0, /* Reserved */ \ > + Flags, /* Flags */ \ > + 0 /* Reserved */ \ > + } > + > +#define SBSAQEMU_ACPI_GICC_AFFINITY_STRUCTURE_INIT( \ > + ProximityDomain, ACPIProcessorUID, Flags, ClockDomain) \ > + { \ > + 3, /* Type */ \ > + sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE), /* Length */ \ > + ProximityDomain, /* Proximity Domain */ \ > + ACPIProcessorUID, /* ACPI Processor UID */ \ > + Flags, /* Flags */ \ > + ClockDomain /* Clock Domain */ \ > + } > + > #endif > diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h > index 5db0eacc9d2d..46fdad45353c 100644 > --- a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h > +++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h > @@ -73,4 +73,14 @@ GetMemInfo ( > OUT MemoryInfo *MemInfo > ); > > +/** > + Get the number of numa node from device tree passed by Qemu. > + > + @retval the number of numa node. > +**/ > +UINT64 > +GetNumaNodeCount ( > + VOID > + ); > + > #endif /* HARDWARE_INFO_LIB */ > diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > index 4ebe2a445344..30239e7dca0d 100644 > --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c > @@ -682,6 +682,91 @@ AddGtdtTable ( > return Status; > } > > +/* > + * A function that adds the SRAT ACPI table. > + */ > +EFI_STATUS > +AddSratTable ( > + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable > + ) > +{ > + EFI_STATUS Status; > + UINT8 *New; > + EFI_PHYSICAL_ADDRESS PageAddress; > + UINTN TableHandle; > + UINT32 TableSize; > + UINT32 Index; > + UINT32 NodeId; > + UINT32 NumMemNodes; > + MemoryInfo MemInfo; > + UINT32 NumCores = GetCpuCount (); > + > + // Initialize SRAT ACPI Header > + EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header = { > + SBSAQEMU_ACPI_HEADER (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE, > + EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER, > + EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION), > + 1, 0 }; > + > + NumMemNodes = GetMemNodeCount(); > + > + // Calculate the new table size based on the number of cores > + TableSize = sizeof (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER) + > + (sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE) * NumMemNodes ) + > + (sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE) * NumCores); > + > + Status = gBS->AllocatePages ( > + AllocateAnyPages, > + EfiACPIReclaimMemory, > + EFI_SIZE_TO_PAGES (TableSize), > + &PageAddress > + ); > + > + if (EFI_ERROR(Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to allocate pages for SRAT table\n")); > + return EFI_OUT_OF_RESOURCES; > + } > + > + New = (UINT8 *)(UINTN) PageAddress; > + ZeroMem (New, TableSize); > + > + // Add the ACPI Description table header > + CopyMem (New, &Header, sizeof (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER)); > + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; > + New += sizeof (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER); > + > + // Add memory structures > + for (Index = 0; Index < NumMemNodes ; Index++) { > + GetMemInfo (Index, &MemInfo); > + EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE memory = SBSAQEMU_ACPI_MEMORY_AFFINITY_STRUCTURE_INIT (MemInfo.NodeId, MemInfo.AddressBase, MemInfo.AddressSize, 1); > + CopyMem (New, &memory, sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE)); > + New += sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE); > + } > + > + // Add processor structures for the cores > + for (Index = 0; Index < NumCores; Index++) { > + NodeId = GetCpuNumaNode(Index); > + EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE gicc = SBSAQEMU_ACPI_GICC_AFFINITY_STRUCTURE_INIT(NodeId, Index, 1, 0); > + CopyMem (New, &gicc, sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE)); > + New += sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE); > + } > + > + // Perform Checksum > + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); > + > + Status = AcpiTable->InstallAcpiTable ( > + AcpiTable, > + (EFI_ACPI_COMMON_HEADER *)PageAddress, > + TableSize, > + &TableHandle > + ); > + if (EFI_ERROR(Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to install SRAT table\n")); > + } > + > + return Status; > +} > + > /* > * A function to disable XHCI node on Platform Version lower than 0.3 > */ > @@ -793,6 +878,13 @@ InitializeSbsaQemuAcpiDxe ( > DEBUG ((DEBUG_ERROR, "Failed to add PPTT table\n")); > } > > + if (GetNumaNodeCount() > 1){ > + Status = AddSratTable (AcpiTable); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "Failed to add SRAT table\n")); > + } > + } > + > Status = AddGtdtTable (AcpiTable); > if (EFI_ERROR (Status)) { > DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n")); > diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c > index b178cf6c6c43..79d0c79918d0 100644 > --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c > +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c > @@ -143,3 +143,39 @@ GetMemInfo ( > MemInfo->AddressBase + MemInfo->AddressSize -1 )); > > } > + > +UINT64 > +GetNumaNodeCount ( > + VOID > +) > +{ > + UINT64 Arg; > + UINT32 Index; > + UINT32 NumberNumaNodes; > + UINT32 NumberMemNodes; > + UINT32 NumCores = GetCpuCount(); > + MemoryInfo MemInfo; > + > + NumberNumaNodes = 0; > + NumberMemNodes = GetMemNodeCount(); > + > + if (NumCores > 0){ > + for (Index = 0; Index < NumCores; Index ++){ > + Arg = GetCpuNumaNode(Index); > + if (NumberNumaNodes == 0 || NumberNumaNodes < (Arg + 1)){ > + NumberNumaNodes = Arg + 1; > + } > + } > + } > + > + if (NumberMemNodes > 0){ > + for (Index = 0; Index < NumberMemNodes; Index ++){ > + GetMemInfo(Index, &MemInfo); > + if (NumberNumaNodes == 0 || NumberNumaNodes < (MemInfo.NodeId + 1)){ > + NumberNumaNodes = MemInfo.NodeId + 1; > + } > + } > + } > + > + return NumberNumaNodes; > +} > -- > 2.34.1 > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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