From: "Leif Lindholm" <quic_llindhol@quicinc.com>
To: <devel@edk2.groups.io>, <marcin.juszkiewicz@linaro.org>
Cc: Xiong Yining <xiongyining1480@phytium.com.cn>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Graeme Gregory <graeme@xora.org.uk>,
Chen Baozi <chenbaozi@phytium.com.cn>
Subject: Re: [edk2-devel] [PATCH edk2-platforms v3 2/5] SbsaQemu: align the PPTT tables with QEMU
Date: Tue, 9 Jul 2024 13:43:28 +0100 [thread overview]
Message-ID: <Zo0wcC7VLvROCp18@qc-i7.hemma.eciton.net> (raw)
In-Reply-To: <20240709-acpi65-v3-2-ee93ba536fcf@linaro.org>
On Tue, Jul 09, 2024 at 12:47:07 +0200, Marcin Juszkiewicz wrote:
> From: Xiong Yining <xiongyining1480@phytium.com.cn>
>
> To align the CPU topology information recognized by the operating system
> with the CPU topology information configured by QEMU, we need to make
> use of the CPU topology information to create complex PPTT tables
> setups.
>
> We can get the CPU topology information via SMC.
>
> Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
/
Leif
> ---
> .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 11 ++
> .../Include/IndustryStandard/SbsaQemuAcpi.h | 32 ----
> .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 187 +++++++++++++++-----
> 3 files changed, 158 insertions(+), 72 deletions(-)
>
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
> index e5f0748bb16e..085c681ba55f 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
> @@ -88,4 +88,15 @@ typedef struct {
> ClockDomain /* Clock Domain */ \
> }
>
> +#define SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT(Flags, Parent, ACPIProcessorID, NumberOfPrivateResources) \
> + { \
> + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type */ \
> + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + NumberOfPrivateResources * sizeof (UINT32), /* Length */ \
> + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, /* Reserved */ \
> + Flags, /* Flags */ \
> + Parent, /* Parent */ \
> + ACPIProcessorID, /* ACPI Processor ID */ \
> + NumberOfPrivateResources /* Number of private resources */ \
> + }
> +
> #endif
> diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
> index ae151210c2c6..2f87591e737a 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
> @@ -166,36 +166,4 @@ typedef struct {
> 64 /* LineSize */ \
> }
>
> -#define SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT { \
> - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, \
> - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR), \
> - { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \
> - { \
> - EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, /* PhysicalPackage */ \
> - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, /* AcpiProcessorIdValid */ \
> - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ \
> - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, /* Not Leaf */ \
> - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ \
> - }, \
> - 0, /* Parent */ \
> - 0, /* AcpiProcessorId */ \
> - 0, /* NumberOfPrivateResources */ \
> - }
> -
> -#define SBSAQEMU_ACPI_PPTT_CORE_STRUCT { \
> - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, \
> - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + (2 * sizeof (UINT32))), \
> - { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, \
> - { \
> - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, /* PhysicalPackage */ \
> - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorValid */ \
> - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, /* Is not a Thread */ \
> - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF, /* Leaf */ \
> - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL, /* Identical Cores */ \
> - }, \
> - 0, /* Parent */ \
> - 0, /* AcpiProcessorId */ \
> - 2, /* NumberOfPrivateResources */ \
> - }
> -
> #endif
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> index e0eef54ff907..465a69d7328c 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> @@ -505,14 +505,51 @@ AddPpttTable (
> EFI_PHYSICAL_ADDRESS PageAddress;
> UINT8 *New;
> UINT32 CpuId;
> - UINT32 NumCores = GetCpuCount ();
> + CpuTopology CpuTopo;
> +
> + GetCpuTopology (&CpuTopo);
>
> EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1DCache = SBSAQEMU_ACPI_PPTT_L1_D_CACHE_STRUCT;
> EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L1ICache = SBSAQEMU_ACPI_PPTT_L1_I_CACHE_STRUCT;
> EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache = SBSAQEMU_ACPI_PPTT_L2_CACHE_STRUCT;
>
> - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PPTT_CLUSTER_STRUCT;
> - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PPTT_CORE_STRUCT;
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS SocketFlags = {
> + EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
> + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF,
> + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
> + };
> +
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ClusterFlags = {
> + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
> + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF,
> + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
> + };
> +
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS CoreFlags = {
> + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD,
> + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF,
> + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
> + };
> +
> + if (CpuTopo.Threads > 1) {
> + // The Thread structure is the leaf structure, adjust the value of CoreFlags.
> + CoreFlags.AcpiProcessorIdValid = EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID;
> + CoreFlags.NodeIsALeaf = EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF;
> + }
> +
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS ThreadFlags = {
> + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID,
> + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD,
> + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF,
> + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL
> + };
>
> EFI_ACPI_DESCRIPTION_HEADER Header =
> SBSAQEMU_ACPI_HEADER (
> @@ -522,10 +559,16 @@ AddPpttTable (
> );
>
> TableSize = sizeof (EFI_ACPI_DESCRIPTION_HEADER) +
> - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
> - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3) +
> - (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) * NumCores) +
> - (sizeof (UINT32) * 2 * NumCores);
> + CpuTopo.Sockets * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
> + CpuTopo.Clusters * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
> + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE) * 3 +
> + CpuTopo.Cores * (sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) +
> + sizeof (UINT32) * 2)));
> +
> + if (CpuTopo.Threads > 1) {
> + TableSize += CpuTopo.Sockets * CpuTopo.Clusters * CpuTopo.Cores * CpuTopo.Threads *
> + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> + }
>
> Status = gBS->AllocatePages (
> AllocateAnyPages,
> @@ -546,39 +589,103 @@ AddPpttTable (
> ((EFI_ACPI_DESCRIPTION_HEADER *)New)->Length = TableSize;
> New += sizeof (EFI_ACPI_DESCRIPTION_HEADER);
>
> - // Add the Cluster PPTT structure
> - CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
> - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> -
> - // Add L1 D Cache structure
> - CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
> - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2_CACHE_INDEX;
> - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> -
> - // Add L1 I Cache structure
> - CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
> - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2_CACHE_INDEX;
> - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> -
> - // Add L2 Cache structure
> - CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
> - ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = 0; /* L2 is LLC */
> - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> -
> - for (CpuId = 0; CpuId < NumCores; CpuId++) {
> - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *CorePtr;
> - UINT32 *PrivateResourcePtr;
> -
> - CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
> - CorePtr = (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR *)New;
> - CorePtr->Parent = CLUSTER_INDEX;
> - CorePtr->AcpiProcessorId = CpuId;
> - New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> -
> - PrivateResourcePtr = (UINT32 *)New;
> - PrivateResourcePtr[0] = L1_D_CACHE_INDEX;
> - PrivateResourcePtr[1] = L1_I_CACHE_INDEX;
> - New += (2 * sizeof (UINT32));
> + UINT32 SocketNum, ClusterNum, CoreNum, ThreadNum;
> + UINT32 SocketIndex, ClusterIndex, CoreIndex, L1DCacheIndex, L1ICacheIndex, L2CacheIndex;
> +
> + CpuId = 0;
> + SocketIndex = sizeof (EFI_ACPI_DESCRIPTION_HEADER);
> + for (SocketNum = 0; SocketNum < CpuTopo.Sockets; SocketNum++) {
> + // Add the Socket PPTT structure
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Socket = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
> + SocketFlags,
> + 0,
> + 0,
> + 0
> + );
> + CopyMem (New, &Socket, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> +
> + ClusterIndex = SocketIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> + for (ClusterNum = 0; ClusterNum < CpuTopo.Clusters; ClusterNum++) {
> + L1DCacheIndex = ClusterIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> + L1ICacheIndex = L1DCacheIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> + L2CacheIndex = L1ICacheIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> + CoreIndex = L2CacheIndex + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> +
> + // Add the Cluster PPTT structure
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
> + ClusterFlags,
> + SocketIndex,
> + 0,
> + 0
> + );
> + CopyMem (New, &Cluster, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> +
> + // Add L1 D Cache structure
> + CopyMem (New, &L1DCache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
> + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheIndex;
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> +
> + // Add L1 I Cache structure
> + CopyMem (New, &L1ICache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
> + ((EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE *)New)->NextLevelOfCache = L2CacheIndex;
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> +
> + // Add L2 Cache structure
> + CopyMem (New, &L2Cache, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE));
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE);
> +
> + for (CoreNum = 0; CoreNum < CpuTopo.Cores; CoreNum++) {
> + UINT32 *PrivateResourcePtr;
> + UINT32 CoreCpuId;
> +
> + if (CpuTopo.Threads == 1) {
> + CoreCpuId = CpuId;
> + } else {
> + CoreCpuId = 0;
> + }
> +
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
> + CoreFlags,
> + ClusterIndex,
> + CoreCpuId,
> + 2
> + );
> + CopyMem (New, &Core, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> +
> + PrivateResourcePtr = (UINT32 *)New;
> + PrivateResourcePtr[0] = L1DCacheIndex;
> + PrivateResourcePtr[1] = L1ICacheIndex;
> + New += (2 * sizeof (UINT32));
> +
> + if (CpuTopo.Threads == 1) {
> + CpuId++;
> + } else {
> + // Add the Thread PPTT structure
> + for (ThreadNum = 0; ThreadNum < CpuTopo.Threads; ThreadNum++) {
> + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread = SBSAQEMU_ACPI_PROCESSOR_HIERARCHY_NODE_STRUCTURE_INIT (
> + ThreadFlags,
> + CoreIndex,
> + CpuId,
> + 0
> + );
> + CopyMem (New, &Thread, sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR));
> + New += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> + CpuId++;
> + }
> +
> + CoreIndex += CpuTopo.Threads * sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR);
> + }
> +
> + CoreIndex += sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR) + sizeof (UINT32) * 2;
> + }
> +
> + ClusterIndex = CoreIndex;
> + }
> +
> + SocketIndex = ClusterIndex;
> }
>
> // Perform Checksum
>
> --
> 2.45.2
>
>
>
>
>
>
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next prev parent reply other threads:[~2024-07-09 12:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-09 10:47 [edk2-devel] [PATCH edk2-platforms v3 0/5] SbsaQemu: Align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-09 10:47 ` [edk2-devel] [PATCH edk2-platforms v3 1/5] SbsaQemu: get the information of CPU topology via SMC calls Marcin Juszkiewicz
2024-07-09 12:40 ` Leif Lindholm
[not found] ` <17E08BE30DD079C5.26166@groups.io>
2024-07-09 12:42 ` Leif Lindholm
2024-07-09 10:47 ` [edk2-devel] [PATCH edk2-platforms v3 2/5] SbsaQemu: align the PPTT tables with QEMU Marcin Juszkiewicz
2024-07-09 12:43 ` Leif Lindholm [this message]
2024-07-09 10:47 ` [edk2-devel] [PATCH edk2-platforms v3 3/5] SbsaQemu: update PPTT to ACPI 6.5 Marcin Juszkiewicz
2024-07-09 12:44 ` Leif Lindholm
2024-07-09 10:47 ` [edk2-devel] [PATCH edk2-platforms v3 4/5] SbsaQemu: provide cache info per core in PPTT Marcin Juszkiewicz
2024-07-09 13:01 ` Leif Lindholm
2024-07-10 13:58 ` Jonathan Cameron via groups.io
2024-07-10 14:39 ` Leif Lindholm
2024-07-09 10:47 ` [edk2-devel] [PATCH edk2-platforms v3 5/5] SbsaQemu: introduce helper in PPTT generation Marcin Juszkiewicz
2024-07-09 13:00 ` Leif Lindholm
2024-07-09 13:12 ` Marcin Juszkiewicz
2024-07-09 13:15 ` Leif Lindholm
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