From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E5EAA221660D8 for ; Wed, 29 Nov 2017 04:34:13 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C05CCC0008D4; Wed, 29 Nov 2017 12:38:37 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-48.rdu2.redhat.com [10.10.120.48]) by smtp.corp.redhat.com (Postfix) with ESMTP id 20DA65D973; Wed, 29 Nov 2017 12:38:36 +0000 (UTC) To: Jian J Wang References: <20171129084640.20076-1-jian.j.wang@intel.com> Cc: edk2-devel@lists.01.org From: Laszlo Ersek Message-ID: Date: Wed, 29 Nov 2017 13:38:36 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171129084640.20076-1-jian.j.wang@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 29 Nov 2017 12:38:37 +0000 (UTC) Subject: Re: [PATCH 0/2] Enable page table write protection X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Nov 2017 12:34:14 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Hi Jian, On 11/29/17 09:46, Jian J Wang wrote: > Write Protect feature (CR0.WP) is always enabled in driver UefiCpuPkg/CpuDxe. > But the memory pages used for page table are not set as read-only in the driver > DxeIplPeim, after the paging is setup. This might jeopardize the page table > integrity if there's buffer overflow occured in other part of system. > > This patch series will change this situation by clearing R/W bit in page attribute > of the pages used as page table. > > Validation works include booting Windows (10/server 2016) and Linux (Fedora/Ubuntu) > on OVMF and Intel real platform. > > Jian J Wang (2): > UefiCpuPkg/CpuDxe: Check CR0.WP before changing page table > MdeModulePkg/DxeIpl: Mark page table as read-only > > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 166 +++++++++++++++++++++++ > MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h | 14 ++ > UefiCpuPkg/CpuDxe/CpuPageTable.c | 65 ++++++++- > 3 files changed, 241 insertions(+), 4 deletions(-) > thanks for the CC -- I'd like to test this feature. Is it OK if I wait 1-2 days first, to see if there is review feedback that requires a v2? Thanks! Laszlo