From: "Brijesh Singh" <brijesh.singh@amd.com>
To: "Xu, Min M" <min.m.xu@intel.com>,
"Yao, Jiewen" <jiewen.yao@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: James Bottomley <jejb@linux.ibm.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
"Justen, Jordan L" <jordan.l.justen@intel.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Erdem Aktas <erdemaktas@google.com>,
Michael Roth <Michael.Roth@amd.com>,
Gerd Hoffmann <kraxel@redhat.com>
Subject: Re: [PATCH v6 00/29] Add AMD Secure Nested Paging (SEV-SNP) support
Date: Thu, 9 Sep 2021 05:51:08 -0500 [thread overview]
Message-ID: <a3df611a-79db-cd07-996d-d15ae51afaad@amd.com> (raw)
In-Reply-To: <PH0PR11MB506499BEFBA11C376DE0D24AC5D59@PH0PR11MB5064.namprd11.prod.outlook.com>
Hi Min,
On 9/8/21 7:31 PM, Xu, Min M wrote:
> On September 9, 2021 3:46 AM, Brijesh Singh wrote:
>> Thank you so much Yao for reviewing the patches. Based on some comments
>> from Gerd I may update code around the reset vector area (mainly use the
>> metadata format etc). For your comments regarding the introducing a new
>> PcdConfidentialComputingCategory I will look to see what I can come up with
>> and in UefiCpuPkg I will try to move all the SEV specific functions in new files
>> (where applicable).
>>
> Hi, Brijesh
> if you are considering to introduce a new PcdConfidentialComputingCategory
> as Jiewen suggested below:
>>> 0008-UefiCpuPkg-Define-the-SEV-SNP-specific-dynamic-PCDs
>>> I really don't like the idea to use BOOL PcdSevEsIsEnabled and
>> PcdSevSnpIsEnabled.
>>> Can we define *one* PCD - such as PcdConfidentialComputingCategory?
>>> We can assign range 0x0000~0xFFFF to AMD SEV, 0x10000~0x1FFFF to Intel
>> TDX.
>>> Then SEV=0x0000, SEV-ES=0x0001, SEV-SNP=0x0002, and TDX=0x10000
>> later.
>>> I really don't want to keep adding PCD endlessly in the future, like
>> PcdSevXXXIsEnabled, PcdSevYYYIsEnabled, PcdTdxIsEnabled,
>> PcdTdx20Enabled, PcdTdx30Enabled, ......
> I also have some suggestions.
>
> As we have below definition in WorkArea.h
> typedef struct _CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER {
> UINT8 GuestType;
> UINT8 Reserved1[3];
> } CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER;
>
> Can we update above CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER to below:
> typedef struct _CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER {
> UINT8 GuestType;
> UINT8 SubType; // subtype which indicates SEV-ES, SEV-NP, or TDX 1.0, TDX 2.0 etc.
> UINT8 Reserved1[2];
> } CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER;
>
> The PcdConfidentialComputingCategory can be defined as UINT32, like below:
> ## This dynamic PCD indicates the Confidential Computing Category
> # [7:0] Confidential Computing Category (0 - Non-Cc, 1 - AmdSev, 2 - IntelTdx)
> # [15:8] Sub-Category (defined by each vendor, SEV-ES, SEV-SNP, or TDX-1.0, TDX-2.0, etc)
> # [31:16] Reserved
> # @Prompt Confidential Computing Category
> gUefiCpuPkgTokenSpaceGuid.PcdConfidentialComputingCategory|0|UINT32|0x60000018
>
> So that we simply copy the CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER to PcdConfidentialComputingCategory.
> What's your thought?
I am not sure if its a good idea to pack a header like above in a 32-bit
PCD. The caller need to unpack the 32-bit number and perform a bitshit
etc. Additionally we also need to check for reserved bits being set to
zero etc. I am more inclined toward something like this:
enum {
/* The guest is running with memory encryption disabled. */
CC_ATTR_UNDEF,
/* The guest is running with active AMD SEV memory encryption. */
CC_ATTR_AMD_SEV,
/* The guest is running with active AMD SEV-ES memory encryption. */
CC_ATTR_AMD_SEV_ES,
/* The guest is running with active AMD SEV-SNP memory encryption. */
CC_ATTR_AMD_SEV_SNP,
/* The guest is running with active Intel TDX memory encryption. */
CC_ATTR_INTEL_TDX,
/* The guest is running with active Intel SGX memory encryption. */
CC_ATTR_INTEL_SGX,
} ConfidentialComputingAttr;
The PcdConfidentialComputingAttr will be set to zero. The OVMF will set
this dynamic PCD in PEI phase. The UefiCpuPkg will provide a new
function that can be used by anyone to check the CC guest type.
BOOLEAN
CcPlatformHas(enum ConfidentialComputingAttr attr)
{
UINT32 Val;
Val = PcdGet32 (PcdConfidentialComputingAttr);
return val == attr;
}
> Thanks!
> Min
next prev parent reply other threads:[~2021-09-09 10:51 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-01 16:16 [PATCH v6 00/29] Add AMD Secure Nested Paging (SEV-SNP) support Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 01/29] OvmfPkg: reserve SNP secrets page Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 02/29] OvmfPkg: reserve CPUID page for SEV-SNP Brijesh Singh
2021-09-02 8:04 ` Gerd Hoffmann
2021-09-02 12:28 ` Brijesh Singh
2021-09-02 21:17 ` Brijesh Singh
2021-09-03 6:28 ` Gerd Hoffmann
2021-09-03 11:56 ` [edk2-devel] " Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 03/29] OvmfPkg/ResetVector: introduce SEV-SNP boot block GUID Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 04/29] OvmfPkg/ResetVector: invalidate the GHCB page Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 05/29] OvmfPkg/ResetVector: check the vmpl level Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 06/29] OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase Brijesh Singh
2021-09-02 8:20 ` Gerd Hoffmann
2021-09-06 1:10 ` [edk2-devel] " Min Xu
2021-09-06 12:16 ` Gerd Hoffmann
2021-09-06 13:19 ` Min Xu
2021-09-07 7:07 ` Gerd Hoffmann
2021-09-07 13:27 ` Brijesh Singh
2021-09-08 6:36 ` Min Xu
2021-09-14 3:49 ` Yao, Jiewen
2021-09-16 7:42 ` Gerd Hoffmann
2021-09-01 16:16 ` [PATCH v6 07/29] OvmfPkg/ResetVector: use SEV-SNP-validated CPUID values Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 08/29] UefiCpuPkg: Define the SEV-SNP specific dynamic PCDs Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 09/29] OvmfPkg/MemEncryptSevLib: add MemEncryptSevSnpEnabled() Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 10/29] OvmfPkg/SecMain: move SEV specific routines in AmdSev.c Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 11/29] OvmfPkg/SecMain: register GHCB gpa for the SEV-SNP guest Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 12/29] OvmfPkg/VmgExitLib: use SEV-SNP-validated CPUID values Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 13/29] OvmfPkg/PlatformPei: register GHCB gpa for the SEV-SNP guest Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 14/29] OvmfPkg/AmdSevDxe: do not use extended PCI config space Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 15/29] OvmfPkg/MemEncryptSevLib: add support to validate system RAM Brijesh Singh
2021-09-02 9:50 ` Gerd Hoffmann
2021-09-02 13:34 ` Brijesh Singh
2021-09-03 7:04 ` Gerd Hoffmann
2021-09-01 16:16 ` [PATCH v6 16/29] OvmfPkg/BaseMemEncryptSevLib: skip the pre-validated " Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 17/29] OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 18/29] OvmfPkg/SecMain: pre-validate the memory used for decompressing Fv Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 19/29] OvmfPkg/PlatformPei: validate the system RAM when SNP is active Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 20/29] OvmfPkg/PlatformPei: set the SEV-SNP enabled PCD Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 21/29] OvmfPkg/PlatformPei: set the Hypervisor Features PCD Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 22/29] MdePkg/GHCB: increase the GHCB protocol max version Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 23/29] UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 24/29] UefiCpuPkg/MpInitLib: use BSP to do extended topology check Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 25/29] OvmfPkg/MemEncryptSevLib: change the page state in the RMP table Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 26/29] OvmfPkg/MemEncryptSevLib: skip page state change for Mmio address Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 27/29] OvmfPkg/PlatformPei: mark cpuid and secrets memory reserved in EFI map Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 28/29] OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table Brijesh Singh
2021-09-01 16:16 ` [PATCH v6 29/29] UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs Brijesh Singh
2021-09-07 2:36 ` [PATCH v6 00/29] Add AMD Secure Nested Paging (SEV-SNP) support Yao, Jiewen
2021-09-08 2:29 ` Min Xu
2021-09-08 6:03 ` Yao, Jiewen
2021-09-08 19:45 ` Brijesh Singh
2021-09-09 0:31 ` Min Xu
2021-09-09 10:51 ` Brijesh Singh [this message]
2021-09-09 11:22 ` Gerd Hoffmann
2021-09-09 11:40 ` Brijesh Singh
2021-09-09 11:45 ` [edk2-devel] " Min Xu
2021-09-09 11:55 ` Yao, Jiewen
2021-09-12 22:55 ` Brijesh Singh
2021-09-13 0:33 ` Yao, Jiewen
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