* [PATCH v2 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 2/8] OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg Wu, Hao A
` (7 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit copies the exact 8259InterruptControllerDxe driver from
PcAtChipsetPkg to OvmfPkg.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/8259InterruptControllerDxe/8259.inf | 46 ++
OvmfPkg/8259InterruptControllerDxe/8259.h | 220 +++++++
OvmfPkg/8259InterruptControllerDxe/8259.c | 622 ++++++++++++++++++++
OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni | 16 +
| 14 +
5 files changed, 918 insertions(+)
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
new file mode 100644
index 0000000000..530596a36c
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
@@ -0,0 +1,46 @@
+## @file
+# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
+#
+# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = Legacy8259
+ MODULE_UNI_FILE = Legacy8259.uni
+ FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = Install8259
+
+[Sources]
+ 8259.c
+ 8259.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+ PcAtChipsetPkg/PcAtChipsetPkg.dec
+
+[LibraryClasses]
+ UefiBootServicesTableLib
+ DebugLib
+ UefiDriverEntryPoint
+ IoLib
+ PcdLib
+
+[Protocols]
+ gEfiLegacy8259ProtocolGuid ## PRODUCES
+ gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
+
+[Pcd]
+ gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
+ gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
+
+[Depex]
+ TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ Legacy8259Extra.uni
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
new file mode 100644
index 0000000000..a874e11fb4
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
@@ -0,0 +1,220 @@
+/** @file
+ Driver implementing the Tiano Legacy 8259 Protocol
+
+Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _8259_H__
+#define _8259_H__
+
+#include <FrameworkDxe.h>
+
+#include <Protocol/Legacy8259.h>
+#include <Protocol/PciIo.h>
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+
+#include <IndustryStandard/Pci.h>
+
+// 8259 Hardware definitions
+
+#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08
+#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70
+
+#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68
+#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
+
+#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20
+#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
+#define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0
+#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
+#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0
+#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1
+
+#define LEGACY_8259_EOI 0x20
+
+// Protocol Function Prototypes
+
+/**
+ Sets the base address for the 8259 master and slave PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
+ @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetVectorBase (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ );
+
+/**
+ Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Sets the mode of the PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Mode 16-bit real or 32-bit protected mode.
+ @param[in] Mask The value with which to set the interrupt mask.
+ @param[in] EdgeLevel The value with which to set the edge/level mask.
+
+ @retval EFI_SUCCESS The mode was set successfully.
+ @retval EFI_INVALID_PARAMETER The mode was not set.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMode (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ );
+
+/**
+ Translates the IRQ into a vector.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[out] Vector The vector that is assigned to the IRQ.
+
+ @retval EFI_SUCCESS The Vector that matches Irq was returned.
+ @retval EFI_INVALID_PARAMETER Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetVector (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Enables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EnableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ );
+
+/**
+ Disables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259DisableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ Reads the PCI configuration space to get the interrupt number that is assigned to the card.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] PciHandle PCI function for which to return the vector.
+ @param[out] Vector IRQ number that corresponds to the interrupt line.
+
+ @retval EFI_SUCCESS The interrupt line value was read successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetInterruptLine (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Issues the End of Interrupt (EOI) commands to PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq The interrupt for which to issue the EOI command.
+
+ @retval EFI_SUCCESS The EOI command was issued.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EndOfInterrupt (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+#endif
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.c b/OvmfPkg/8259InterruptControllerDxe/8259.c
new file mode 100644
index 0000000000..1c2ac1039d
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.c
@@ -0,0 +1,622 @@
+/** @file
+ This contains the installation function for the driver.
+
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "8259.h"
+
+//
+// Global for the Legacy 8259 Protocol that is produced by this driver
+//
+EFI_LEGACY_8259_PROTOCOL mInterrupt8259 = {
+ Interrupt8259SetVectorBase,
+ Interrupt8259GetMask,
+ Interrupt8259SetMask,
+ Interrupt8259SetMode,
+ Interrupt8259GetVector,
+ Interrupt8259EnableIrq,
+ Interrupt8259DisableIrq,
+ Interrupt8259GetInterruptLine,
+ Interrupt8259EndOfInterrupt
+};
+
+//
+// Global for the handle that the Legacy 8259 Protocol is installed
+//
+EFI_HANDLE m8259Handle = NULL;
+
+UINT8 mMasterBase = 0xff;
+UINT8 mSlaveBase = 0xff;
+EFI_8259_MODE mMode = Efi8259ProtectedMode;
+UINT16 mProtectedModeMask = 0xffff;
+UINT16 mLegacyModeMask;
+UINT16 mProtectedModeEdgeLevel = 0x0000;
+UINT16 mLegacyModeEdgeLevel;
+
+//
+// Worker Functions
+//
+
+/**
+ Write to mask and edge/level triggered registers of master and slave PICs.
+
+ @param[in] Mask low byte for master PIC mask register,
+ high byte for slave PIC mask register.
+ @param[in] EdgeLevel low byte for master PIC edge/level triggered register,
+ high byte for slave PIC edge/level triggered register.
+
+**/
+VOID
+Interrupt8259WriteMask (
+ IN UINT16 Mask,
+ IN UINT16 EdgeLevel
+ )
+{
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8) Mask);
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8) (Mask >> 8));
+ IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8) EdgeLevel);
+ IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8) (EdgeLevel >> 8));
+}
+
+/**
+ Read from mask and edge/level triggered registers of master and slave PICs.
+
+ @param[out] Mask low byte for master PIC mask register,
+ high byte for slave PIC mask register.
+ @param[out] EdgeLevel low byte for master PIC edge/level triggered register,
+ high byte for slave PIC edge/level triggered register.
+
+**/
+VOID
+Interrupt8259ReadMask (
+ OUT UINT16 *Mask,
+ OUT UINT16 *EdgeLevel
+ )
+{
+ UINT16 MasterValue;
+ UINT16 SlaveValue;
+
+ if (Mask != NULL) {
+ MasterValue = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
+ SlaveValue = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
+
+ *Mask = (UINT16) (MasterValue | (SlaveValue << 8));
+ }
+
+ if (EdgeLevel != NULL) {
+ MasterValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER);
+ SlaveValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE);
+
+ *EdgeLevel = (UINT16) (MasterValue | (SlaveValue << 8));
+ }
+}
+
+//
+// Legacy 8259 Protocol Interface Functions
+//
+
+/**
+ Sets the base address for the 8259 master and slave PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
+ @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetVectorBase (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ )
+{
+ UINT8 Mask;
+ EFI_TPL OriginalTpl;
+
+ OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ //
+ // Set vector base for slave PIC
+ //
+ if (SlaveBase != mSlaveBase) {
+ mSlaveBase = SlaveBase;
+
+ //
+ // Initialization sequence is needed for setting vector base.
+ //
+
+ //
+ // Preserve interrtup mask register before initialization sequence
+ // because it will be cleared during initialization
+ //
+ Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
+
+ //
+ // ICW1: cascade mode, ICW4 write required
+ //
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x11);
+
+ //
+ // ICW2: new vector base (must be multiple of 8)
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, mSlaveBase);
+
+ //
+ // ICW3: slave indentification code must be 2
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x02);
+
+ //
+ // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x01);
+
+ //
+ // Restore interrupt mask register
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, Mask);
+ }
+
+ //
+ // Set vector base for master PIC
+ //
+ if (MasterBase != mMasterBase) {
+ mMasterBase = MasterBase;
+
+ //
+ // Initialization sequence is needed for setting vector base.
+ //
+
+ //
+ // Preserve interrtup mask register before initialization sequence
+ // because it will be cleared during initialization
+ //
+ Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
+
+ //
+ // ICW1: cascade mode, ICW4 write required
+ //
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x11);
+
+ //
+ // ICW2: new vector base (must be multiple of 8)
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, mMasterBase);
+
+ //
+ // ICW3: slave PIC is cascaded on IRQ2
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x04);
+
+ //
+ // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x01);
+
+ //
+ // Restore interrupt mask register
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);
+ }
+
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
+
+ gBS->RestoreTPL (OriginalTpl);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ )
+{
+ if (LegacyMask != NULL) {
+ *LegacyMask = mLegacyModeMask;
+ }
+
+ if (LegacyEdgeLevel != NULL) {
+ *LegacyEdgeLevel = mLegacyModeEdgeLevel;
+ }
+
+ if (ProtectedMask != NULL) {
+ *ProtectedMask = mProtectedModeMask;
+ }
+
+ if (ProtectedEdgeLevel != NULL) {
+ *ProtectedEdgeLevel = mProtectedModeEdgeLevel;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ )
+{
+ if (LegacyMask != NULL) {
+ mLegacyModeMask = *LegacyMask;
+ }
+
+ if (LegacyEdgeLevel != NULL) {
+ mLegacyModeEdgeLevel = *LegacyEdgeLevel;
+ }
+
+ if (ProtectedMask != NULL) {
+ mProtectedModeMask = *ProtectedMask;
+ }
+
+ if (ProtectedEdgeLevel != NULL) {
+ mProtectedModeEdgeLevel = *ProtectedEdgeLevel;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets the mode of the PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Mode 16-bit real or 32-bit protected mode.
+ @param[in] Mask The value with which to set the interrupt mask.
+ @param[in] EdgeLevel The value with which to set the edge/level mask.
+
+ @retval EFI_SUCCESS The mode was set successfully.
+ @retval EFI_INVALID_PARAMETER The mode was not set.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMode (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ )
+{
+ if (Mode == mMode) {
+ return EFI_SUCCESS;
+ }
+
+ if (Mode == Efi8259LegacyMode) {
+ //
+ // In Efi8259ProtectedMode, mask and edge/level trigger registers should
+ // be changed through this protocol, so we can track them in the
+ // corresponding module variables.
+ //
+ Interrupt8259ReadMask (&mProtectedModeMask, &mProtectedModeEdgeLevel);
+
+ if (Mask != NULL) {
+ //
+ // Update the Mask for the new mode
+ //
+ mLegacyModeMask = *Mask;
+ }
+
+ if (EdgeLevel != NULL) {
+ //
+ // Update the Edge/Level triggered mask for the new mode
+ //
+ mLegacyModeEdgeLevel = *EdgeLevel;
+ }
+
+ mMode = Mode;
+
+ //
+ // Write new legacy mode mask/trigger level
+ //
+ Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);
+
+ return EFI_SUCCESS;
+ }
+
+ if (Mode == Efi8259ProtectedMode) {
+ //
+ // Save the legacy mode mask/trigger level
+ //
+ Interrupt8259ReadMask (&mLegacyModeMask, &mLegacyModeEdgeLevel);
+ //
+ // Always force Timer to be enabled after return from 16-bit code.
+ // This always insures that on next entry, timer is counting.
+ //
+ mLegacyModeMask &= 0xFFFE;
+
+ if (Mask != NULL) {
+ //
+ // Update the Mask for the new mode
+ //
+ mProtectedModeMask = *Mask;
+ }
+
+ if (EdgeLevel != NULL) {
+ //
+ // Update the Edge/Level triggered mask for the new mode
+ //
+ mProtectedModeEdgeLevel = *EdgeLevel;
+ }
+
+ mMode = Mode;
+
+ //
+ // Write new protected mode mask/trigger level
+ //
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ return EFI_SUCCESS;
+ }
+
+ return EFI_INVALID_PARAMETER;
+}
+
+/**
+ Translates the IRQ into a vector.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[out] Vector The vector that is assigned to the IRQ.
+
+ @retval EFI_SUCCESS The Vector that matches Irq was returned.
+ @retval EFI_INVALID_PARAMETER Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetVector (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (Irq <= Efi8259Irq7) {
+ *Vector = (UINT8) (mMasterBase + Irq);
+ } else {
+ *Vector = (UINT8) (mSlaveBase + (Irq - Efi8259Irq8));
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Enables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EnableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ mProtectedModeMask = (UINT16) (mProtectedModeMask & ~(1 << Irq));
+ if (LevelTriggered) {
+ mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel | (1 << Irq));
+ } else {
+ mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
+ }
+
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Disables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259DisableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ mProtectedModeMask = (UINT16) (mProtectedModeMask | (1 << Irq));
+
+ mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
+
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Reads the PCI configuration space to get the interrupt number that is assigned to the card.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] PciHandle PCI function for which to return the vector.
+ @param[out] Vector IRQ number that corresponds to the interrupt line.
+
+ @retval EFI_SUCCESS The interrupt line value was read successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetInterruptLine (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ )
+{
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 InterruptLine;
+ EFI_STATUS Status;
+
+ Status = gBS->HandleProtocol (
+ PciHandle,
+ &gEfiPciIoProtocolGuid,
+ (VOID **) &PciIo
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint8,
+ PCI_INT_LINE_OFFSET,
+ 1,
+ &InterruptLine
+ );
+ //
+ // Interrupt line is same location for standard PCI cards, standard
+ // bridge and CardBus bridge.
+ //
+ *Vector = InterruptLine;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Issues the End of Interrupt (EOI) commands to PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq The interrupt for which to issue the EOI command.
+
+ @retval EFI_SUCCESS The EOI command was issued.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EndOfInterrupt (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (Irq >= Efi8259Irq8) {
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
+ }
+
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Driver Entry point.
+
+ @param[in] ImageHandle ImageHandle of the loaded driver.
+ @param[in] SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCCESS Error installing Legacy 8259 Protocol.
+
+**/
+EFI_STATUS
+EFIAPI
+Install8259 (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_8259_IRQ Irq;
+
+ //
+ // Initialze mask values from PCDs
+ //
+ mLegacyModeMask = PcdGet16 (Pcd8259LegacyModeMask);
+ mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);
+
+ //
+ // Clear all pending interrupt
+ //
+ for (Irq = Efi8259Irq0; Irq <= Efi8259Irq15; Irq++) {
+ Interrupt8259EndOfInterrupt (&mInterrupt8259, Irq);
+ }
+
+ //
+ // Set the 8259 Master base to 0x68 and the 8259 Slave base to 0x70
+ //
+ Status = Interrupt8259SetVectorBase (&mInterrupt8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);
+
+ //
+ // Set all 8259 interrupts to edge triggered and disabled
+ //
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ //
+ // Install 8259 Protocol onto a new handle
+ //
+ Status = gBS->InstallProtocolInterface (
+ &m8259Handle,
+ &gEfiLegacy8259ProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &mInterrupt8259
+ );
+ return Status;
+}
diff --git a/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni b/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
new file mode 100644
index 0000000000..d035292419
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
@@ -0,0 +1,16 @@
+// /** @file
+// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
+//
+// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
+//
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol"
+
+#string STR_MODULE_DESCRIPTION #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol."
+
--git a/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni b/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
new file mode 100644
index 0000000000..ee43f6923c
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Legacy8259 Localized Strings and Content
+//
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_PROPERTIES_MODULE_NAME
+#language en-US
+"Legacy 8259 Interrupt Controller DXE Driver"
+
+
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 2/8] OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file Wu, Hao A
` (6 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit copies the exact Legacy8259 protocol header file from
IntelFrameworkPkg to OvmfPkg. Also, the protocol GUID definition is
duplicated in the OvmfPkg DEC file.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/OvmfPkg.dec | 3 +-
OvmfPkg/Include/Protocol/Legacy8259.h | 291 ++++++++++++++++++++
2 files changed, 293 insertions(+), 1 deletion(-)
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 54c1ee6b09..d59508db56 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -1,7 +1,7 @@
## @file
# EFI/Framework Open Virtual Machine Firmware (OVMF) platform
#
-# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -83,6 +83,7 @@ [Protocols]
gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
+ gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
[PcdsFixedAtBuild]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
diff --git a/OvmfPkg/Include/Protocol/Legacy8259.h b/OvmfPkg/Include/Protocol/Legacy8259.h
new file mode 100644
index 0000000000..74bbb674ed
--- /dev/null
+++ b/OvmfPkg/Include/Protocol/Legacy8259.h
@@ -0,0 +1,291 @@
+/** @file
+ This protocol abstracts the 8259 interrupt controller. This includes
+ PCI IRQ routing needed to program the PCI Interrupt Line register.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_8259_H_
+#define _EFI_LEGACY_8259_H_
+
+
+#define EFI_LEGACY_8259_PROTOCOL_GUID \
+ { \
+ 0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \
+ }
+
+typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;
+
+typedef enum {
+ Efi8259Irq0,
+ Efi8259Irq1,
+ Efi8259Irq2,
+ Efi8259Irq3,
+ Efi8259Irq4,
+ Efi8259Irq5,
+ Efi8259Irq6,
+ Efi8259Irq7,
+ Efi8259Irq8,
+ Efi8259Irq9,
+ Efi8259Irq10,
+ Efi8259Irq11,
+ Efi8259Irq12,
+ Efi8259Irq13,
+ Efi8259Irq14,
+ Efi8259Irq15,
+ Efi8259IrqMax
+} EFI_8259_IRQ;
+
+typedef enum {
+ Efi8259LegacyMode,
+ Efi8259ProtectedMode,
+ Efi8259MaxMode
+} EFI_8259_MODE;
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This The protocol instance pointer.
+ @param MasterBase The base vector for the Master PIC in the 8259 controller.
+ @param SlaveBase The base vector for the Slave PIC in the 8259 controller.
+
+ @retval EFI_SUCCESS The new bases were programmed.
+ @retval EFI_DEVICE_ERROR A device error occured programming the vector bases.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ );
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This The protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+
+ @retval EFI_SUCCESS 8259 status returned.
+ @retval EFI_DEVICE_ERROR Error reading 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_MASK)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+ Also set the edge/level masks.
+
+ @param This The protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+
+ @retval EFI_SUCCESS 8259 status returned.
+ @retval EFI_DEVICE_ERROR Error writing 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MASK)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 mode of operation. The base address for the 8259 is different for
+ legacy and protected mode. The legacy mode requires the master 8259 to have a
+ master base of 0x08 and the slave base of 0x70. The protected mode base locations
+ are not defined. Interrupts must be masked by the caller before this function
+ is called. The interrupt mask from the current mode is saved. The interrupt
+ mask for the new mode is Mask, or if Mask does not exist the previously saved
+ mask is used.
+
+ @param This The protocol instance pointer.
+ @param Mode The mode of operation. i.e. the real mode or protected mode.
+ @param Mask Optional interupt mask for the new mode.
+ @param EdgeLevel Optional trigger mask for the new mode.
+
+ @retval EFI_SUCCESS 8259 programmed.
+ @retval EFI_DEVICE_ERROR Error writing to 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MODE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ );
+
+/**
+ Convert from IRQ to processor interrupt vector number.
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+ @param Vector The processor vector number that matches an Irq.
+
+ @retval EFI_SUCCESS The Vector matching Irq is returned.
+ @retval EFI_INVALID_PARAMETER The Irq not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Enable Irq by unmasking interrupt in 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+ @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on 8259.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ );
+
+/**
+ Disable Irq by masking interrupt in 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on 8259.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ PciHandle represents a PCI config space of a PCI function. Vector
+ represents Interrupt Pin (from PCI config space) and it is the data
+ that is programmed into the Interrupt Line (from the PCI config space)
+ register.
+
+ @param This The protocol instance pointer.
+ @param PciHandle The PCI function to return the vector for.
+ @param Vector The vector for the function it matches.
+
+ @retval EFI_SUCCESS A valid Vector was returned.
+ @retval EFI_INVALID_PARAMETER PciHandle not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Send an EOI to 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+
+ @retval EFI_SUCCESS EOI was successfully sent to 8259.
+ @retval EFI_INVALID_PARAMETER The Irq isnot valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the 8259 and APIC hardware control between EFI usage and
+ Compatibility16 usage.
+
+ @param SetVectorBase
+ Sets the vector bases for master and slave PICs.
+
+ @param GetMask
+ Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMask
+ Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMode
+ Sets PIC mode to 16-bit real mode or 32-bit protected mode.
+
+ @param GetVector
+ Gets the base vector assigned to an IRQ.
+
+ @param EnableIrq
+ Enables an IRQ.
+
+ @param DisableIrq
+ Disables an IRQ.
+
+ @param GetInterruptLine
+ Gets an IRQ that is assigned to a PCI device.
+
+ @param EndOfInterrupt
+ Issues the end of interrupt command.
+
+**/
+struct _EFI_LEGACY_8259_PROTOCOL {
+ EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;
+ EFI_LEGACY_8259_GET_MASK GetMask;
+ EFI_LEGACY_8259_SET_MASK SetMask;
+ EFI_LEGACY_8259_SET_MODE SetMode;
+ EFI_LEGACY_8259_GET_VECTOR GetVector;
+ EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;
+ EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;
+ EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;
+ EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;
+};
+
+extern EFI_GUID gEfiLegacy8259ProtocolGuid;
+
+#endif
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 2/8] OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 16:16 ` [edk2-devel] " Laszlo Ersek
2019-04-10 1:06 ` [PATCH v2 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF Wu, Hao A
` (5 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
According to the DEC file in PcAtChipsetPkg, this commit adds the two
8259-driver-related PCDs into the OvmfPkg DEC file.
Please note that, instead of adding the two PCDs under section:
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
as in PcAtChipsetPkg.dec file, they are added in section:
[PcdsFixedAtBuild]
in OvmfPkg.dec instead.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/OvmfPkg.dec | 26 ++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index d59508db56..cc2a4909af 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -122,6 +122,32 @@ [PcdsFixedAtBuild]
gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
+ ## Pcd8259LegacyModeMask defines the default mask value for platform. This
+ # value is determined.
+ # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
+ # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
+ # UEFI platform.
+ # 2) If platform install CSM and use thunk module:
+ # a) If thunk call provided by CSM binary requires some legacy interrupt
+ # support, the corresponding bit should be opened as 0.
+ # For example, if keyboard interfaces provided CSM binary use legacy
+ # keyboard interrupt in 8259 bit 1, then the value should be set to
+ # 0xFFFC.
+ # b) If all thunk call provied by CSM binary do not require legacy
+ # interrupt support, value should be set to 0xFFFF or 0xFFFE.
+ #
+ # The default value of legacy mode mask could be changed by
+ # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
+ # except some special cases such as when initializing the CSM binary, it
+ # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
+ # original legacy mask value if changing is made for these special case.
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
+
+ ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
+ # mode's interrrupt controller.
+ # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
+
[PcdsDynamic, PcdsDynamicEx]
gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [edk2-devel] [PATCH v2 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
2019-04-10 1:06 ` [PATCH v2 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file Wu, Hao A
@ 2019-04-10 16:16 ` Laszlo Ersek
0 siblings, 0 replies; 14+ messages in thread
From: Laszlo Ersek @ 2019-04-10 16:16 UTC (permalink / raw)
To: devel, hao.a.wu; +Cc: Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
On 04/10/19 03:06, Wu, Hao A wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> According to the DEC file in PcAtChipsetPkg, this commit adds the two
> 8259-driver-related PCDs into the OvmfPkg DEC file.
>
> Please note that, instead of adding the two PCDs under section:
> [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
>
> as in PcAtChipsetPkg.dec file, they are added in section:
> [PcdsFixedAtBuild]
>
> in OvmfPkg.dec instead.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> ---
> OvmfPkg/OvmfPkg.dec | 26 ++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> index d59508db56..cc2a4909af 100644
> --- a/OvmfPkg/OvmfPkg.dec
> +++ b/OvmfPkg/OvmfPkg.dec
> @@ -122,6 +122,32 @@ [PcdsFixedAtBuild]
> gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
>
> + ## Pcd8259LegacyModeMask defines the default mask value for platform. This
> + # value is determined.
> + # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
> + # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
> + # UEFI platform.
> + # 2) If platform install CSM and use thunk module:
> + # a) If thunk call provided by CSM binary requires some legacy interrupt
> + # support, the corresponding bit should be opened as 0.
> + # For example, if keyboard interfaces provided CSM binary use legacy
> + # keyboard interrupt in 8259 bit 1, then the value should be set to
> + # 0xFFFC.
> + # b) If all thunk call provied by CSM binary do not require legacy
> + # interrupt support, value should be set to 0xFFFF or 0xFFFE.
> + #
> + # The default value of legacy mode mask could be changed by
> + # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
> + # except some special cases such as when initializing the CSM binary, it
> + # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
> + # original legacy mask value if changing is made for these special case.
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
> +
> + ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
> + # mode's interrrupt controller.
> + # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
> +
> [PcdsDynamic, PcdsDynamicEx]
> gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
>
Thanks for addressing my v1 comments! My R-b stands.
Laszlo
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
` (2 preceding siblings ...)
2019-04-10 1:06 ` [PATCH v2 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 16:19 ` [edk2-devel] " Laszlo Ersek
2019-04-10 1:06 ` [PATCH v2 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg Wu, Hao A
` (4 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
Several updates have been made to the
OvmfPkg/8259InterruptControllerDxe driver to make it build under OvmfPkg:
A) Update the driver INF file to consume PCDs defined within OvmfPkg;
B) Remove the unnecessary dependency on the IntelFrameworkPkg header file
'FrameworkDxe.h';
C) Remove the IntelFrameworkPkg & PcAtChipsetPkg DEC files dependency in
the driver INF file.
A new GUID has been updated for the INF file.
Corresponding changes have been made in OVMF DSC files as well in order to
verify the build.
Please note that a subsequent commit (final patch of the series) will:
A) Add OvmfPkg/8259InterruptControllerDxe driver in OVMF FDF files;
B) Remove the consumption of PcAtChipsetPkg/8259InterruptControllerDxe
driver in OVMF DSC/FDF files;
C) Remove the consumption of
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel in OVMF DSC
files.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/OvmfPkgIa32.dsc | 2 ++
OvmfPkg/OvmfPkgIa32X64.dsc | 2 ++
OvmfPkg/OvmfPkgX64.dsc | 2 ++
OvmfPkg/8259InterruptControllerDxe/8259.inf | 11 +++++------
OvmfPkg/8259InterruptControllerDxe/8259.h | 4 +---
5 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 2612c6fd89..feb8bc9b92 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -511,6 +511,7 @@ [PcdsFixedAtBuild]
# IRQs 5, 9, 10, 11 are level-triggered
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -663,6 +664,7 @@ [Components]
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+ OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 02308c01c5..993da3197c 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -517,6 +517,7 @@ [PcdsFixedAtBuild.X64]
# IRQs 5, 9, 10, 11 are level-triggered
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -672,6 +673,7 @@ [Components.X64]
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+ OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 505a46bb0b..65aab4f711 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -516,6 +516,7 @@ [PcdsFixedAtBuild]
# IRQs 5, 9, 10, 11 are level-triggered
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -670,6 +671,7 @@ [Components]
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+ OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
index 530596a36c..7320ff2490 100644
--- a/OvmfPkg/8259InterruptControllerDxe/8259.inf
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
@@ -1,7 +1,7 @@
## @file
# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
#
-# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -10,7 +10,7 @@ [Defines]
INF_VERSION = 0x00010005
BASE_NAME = Legacy8259
MODULE_UNI_FILE = Legacy8259.uni
- FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
+ FILE_GUID = 245CB4DA-8E15-4A1B-87E3-9878FFA07520
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = Install8259
@@ -21,8 +21,7 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
- IntelFrameworkPkg/IntelFrameworkPkg.dec
- PcAtChipsetPkg/PcAtChipsetPkg.dec
+ OvmfPkg/OvmfPkg.dec
[LibraryClasses]
UefiBootServicesTableLib
@@ -36,8 +35,8 @@ [Protocols]
gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
[Pcd]
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
[Depex]
TRUE
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
index a874e11fb4..a9673f9c87 100644
--- a/OvmfPkg/8259InterruptControllerDxe/8259.h
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
@@ -1,7 +1,7 @@
/** @file
Driver implementing the Tiano Legacy 8259 Protocol
-Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -9,8 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _8259_H__
#define _8259_H__
-#include <FrameworkDxe.h>
-
#include <Protocol/Legacy8259.h>
#include <Protocol/PciIo.h>
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [edk2-devel] [PATCH v2 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
2019-04-10 1:06 ` [PATCH v2 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF Wu, Hao A
@ 2019-04-10 16:19 ` Laszlo Ersek
0 siblings, 0 replies; 14+ messages in thread
From: Laszlo Ersek @ 2019-04-10 16:19 UTC (permalink / raw)
To: devel, hao.a.wu; +Cc: Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
On 04/10/19 03:06, Wu, Hao A wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> Several updates have been made to the
> OvmfPkg/8259InterruptControllerDxe driver to make it build under OvmfPkg:
>
> A) Update the driver INF file to consume PCDs defined within OvmfPkg;
> B) Remove the unnecessary dependency on the IntelFrameworkPkg header file
> 'FrameworkDxe.h';
> C) Remove the IntelFrameworkPkg & PcAtChipsetPkg DEC files dependency in
> the driver INF file.
>
> A new GUID has been updated for the INF file.
>
> Corresponding changes have been made in OVMF DSC files as well in order to
> verify the build.
>
> Please note that a subsequent commit (final patch of the series) will:
>
> A) Add OvmfPkg/8259InterruptControllerDxe driver in OVMF FDF files;
> B) Remove the consumption of PcAtChipsetPkg/8259InterruptControllerDxe
> driver in OVMF DSC/FDF files;
> C) Remove the consumption of
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel in OVMF DSC
> files.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> ---
> OvmfPkg/OvmfPkgIa32.dsc | 2 ++
> OvmfPkg/OvmfPkgIa32X64.dsc | 2 ++
> OvmfPkg/OvmfPkgX64.dsc | 2 ++
> OvmfPkg/8259InterruptControllerDxe/8259.inf | 11 +++++------
> OvmfPkg/8259InterruptControllerDxe/8259.h | 4 +---
> 5 files changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index 2612c6fd89..feb8bc9b92 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -511,6 +511,7 @@ [PcdsFixedAtBuild]
>
> # IRQs 5, 9, 10, 11 are level-triggered
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> @@ -663,6 +664,7 @@ [Components]
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> + OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index 02308c01c5..993da3197c 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -517,6 +517,7 @@ [PcdsFixedAtBuild.X64]
>
> # IRQs 5, 9, 10, 11 are level-triggered
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> @@ -672,6 +673,7 @@ [Components.X64]
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> + OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 505a46bb0b..65aab4f711 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -516,6 +516,7 @@ [PcdsFixedAtBuild]
>
> # IRQs 5, 9, 10, 11 are level-triggered
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> @@ -670,6 +671,7 @@ [Components]
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> + OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> index 530596a36c..7320ff2490 100644
> --- a/OvmfPkg/8259InterruptControllerDxe/8259.inf
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> @@ -1,7 +1,7 @@
> ## @file
> # 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
> #
> -# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> ##
> @@ -10,7 +10,7 @@ [Defines]
> INF_VERSION = 0x00010005
> BASE_NAME = Legacy8259
> MODULE_UNI_FILE = Legacy8259.uni
> - FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
> + FILE_GUID = 245CB4DA-8E15-4A1B-87E3-9878FFA07520
> MODULE_TYPE = DXE_DRIVER
> VERSION_STRING = 1.0
> ENTRY_POINT = Install8259
> @@ -21,8 +21,7 @@ [Sources]
>
> [Packages]
> MdePkg/MdePkg.dec
> - IntelFrameworkPkg/IntelFrameworkPkg.dec
> - PcAtChipsetPkg/PcAtChipsetPkg.dec
> + OvmfPkg/OvmfPkg.dec
>
> [LibraryClasses]
> UefiBootServicesTableLib
> @@ -36,8 +35,8 @@ [Protocols]
> gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
>
> [Pcd]
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
>
> [Depex]
> TRUE
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
> index a874e11fb4..a9673f9c87 100644
> --- a/OvmfPkg/8259InterruptControllerDxe/8259.h
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
> @@ -1,7 +1,7 @@
> /** @file
> Driver implementing the Tiano Legacy 8259 Protocol
>
> -Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -9,8 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #ifndef _8259_H__
> #define _8259_H__
>
> -#include <FrameworkDxe.h>
> -
> #include <Protocol/Legacy8259.h>
> #include <Protocol/PciIo.h>
>
>
Thanks for the commit message update, patch looks good.
Laszlo
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
` (3 preceding siblings ...)
2019-04-10 1:06 ` [PATCH v2 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg Wu, Hao A
` (3 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
Several updates have been made to the OvmfPkg/AcpiPlatformDxe driver to
drop its dependency on PcAtChipsetPkg:
A) Consumes the PCD 'Pcd8259LegacyModeEdgeLevel' defined within OvmfPkg;
B) Remove the PcAtChipsetPkg DEC file dependency in the driver INF file.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
index cee4113a7b..24634eeae2 100644
--- a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
+++ b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -1,7 +1,7 @@
## @file
# OVMF ACPI Platform Driver
#
-# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -36,7 +36,6 @@ [Packages]
MdeModulePkg/MdeModulePkg.dec
OvmfPkg/OvmfPkg.dec
UefiCpuPkg/UefiCpuPkg.dec
- PcAtChipsetPkg/PcAtChipsetPkg.dec
[LibraryClasses]
UefiLib
@@ -66,7 +65,7 @@ [Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress
[Depex]
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
` (4 preceding siblings ...)
2019-04-10 1:06 ` [PATCH v2 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 1:06 ` [PATCH v2 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF Wu, Hao A
` (2 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit copies the exact 8254TimerDxe driver from PcAtChipsetPkg to
OvmfPkg.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/8254TimerDxe/8254Timer.inf | 42 ++
OvmfPkg/8254TimerDxe/Timer.h | 185 +++++++++
OvmfPkg/8254TimerDxe/Timer.c | 401 ++++++++++++++++++++
OvmfPkg/8254TimerDxe/Timer.uni | 16 +
| 14 +
5 files changed, 658 insertions(+)
diff --git a/OvmfPkg/8254TimerDxe/8254Timer.inf b/OvmfPkg/8254TimerDxe/8254Timer.inf
new file mode 100644
index 0000000000..751ed1c02c
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/8254Timer.inf
@@ -0,0 +1,42 @@
+## @file
+# 8254 timer driver that provides Timer Arch protocol.
+#
+# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = Timer
+ MODULE_UNI_FILE = Timer.uni
+ FILE_GUID = f2765dec-6b41-11d5-8e71-00902707b35e
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = TimerDriverInitialize
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ UefiBootServicesTableLib
+ BaseLib
+ DebugLib
+ UefiDriverEntryPoint
+ IoLib
+
+[Sources]
+ Timer.h
+ Timer.c
+
+[Protocols]
+ gEfiCpuArchProtocolGuid ## CONSUMES
+ gEfiLegacy8259ProtocolGuid ## CONSUMES
+ gEfiTimerArchProtocolGuid ## PRODUCES
+
+[Depex]
+ gEfiCpuArchProtocolGuid AND gEfiLegacy8259ProtocolGuid
+[UserExtensions.TianoCore."ExtraFiles"]
+ TimerExtra.uni
diff --git a/OvmfPkg/8254TimerDxe/Timer.h b/OvmfPkg/8254TimerDxe/Timer.h
new file mode 100644
index 0000000000..4c4b720d50
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/Timer.h
@@ -0,0 +1,185 @@
+/** @file
+ Private data structures
+
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _TIMER_H_
+#define _TIMER_H_
+
+#include <PiDxe.h>
+
+#include <Protocol/Cpu.h>
+#include <Protocol/Legacy8259.h>
+#include <Protocol/Timer.h>
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+
+//
+// The PCAT 8253/8254 has an input clock at 1.193182 MHz and Timer 0 is
+// initialized as a 16 bit free running counter that generates an interrupt(IRQ0)
+// each time the counter rolls over.
+//
+// 65536 counts
+// ---------------- * 1,000,000 uS/S = 54925.4 uS = 549254 * 100 ns
+// 1,193,182 Hz
+//
+
+//
+// The maximum tick duration for 8254 timer
+//
+#define MAX_TIMER_TICK_DURATION 549254
+//
+// The default timer tick duration is set to 10 ms = 100000 100 ns units
+//
+#define DEFAULT_TIMER_TICK_DURATION 100000
+#define TIMER_CONTROL_PORT 0x43
+#define TIMER0_COUNT_PORT 0x40
+
+//
+// Function Prototypes
+//
+/**
+ Initialize the Timer Architectural Protocol driver
+
+ @param ImageHandle ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Timer Architectural Protocol created
+ @retval EFI_OUT_OF_RESOURCES Not enough resources available to initialize driver.
+ @retval EFI_DEVICE_ERROR A device error occurred attempting to initialize the driver.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+;
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+ )
+;
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ )
+;
+
+/**
+
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+;
+
+/**
+
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+ @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ )
+;
+
+#endif
diff --git a/OvmfPkg/8254TimerDxe/Timer.c b/OvmfPkg/8254TimerDxe/Timer.c
new file mode 100644
index 0000000000..67e22f5da1
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/Timer.c
@@ -0,0 +1,401 @@
+/** @file
+ Timer Architectural Protocol as defined in the DXE CIS
+
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "Timer.h"
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+EFI_HANDLE mTimerHandle = NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL mTimer = {
+ TimerDriverRegisterHandler,
+ TimerDriverSetTimerPeriod,
+ TimerDriverGetTimerPeriod,
+ TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+//
+// Pointer to the Legacy 8259 Protocol instance
+//
+EFI_LEGACY_8259_PROTOCOL *mLegacy8259;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+EFI_TIMER_NOTIFY mTimerNotifyFunction;
+
+//
+// The current period of the timer interrupt
+//
+volatile UINT64 mTimerPeriod = 0;
+
+//
+// Worker Functions
+//
+/**
+ Sets the counter value for Timer #0 in a legacy 8254 timer.
+
+ @param Count The 16-bit counter value to program into Timer #0 of the legacy 8254 timer.
+**/
+VOID
+SetPitCount (
+ IN UINT16 Count
+ )
+{
+ IoWrite8 (TIMER_CONTROL_PORT, 0x36);
+ IoWrite8 (TIMER0_COUNT_PORT, (UINT8)(Count & 0xff));
+ IoWrite8 (TIMER0_COUNT_PORT, (UINT8)((Count >> 8) & 0xff));
+}
+
+/**
+ 8254 Timer #0 Interrupt Handler.
+
+ @param InterruptType The type of interrupt that occurred
+ @param SystemContext A pointer to the system context when the interrupt occurred
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ EFI_TPL OriginalTPL;
+
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ mLegacy8259->EndOfInterrupt (mLegacy8259, Efi8259Irq0);
+
+ if (mTimerNotifyFunction != NULL) {
+ //
+ // @bug : This does not handle missed timer interrupts
+ //
+ mTimerNotifyFunction (mTimerPeriod);
+ }
+
+ gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+
+ This function registers the handler NotifyFunction so it is called every time
+ the timer interrupt fires. It also passes the amount of time since the last
+ handler call to the NotifyFunction. If NotifyFunction is NULL, then the
+ handler is unregistered. If the handler is registered, then EFI_SUCCESS is
+ returned. If the CPU does not support registering a timer interrupt handler,
+ then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not registered,
+ then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
+ register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+ is returned.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The function to call when a timer interrupt fires. This
+ function executes at TPL_HIGH_LEVEL. The DXE Core will
+ register a handler for the timer interrupt, so it can know
+ how much time has passed. This information is used to
+ signal timer based events. NULL will unregister the handler.
+
+ @retval EFI_SUCCESS The timer handler was registered.
+ @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
+ @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
+ registered.
+ @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+ previously registered.
+ @retval EFI_DEVICE_ERROR The timer handler could not be registered.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+ )
+{
+ //
+ // Check for invalid parameters
+ //
+ if (NotifyFunction == NULL && mTimerNotifyFunction == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (NotifyFunction != NULL && mTimerNotifyFunction != NULL) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ mTimerNotifyFunction = NotifyFunction;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ )
+{
+ UINT64 TimerCount;
+
+ //
+ // The basic clock is 1.19318 MHz or 0.119318 ticks per 100 ns.
+ // TimerPeriod * 0.119318 = 8254 timer divisor. Using integer arithmetic
+ // TimerCount = (TimerPeriod * 119318)/1000000.
+ //
+ // Round up to next highest integer. This guarantees that the timer is
+ // equal to or slightly longer than the requested time.
+ // TimerCount = ((TimerPeriod * 119318) + 500000)/1000000
+ //
+ // Note that a TimerCount of 0 is equivalent to a count of 65,536
+ //
+ // Since TimerCount is limited to 16 bits for IA32, TimerPeriod is limited
+ // to 20 bits.
+ //
+ if (TimerPeriod == 0) {
+ //
+ // Disable timer interrupt for a TimerPeriod of 0
+ //
+ mLegacy8259->DisableIrq (mLegacy8259, Efi8259Irq0);
+ } else {
+
+ //
+ // Convert TimerPeriod into 8254 counts
+ //
+ TimerCount = DivU64x32 (MultU64x32 (119318, (UINT32) TimerPeriod) + 500000, 1000000);
+
+ //
+ // Check for overflow
+ //
+ if (TimerCount >= 65536) {
+ TimerCount = 0;
+ TimerPeriod = MAX_TIMER_TICK_DURATION;
+ }
+ //
+ // Program the 8254 timer with the new count value
+ //
+ SetPitCount ((UINT16) TimerCount);
+
+ //
+ // Enable timer interrupt
+ //
+ mLegacy8259->EnableIrq (mLegacy8259, Efi8259Irq0, FALSE);
+ }
+ //
+ // Save the new timer period
+ //
+ mTimerPeriod = TimerPeriod;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+{
+ if (TimerPeriod == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *TimerPeriod = mTimerPeriod;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+ @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ )
+{
+ EFI_STATUS Status;
+ UINT16 IRQMask;
+ EFI_TPL OriginalTPL;
+
+ //
+ // If the timer interrupt is enabled, then the registered handler will be invoked.
+ //
+ Status = mLegacy8259->GetMask (mLegacy8259, NULL, NULL, &IRQMask, NULL);
+ ASSERT_EFI_ERROR (Status);
+ if ((IRQMask & 0x1) == 0) {
+ //
+ // Invoke the registered handler
+ //
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ if (mTimerNotifyFunction != NULL) {
+ //
+ // @bug : This does not handle missed timer interrupts
+ //
+ mTimerNotifyFunction (mTimerPeriod);
+ }
+
+ gBS->RestoreTPL (OriginalTPL);
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Initialize the Timer Architectural Protocol driver
+
+ @param ImageHandle ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Timer Architectural Protocol created
+ @retval EFI_OUT_OF_RESOURCES Not enough resources available to initialize driver.
+ @retval EFI_DEVICE_ERROR A device error occurred attempting to initialize the driver.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT32 TimerVector;
+
+ //
+ // Initialize the pointer to our notify function.
+ //
+ mTimerNotifyFunction = NULL;
+
+ //
+ // Make sure the Timer Architectural Protocol is not already installed in the system
+ //
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiTimerArchProtocolGuid);
+
+ //
+ // Find the CPU architectural protocol.
+ //
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &mCpu);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Find the Legacy8259 protocol.
+ //
+ Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **) &mLegacy8259);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Force the timer to be disabled
+ //
+ Status = TimerDriverSetTimerPeriod (&mTimer, 0);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
+ //
+ TimerVector = 0;
+ Status = mLegacy8259->GetVector (mLegacy8259, Efi8259Irq0, (UINT8 *) &TimerVector);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Install interrupt handler for 8254 Timer #0 (ISA IRQ0)
+ //
+ Status = mCpu->RegisterInterruptHandler (mCpu, TimerVector, TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Force the timer to be enabled at its default period
+ //
+ Status = TimerDriverSetTimerPeriod (&mTimer, DEFAULT_TIMER_TICK_DURATION);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Install the Timer Architectural Protocol onto a new handle
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mTimerHandle,
+ &gEfiTimerArchProtocolGuid, &mTimer,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
diff --git a/OvmfPkg/8254TimerDxe/Timer.uni b/OvmfPkg/8254TimerDxe/Timer.uni
new file mode 100644
index 0000000000..7f3d35f4e1
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/Timer.uni
@@ -0,0 +1,16 @@
+// /** @file
+// 8254 timer driver that provides Timer Arch protocol.
+//
+// 8254 timer driver that provides Timer Arch protocol.
+//
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "8254 timer driver that provides Timer Arch protocol"
+
+#string STR_MODULE_DESCRIPTION #language en-US "8254 timer driver that provides Timer Arch protocol."
+
--git a/OvmfPkg/8254TimerDxe/TimerExtra.uni b/OvmfPkg/8254TimerDxe/TimerExtra.uni
new file mode 100644
index 0000000000..7a54767a45
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/TimerExtra.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Timer Localized Strings and Content
+//
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_PROPERTIES_MODULE_NAME
+#language en-US
+"8254 Timer DXE Driver"
+
+
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
` (5 preceding siblings ...)
2019-04-10 1:06 ` [PATCH v2 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 16:22 ` [edk2-devel] " Laszlo Ersek
2019-04-10 1:06 ` [PATCH v2 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg Wu, Hao A
2019-04-10 16:25 ` [PATCH v2 0/8] Duplicate 8259/8254 components " Laszlo Ersek
8 siblings, 1 reply; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit will remove the IntelFrameworkPkg DEC file dependency in the
driver INF file.
A new GUID has been updated for the INF file.
Corresponding changes have been made in OVMF DSC files as well in order to
verify the build.
Please note that a subsequent commit (final patch of the series) will:
A) Add OvmfPkg/8254TimerDxe driver in OVMF FDF files;
B) Remove the consumption of PcAtChipsetPkg/8254TimerDxe driver in OVMF
DSC/FDF files.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/OvmfPkgIa32.dsc | 1 +
OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
OvmfPkg/OvmfPkgX64.dsc | 1 +
OvmfPkg/8254TimerDxe/8254Timer.inf | 6 +++---
4 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index feb8bc9b92..888909d809 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -668,6 +668,7 @@ [Components]
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+ OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 993da3197c..1771c457f4 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -677,6 +677,7 @@ [Components.X64]
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+ OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 65aab4f711..dfe5781658 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -675,6 +675,7 @@ [Components]
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+ OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
diff --git a/OvmfPkg/8254TimerDxe/8254Timer.inf b/OvmfPkg/8254TimerDxe/8254Timer.inf
index 751ed1c02c..8a07c8247e 100644
--- a/OvmfPkg/8254TimerDxe/8254Timer.inf
+++ b/OvmfPkg/8254TimerDxe/8254Timer.inf
@@ -1,7 +1,7 @@
## @file
# 8254 timer driver that provides Timer Arch protocol.
#
-# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -10,7 +10,7 @@ [Defines]
INF_VERSION = 0x00010005
BASE_NAME = Timer
MODULE_UNI_FILE = Timer.uni
- FILE_GUID = f2765dec-6b41-11d5-8e71-00902707b35e
+ FILE_GUID = C190FE35-44AA-41A1-8AEA-4947BC60E09D
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
@@ -18,7 +18,7 @@ [Defines]
[Packages]
MdePkg/MdePkg.dec
- IntelFrameworkPkg/IntelFrameworkPkg.dec
+ OvmfPkg/OvmfPkg.dec
[LibraryClasses]
UefiBootServicesTableLib
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [edk2-devel] [PATCH v2 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF
2019-04-10 1:06 ` [PATCH v2 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF Wu, Hao A
@ 2019-04-10 16:22 ` Laszlo Ersek
0 siblings, 0 replies; 14+ messages in thread
From: Laszlo Ersek @ 2019-04-10 16:22 UTC (permalink / raw)
To: devel, hao.a.wu; +Cc: Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
On 04/10/19 03:06, Wu, Hao A wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> This commit will remove the IntelFrameworkPkg DEC file dependency in the
> driver INF file.
>
> A new GUID has been updated for the INF file.
>
> Corresponding changes have been made in OVMF DSC files as well in order to
> verify the build.
>
> Please note that a subsequent commit (final patch of the series) will:
>
> A) Add OvmfPkg/8254TimerDxe driver in OVMF FDF files;
> B) Remove the consumption of PcAtChipsetPkg/8254TimerDxe driver in OVMF
> DSC/FDF files.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> ---
> OvmfPkg/OvmfPkgIa32.dsc | 1 +
> OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
> OvmfPkg/OvmfPkgX64.dsc | 1 +
> OvmfPkg/8254TimerDxe/8254Timer.inf | 6 +++---
> 4 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index feb8bc9b92..888909d809 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -668,6 +668,7 @@ [Components]
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> + OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index 993da3197c..1771c457f4 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -677,6 +677,7 @@ [Components.X64]
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> + OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 65aab4f711..dfe5781658 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -675,6 +675,7 @@ [Components]
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> + OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> diff --git a/OvmfPkg/8254TimerDxe/8254Timer.inf b/OvmfPkg/8254TimerDxe/8254Timer.inf
> index 751ed1c02c..8a07c8247e 100644
> --- a/OvmfPkg/8254TimerDxe/8254Timer.inf
> +++ b/OvmfPkg/8254TimerDxe/8254Timer.inf
> @@ -1,7 +1,7 @@
> ## @file
> # 8254 timer driver that provides Timer Arch protocol.
> #
> -# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> ##
> @@ -10,7 +10,7 @@ [Defines]
> INF_VERSION = 0x00010005
> BASE_NAME = Timer
> MODULE_UNI_FILE = Timer.uni
> - FILE_GUID = f2765dec-6b41-11d5-8e71-00902707b35e
> + FILE_GUID = C190FE35-44AA-41A1-8AEA-4947BC60E09D
> MODULE_TYPE = DXE_DRIVER
> VERSION_STRING = 1.0
>
> @@ -18,7 +18,7 @@ [Defines]
>
> [Packages]
> MdePkg/MdePkg.dec
> - IntelFrameworkPkg/IntelFrameworkPkg.dec
> + OvmfPkg/OvmfPkg.dec
>
> [LibraryClasses]
> UefiBootServicesTableLib
>
Thanks for the commit msg update
Laszlo
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
` (6 preceding siblings ...)
2019-04-10 1:06 ` [PATCH v2 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF Wu, Hao A
@ 2019-04-10 1:06 ` Wu, Hao A
2019-04-10 16:25 ` [PATCH v2 0/8] Duplicate 8259/8254 components " Laszlo Ersek
8 siblings, 0 replies; 14+ messages in thread
From: Wu, Hao A @ 2019-04-10 1:06 UTC (permalink / raw)
To: devel; +Cc: Hao Wu, Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit updates the OVMF DSC/FDF files to consume the copied
8259InterruptControllerDxe and 8254TimerDxe drivers within OvmfPkg.
The unconsumed PCD:
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
is removed from DSC files as well.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
OvmfPkg/OvmfPkgIa32.dsc | 3 ---
OvmfPkg/OvmfPkgIa32X64.dsc | 3 ---
OvmfPkg/OvmfPkgX64.dsc | 3 ---
OvmfPkg/OvmfPkgIa32.fdf | 4 ++--
OvmfPkg/OvmfPkgIa32X64.fdf | 4 ++--
OvmfPkg/OvmfPkgX64.fdf | 4 ++--
6 files changed, 6 insertions(+), 15 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 888909d809..98a8467e86 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -510,7 +510,6 @@ [PcdsFixedAtBuild]
!endif
# IRQs 5, 9, 10, 11 are level-triggered
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
@@ -663,11 +662,9 @@ [Components]
}
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 1771c457f4..1f722fc987 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -516,7 +516,6 @@ [PcdsFixedAtBuild.X64]
!endif
# IRQs 5, 9, 10, 11 are level-triggered
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
@@ -672,11 +671,9 @@ [Components.X64]
}
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index dfe5781658..2927ee07b8 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -515,7 +515,6 @@ [PcdsFixedAtBuild]
!endif
# IRQs 5, 9, 10, 11 are level-triggered
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
@@ -670,11 +669,9 @@ [Components]
}
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf
index 6a1edecec3..bc08bf2243 100644
--- a/OvmfPkg/OvmfPkgIa32.fdf
+++ b/OvmfPkg/OvmfPkgIa32.fdf
@@ -207,10 +207,10 @@ [FV.DXEFV]
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+INF OvmfPkg/8259InterruptControllerDxe/8259.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+INF OvmfPkg/8254TimerDxe/8254Timer.inf
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
index d7087b09da..ccf36c5dd9 100644
--- a/OvmfPkg/OvmfPkgIa32X64.fdf
+++ b/OvmfPkg/OvmfPkgIa32X64.fdf
@@ -208,10 +208,10 @@ [FV.DXEFV]
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+INF OvmfPkg/8259InterruptControllerDxe/8259.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+INF OvmfPkg/8254TimerDxe/8254Timer.inf
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index d7087b09da..ccf36c5dd9 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -208,10 +208,10 @@ [FV.DXEFV]
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+INF OvmfPkg/8259InterruptControllerDxe/8259.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+INF OvmfPkg/8254TimerDxe/8254Timer.inf
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg
2019-04-10 1:06 [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg Wu, Hao A
` (7 preceding siblings ...)
2019-04-10 1:06 ` [PATCH v2 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg Wu, Hao A
@ 2019-04-10 16:25 ` Laszlo Ersek
2019-04-11 1:05 ` Wu, Hao A
8 siblings, 1 reply; 14+ messages in thread
From: Laszlo Ersek @ 2019-04-10 16:25 UTC (permalink / raw)
To: Hao Wu, devel; +Cc: Jordan Justen, Ard Biesheuvel, David Woodhouse, Ray Ni
On 04/10/19 03:06, Hao Wu wrote:
> This series is also available at:
> https://github.com/hwu25/edk2/tree/ovmf_8259_8254_v2
>
>
> V2 changes:
>
> Due to the file license change, rebase the whole series onto the tip of
> the master branch. The 'Contributed-under' tag is removed from the log
> messages as well.
>
> The V2 series keeps all the 'Reviewed-by' tags from Laszlo from the
> previous version of the series.
I skimmed this version briefly, with an eye towards my v1 requests. The
v2 series looks fine to me, ready for pushing.
Thanks!
Laszlo
>
>
> V1 history:
>
> As a sub-task to remove the IntelFrameworkPkg (BZ-1604),
>
> 8259InterruptControllerDxe driver (PcAtChipsetPkg)
> Legacy8259 protocol (IntelFrameworkPkg)
> 8254TimerDxe driver (PcAtChipsetPkg)
>
> will be removed in the near future. Meanwhile, OVMF will still require
> those components (due to CSM support & HPET emulation stability concern).
>
> Thus, the series will copy the below 8259/8254 components:
>
> A. 8259InterruptControllerDxe driver (PcAtChipsetPkg)
> B. Two 8259 related PCDs (PcAtChipsetPkg)
> C. Legacy8259 protocol (IntelFrameworkPkg)
> D. 8254TimerDxe driver (PcAtChipsetPkg)
>
> in the OvmfPkg to address the above-mentioned issue.
>
>
> Tests done for the proposed series:
>
> A. OvmfPkg build pass for VS2015 & GCC5 tool chains;
> B. Boot to Shell with commands:
> qemu-system-x86_64.exe -pflash <SOME_PATH>\OVMF.fd -debugcon file:boot.log -global isa-debugcon.iobase=0x402
> qemu-system-x86_64.exe -machine q35 -pflash <SOME_PATH>\OVMF.fd -debugcon file:boot.log -global isa-debugcon.iobase=0x402
> C. 'stall X' command under Shell to verify the timer is working properly.
>
>
> (Please note that there will be a subsequent patch to remove the 8259/8254
> components after platforms dropping the dependencies on them.)
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
>
>
> Hao Wu (8):
> OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
> OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg
> OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
> OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
> OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
> OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
> OvmfPkg/8254TimerDxe: Update to make it build for OVMF
> OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
>
> OvmfPkg/OvmfPkg.dec | 29 +-
> OvmfPkg/OvmfPkgIa32.dsc | 6 +-
> OvmfPkg/OvmfPkgIa32X64.dsc | 6 +-
> OvmfPkg/OvmfPkgX64.dsc | 6 +-
> OvmfPkg/OvmfPkgIa32.fdf | 4 +-
> OvmfPkg/OvmfPkgIa32X64.fdf | 4 +-
> OvmfPkg/OvmfPkgX64.fdf | 4 +-
> OvmfPkg/8254TimerDxe/8254Timer.inf | 42 ++
> OvmfPkg/8259InterruptControllerDxe/8259.inf | 45 ++
> OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 +-
> OvmfPkg/8254TimerDxe/Timer.h | 185 ++++++
> OvmfPkg/8259InterruptControllerDxe/8259.h | 218 +++++++
> OvmfPkg/Include/Protocol/Legacy8259.h | 291 +++++++++
> OvmfPkg/8254TimerDxe/Timer.c | 401 +++++++++++++
> OvmfPkg/8259InterruptControllerDxe/8259.c | 622 ++++++++++++++++++++
> OvmfPkg/8254TimerDxe/Timer.uni | 16 +
> OvmfPkg/8254TimerDxe/TimerExtra.uni | 14 +
> OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni | 16 +
> OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni | 14 +
> 19 files changed, 1909 insertions(+), 19 deletions(-)
> create mode 100644 OvmfPkg/8254TimerDxe/8254Timer.inf
> create mode 100644 OvmfPkg/8259InterruptControllerDxe/8259.inf
> create mode 100644 OvmfPkg/8254TimerDxe/Timer.h
> create mode 100644 OvmfPkg/8259InterruptControllerDxe/8259.h
> create mode 100644 OvmfPkg/Include/Protocol/Legacy8259.h
> create mode 100644 OvmfPkg/8254TimerDxe/Timer.c
> create mode 100644 OvmfPkg/8259InterruptControllerDxe/8259.c
> create mode 100644 OvmfPkg/8254TimerDxe/Timer.uni
> create mode 100644 OvmfPkg/8254TimerDxe/TimerExtra.uni
> create mode 100644 OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
> create mode 100644 OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg
2019-04-10 16:25 ` [PATCH v2 0/8] Duplicate 8259/8254 components " Laszlo Ersek
@ 2019-04-11 1:05 ` Wu, Hao A
0 siblings, 0 replies; 14+ messages in thread
From: Wu, Hao A @ 2019-04-11 1:05 UTC (permalink / raw)
To: Laszlo Ersek, devel@edk2.groups.io
Cc: Justen, Jordan L, Ard Biesheuvel, David Woodhouse, Ni, Ray
> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Thursday, April 11, 2019 12:26 AM
> To: Wu, Hao A; devel@edk2.groups.io
> Cc: Justen, Jordan L; Ard Biesheuvel; David Woodhouse; Ni, Ray
> Subject: Re: [PATCH v2 0/8] Duplicate 8259/8254 components in OvmfPkg
>
> On 04/10/19 03:06, Hao Wu wrote:
> > This series is also available at:
> > https://github.com/hwu25/edk2/tree/ovmf_8259_8254_v2
> >
> >
> > V2 changes:
> >
> > Due to the file license change, rebase the whole series onto the tip of
> > the master branch. The 'Contributed-under' tag is removed from the log
> > messages as well.
> >
> > The V2 series keeps all the 'Reviewed-by' tags from Laszlo from the
> > previous version of the series.
>
> I skimmed this version briefly, with an eye towards my v1 requests. The
> v2 series looks fine to me, ready for pushing.
Thanks Laszlo,
Series has been pushed at:
ddb8cedce7..6d70ade90c
Best Regards,
Hao Wu
>
> Thanks!
> Laszlo
>
> >
> >
> > V1 history:
> >
> > As a sub-task to remove the IntelFrameworkPkg (BZ-1604),
> >
> > 8259InterruptControllerDxe driver (PcAtChipsetPkg)
> > Legacy8259 protocol (IntelFrameworkPkg)
> > 8254TimerDxe driver (PcAtChipsetPkg)
> >
> > will be removed in the near future. Meanwhile, OVMF will still require
> > those components (due to CSM support & HPET emulation stability
> concern).
> >
> > Thus, the series will copy the below 8259/8254 components:
> >
> > A. 8259InterruptControllerDxe driver (PcAtChipsetPkg)
> > B. Two 8259 related PCDs (PcAtChipsetPkg)
> > C. Legacy8259 protocol (IntelFrameworkPkg)
> > D. 8254TimerDxe driver (PcAtChipsetPkg)
> >
> > in the OvmfPkg to address the above-mentioned issue.
> >
> >
> > Tests done for the proposed series:
> >
> > A. OvmfPkg build pass for VS2015 & GCC5 tool chains;
> > B. Boot to Shell with commands:
> > qemu-system-x86_64.exe -pflash <SOME_PATH>\OVMF.fd -debugcon
> file:boot.log -global isa-debugcon.iobase=0x402
> > qemu-system-x86_64.exe -machine q35 -pflash <SOME_PATH>\OVMF.fd
> -debugcon file:boot.log -global isa-debugcon.iobase=0x402
> > C. 'stall X' command under Shell to verify the timer is working properly.
> >
> >
> > (Please note that there will be a subsequent patch to remove the
> 8259/8254
> > components after platforms dropping the dependencies on them.)
> >
> > Cc: Jordan Justen <jordan.l.justen@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: David Woodhouse <dwmw2@infradead.org>
> > Cc: Ray Ni <ray.ni@intel.com>
> >
> >
> > Hao Wu (8):
> > OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
> > OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg
> > OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
> > OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
> > OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
> > OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
> > OvmfPkg/8254TimerDxe: Update to make it build for OVMF
> > OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
> >
> > OvmfPkg/OvmfPkg.dec | 29 +-
> > OvmfPkg/OvmfPkgIa32.dsc | 6 +-
> > OvmfPkg/OvmfPkgIa32X64.dsc | 6 +-
> > OvmfPkg/OvmfPkgX64.dsc | 6 +-
> > OvmfPkg/OvmfPkgIa32.fdf | 4 +-
> > OvmfPkg/OvmfPkgIa32X64.fdf | 4 +-
> > OvmfPkg/OvmfPkgX64.fdf | 4 +-
> > OvmfPkg/8254TimerDxe/8254Timer.inf | 42 ++
> > OvmfPkg/8259InterruptControllerDxe/8259.inf | 45 ++
> > OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 +-
> > OvmfPkg/8254TimerDxe/Timer.h | 185 ++++++
> > OvmfPkg/8259InterruptControllerDxe/8259.h | 218 +++++++
> > OvmfPkg/Include/Protocol/Legacy8259.h | 291 +++++++++
> > OvmfPkg/8254TimerDxe/Timer.c | 401 +++++++++++++
> > OvmfPkg/8259InterruptControllerDxe/8259.c | 622
> ++++++++++++++++++++
> > OvmfPkg/8254TimerDxe/Timer.uni | 16 +
> > OvmfPkg/8254TimerDxe/TimerExtra.uni | 14 +
> > OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni | 16 +
> > OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni | 14 +
> > 19 files changed, 1909 insertions(+), 19 deletions(-)
> > create mode 100644 OvmfPkg/8254TimerDxe/8254Timer.inf
> > create mode 100644 OvmfPkg/8259InterruptControllerDxe/8259.inf
> > create mode 100644 OvmfPkg/8254TimerDxe/Timer.h
> > create mode 100644 OvmfPkg/8259InterruptControllerDxe/8259.h
> > create mode 100644 OvmfPkg/Include/Protocol/Legacy8259.h
> > create mode 100644 OvmfPkg/8254TimerDxe/Timer.c
> > create mode 100644 OvmfPkg/8259InterruptControllerDxe/8259.c
> > create mode 100644 OvmfPkg/8254TimerDxe/Timer.uni
> > create mode 100644 OvmfPkg/8254TimerDxe/TimerExtra.uni
> > create mode 100644 OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
> > create mode 100644
> OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
> >
^ permalink raw reply [flat|nested] 14+ messages in thread