From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) by mx.groups.io with SMTP id smtpd.web09.32297.1617465693932283543 for ; Sat, 03 Apr 2021 09:01:34 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@akeo-ie.20150623.gappssmtp.com header.s=20150623 header.b=coe4lNID; spf=pass (domain: akeo.ie, ip: 209.85.221.41, mailfrom: pete@akeo.ie) Received: by mail-wr1-f41.google.com with SMTP id f12so1165885wro.0 for ; Sat, 03 Apr 2021 09:01:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=akeo-ie.20150623.gappssmtp.com; s=20150623; h=subject:to:references:from:message-id:date:user-agent:mime-version :in-reply-to:content-language:content-transfer-encoding; bh=7hBs+Gg3qXynt8SagyaxFsrQED7eeV5ep/soZf9zEtU=; b=coe4lNID/HHcAc87Kp9vABdIA//XnLZ3Y0iNn1jQzerx7+3hurMckCbDHRTmTmq0yT fgTvFh+/T66JqlZB78MbWJzWiUL55wy5IOKfOnrgDOwJtUIkML+SVPsYQoCbCLoTQzwg Qn+6cGye3YiDlyhbQGC6I8z8Go5ktnNJU1DKHKvIRGAAGCzohMACTzFauWZ1wcb9vBup aHOs4DdWsmAd0GcER4gCCF/nmU+s/yNPoGHFQ3q1xLOv2xrAEMZI7ZgsVjJge7p8eite s+AfCe6vVrFs3qZVLjzSzgEOexevF12VItuBeLvkh0PrYjNwuGl0kyXtmq5M/+R7Uped S71A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=7hBs+Gg3qXynt8SagyaxFsrQED7eeV5ep/soZf9zEtU=; b=Tt/cfAsUbtGjbYr6R8R4S8l4w/gwJvh1LufqynCjxVD5At3b3Xy+5yKwPaoOJFRGhW If8hzIBP9YOLmmVZvJFtPSiFD9K+hi/eHH7mBEAySeD3/lZCtCoWhy8DBsDlFCDzhrxu 5x6ozopV2qvCk15MQr3F/pLS5glRJXrH5iLCnm2URApK+M5PFkcremg1fo/S5G+rCnpz /FIZRUCrP8/IFTFUol2+ydU6JW4sKfa70CDAq5CT/9SqNrpfgM5dqJNSsOJd04rQKscz 6SnYq64nO6H2K8qcgBvUhclrwP9wb6bHVdgtFiXFaWtr26xbuzWAyDXknZ3tY93SPJ1Y zRzw== X-Gm-Message-State: AOAM531Y/IrPo5Im9Dnds6ntaHmoeSTTX2PPyc4t5x0YJljQlQfdTbh+ G5EY2NObTxml0JuBE6mpwRTikYd3St2HBQ== X-Google-Smtp-Source: ABdhPJzf/HPU6HGLJWeHnPNwbmvpU5Mm39omu8LHRXKiUkNaKpF3dT2XCyICpSJTvz77b4gI3si1ZQ== X-Received: by 2002:adf:f884:: with SMTP id u4mr5675921wrp.135.1617465692468; Sat, 03 Apr 2021 09:01:32 -0700 (PDT) Return-Path: Received: from [10.0.0.122] ([84.203.60.64]) by smtp.googlemail.com with ESMTPSA id j6sm15710518wmq.16.2021.04.03.09.01.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 03 Apr 2021 09:01:32 -0700 (PDT) Subject: Re: [edk2-devel] [edk2-platforms][PATCH 1/1] Platform/RaspberryPi: Fix mini UART baud divisor calculation To: =?UTF-8?B?TWFyaW8gQsSDbMSDbmljxIM=?= , devel@edk2.groups.io References: <6ebf4605-b011-a430-968b-d0f85cf91769@akeo.ie> <31669.1617463027621445802@groups.io> From: "Pete Batard" Message-ID: Date: Sat, 3 Apr 2021 17:01:31 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: <31669.1617463027621445802@groups.io> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit On 2021.04.03 16:17, Mario Bălănică wrote: > I've submitted this patch because the mini UART serial console produces > garbage since UEFI v1.25 (due to the wrong baud rate). OK. When you fix something like this, please mention that there was a regression that requires fixing, in the commit message. > It has been tested on the firmware shipped with UEFI v1.24 and it works > fine. I don't see any reason to test it on older versions than this. Well, my worry is that you are removing this part: > -#if (RPI_MODEL == 4) > - Divisor = MmioRead32(BCM2836_CM_BASE + BCM2836_CM_VPU_CLOCK_DIVISOR) & 0xFFFFFF; > - if (Divisor != 0) > - BaseClockRate = (BaseClockRate << 12) / Divisor; > -#endif which was added due to serial issues with older versions of the firmware (much older than the one included in 1.24), to make it compatible with versions of start4.elf where the Pi Foundation had suffled the serial clock rates yet again. I guess if we can't make both newer versions and these older versions work with the same code, we have to stick with what works for newer ones. But I'm still wondering what changed in the Pi firmware to make applying this divisor computation fail, especially as this was supposed to alleviate the precise serial baudrate issue you are trying to fix. > The core clock is not fixed. I've made PcdSerialClockRate patchable here: > > @@ -465,6 +464,9 @@ [PcdsFixedAtBuild.common] > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"EDK2" > gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE > > +[PcdsPatchableInModule] > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|500000000 > + > > 500 MHz is the default clock rate (assuming it hasn't been changed in > config.txt). > The PCD gets patched in both the PEI and DXE phases to the value read > from mailbox. Yeah, I had missed that. I suppose we can go with what you suggest. But I'm still worried that the Pi Foundation are going to shuffle their clocks again in a future firmware, and that we'll be modifying this code yet again, as your patch is pretty much reverting the code to what we used to have... until we found it got broken by a newly introduced Pi Foundation firmware. Regards, /Pete