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From: "Gerd Hoffmann" <kraxel@redhat.com>
To: "Ni, Ray" <ray.ni@intel.com>
Cc: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	 Tom Lendacky <thomas.lendacky@amd.com>
Subject: Re: [edk2-devel] [PATCH 0/6] Substract TME-MK KEY_ID_BITS from CPU max PA
Date: Thu, 30 Mar 2023 11:03:29 +0200	[thread overview]
Message-ID: <a5lzcvpjytqb5c5jlb3tbbeq3qhldljplns5bwnnr3u52exlou@knx6ixpc5cqs> (raw)
In-Reply-To: <MN6PR11MB8244B782D19D47104F08EB558C8E9@MN6PR11MB8244.namprd11.prod.outlook.com>

  Hi,

> For tdx, the actual max physical address bits is decreased by the KEY_ID_BITS bits.
> But the max physical address bits reported from CPUID instruction don't change.

I guess the physical address bits calculation for tdx needs adjustment
then.  Right now we have:

  if (TdIsEnabled ()) {
    if (TdSharedPageMask () == (1ULL << 47)) {
      PhysMemAddressWidth = 48;
    } else {
      PhysMemAddressWidth = 52;
    }
  }


See PlatformAddressWidthInitialization() in PlatformInitLib/MemDetect.c

Which would be the third place needing the same logic.  Maybe worth
thinking about a helper function in a library somewhere, so we don't
cut&paste the same code snippet again and again ...

take care,
  Gerd


  reply	other threads:[~2023-03-30  9:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <174E9488256AAAA5.22739@groups.io>
2023-03-28 14:10 ` [edk2-devel] [PATCH 0/6] Substract TME-MK KEY_ID_BITS from CPU max PA Ni, Ray
2023-03-28 14:13 ` Ni, Ray
     [not found] ` <17509A92F1FF60E5.28404@groups.io>
2023-03-30  2:26   ` Ni, Ray
2023-03-30  7:25     ` Gerd Hoffmann
2023-03-30  8:41       ` Ni, Ray
2023-03-30  9:03         ` Gerd Hoffmann [this message]
2023-03-31  7:24           ` Ni, Ray
     [not found]           ` <17517033A2B187E0.12651@groups.io>
2023-03-31  8:02             ` Ni, Ray
2023-03-31  9:26               ` Gerd Hoffmann
2023-03-30 15:28     ` Lendacky, Thomas

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