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charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 8/28/20 11:25 AM, Daniel Schaefer wrote: > Looks good now, however like in the other patch you also made the lines= longer > again. Please wrap them, as Leif suggested. I'm sure your editor can do= that > for you. Since that won't change the content meaningfully, Reviewed-By: Daniel Schaefer >=20 >=20 > On 8/27/20 5:43 PM, Abner Chang wrote: >> Update RISC-V U5SeriesPkg Readme.md to align with the latest implement= ation. >> >> Signed-off-by: Abner Chang >> Co-authored-by: Daniel Schaefer >> >> Cc: Leif Lindholm >> Cc: Michael D Kinney >> Cc: Daniel Schaefer >> --- >> =C2=A0 Platform/SiFive/U5SeriesPkg/Readme.md | 114 ++++++++++++++-----= ------- >> =C2=A0 1 file changed, 60 insertions(+), 54 deletions(-) >> >> diff --git a/Platform/SiFive/U5SeriesPkg/Readme.md b/Platform/SiFive/U= 5SeriesPkg/Readme.md >> index 4d293e54f6..2ced71fa56 100644 >> --- a/Platform/SiFive/U5SeriesPkg/Readme.md >> +++ b/Platform/SiFive/U5SeriesPkg/Readme.md >> @@ -1,61 +1,61 @@ >> -=EF=BB=BF# Introduction >> -U5SeriesPkg provides the common EFI library and driver modules for Si= Five >> -U5 series core platforms. Currently the supported platforms are Freed= om >> -U500 VC707 platform and Freedom U540 HiFive Unleashed platform. >> - >> -Both platforms are built with below common packages, >> -- **U5SeriesPkg**, edk2 platform branch >> -=C2=A0 (Currently is in edk2-platforms/devel-riscvplatforms branch) >> -- **RiscVPlatformPkg**, edk2 master branch >> -=C2=A0 (Currently is in edk2-staging/RISC-V-V2 branch) >> -- **RiscVPkg**, edk2 master branch >> -=C2=A0 (Currently is in edk2-staging/RISC-V-V2 branch) >> +# Introduction of SiFive U5 Series Platforms >> +U5SeriesPkg provides the common EDK2 libraries and drivers for SiFive= U5 series platforms. Currently the supported >> +platforms are Freedom U500 VC707 platform and Freedom U540 HiFive Unl= eashed platform. >> + >> +Both platforms are built with below common edk2 packages under edk2-p= latforms repository, >> +- [**U5SeriesPkg**](https://github.com/tianocore/edk2-platforms/tree/= master/Platform/SiFive/U5SeriesPkg) >> +- [**RiscVPlatformPkg**](https://github.com/tianocore/edk2-platforms/= tree/master/Platform/RISC-V/PlatformPkg) >> +- [**RiscVProcessorPkg**](https://github.com/tianocore/edk2-platforms= /tree/master/Silicon/RISC-V/ProcessorPkg) >> =C2=A0 ## U500 Platform >> -This is a sample RISC-V EDK2 platform package used agaist SiFive Free= dom U500 >> +This is a sample platform package used against to SiFive Freedom U500 >> =C2=A0 VC707 FPGA Dev Kit, please refer to "SiFive Freedom U500 VC707 = FPGA Getting >> =C2=A0 Started Guide" on https://www.sifive.com/documentation. >> +The binary built from Platform/SiFive/U5SeriesPkg/FreedomU500VC707Boa= rd can run on U500 VC707 FPGA board. >> +``` >> +build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU500VC= 707Board/U500.dsc >> +``` >> =C2=A0 ## U540 Platform >> -This is a sample RISC-V EDK2 platform package used against SiFive Fre= edom U540 >> -HiFive Unleashed development board, please refer to "SiFive Freedom U= 540-C000 >> -Manual" on https://www.sifive.com. >> -The binary built from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUn= leashedBoard/ >> -can run on main stream [QEMU](https://git.qemu.org/?p=3Dqemu.git;a=3D= summary) >> -using qemu-system-riscv64 under riscv64-softmmu. Launch the binary wi= th >> +This is a sample platform package used for the SiFive Freedom U540 Hi= Five Unleashed development board, please refer to "SiFive Freedom U540-C0= 00 Manual" on https://www.sifive.com. >> +The binary built from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUn= leashedBoard/ can run on both hardware and >> +[QEMU](https://git.qemu.org/?p=3Dqemu.git;a=3Dsummary). It is confirm= ed that version 5.0 of QEMU can boot with this=C2=A0 firmware to EFI shel= l and Linux userspace. >> +``` >> +build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU540Hi= FiveUnleashedBoard/U540.dsc >> +``` >> +For running U540 edk2 binary on QEMU, use qemu-system-riscv64 under r= iscv64-softmmu to launch the binary with >> +below parameters, >> =C2=A0 ``` >> --cpu sifive-u54 -machine sifive_u >> +qemu-system-riscv64 -cpu sifive-u54 -machine sifive_u -bios U540.fd -= m 2048 -nographic -smp cpus=3D5,maxcpus=3D5 >> =C2=A0 ``` >> -## Download the sources >> +## Download the Source Code >> =C2=A0 ``` >> -git clone https://github.com/tianocore/edk2-staging.git >> -# Checkout RISC-V-V2 branch >> +git clone https://github.com/tianocore/edk2.git >> =C2=A0 git clone https://github.com/tianocore/edk2-platforms.git >> -# Checkout devel-riscvplatforms branch >> -git clone https://github.com/tianocore/edk2-non-osi.git >> +# Below to clone opensbi submodule. >> +git submodule update --init >> =C2=A0 ``` >> - >> -## Platform Owners >> -Chang, Abner >> -Chen, Gilbert >> +Refer to [Readme.md](https://github.com/tianocore/edk2-platforms/blob= /master/Platform/RISC-V/PlatformPkg/Readme.md) for building RISC-V platfo= rms. >> =C2=A0 ## Platform Status >> -Currently the binary built from U500Pkg can boot SiFive Freedom U500 = VC707 >> +**FreedomU500VC707Board** >> +Currently the binary built from U500 edk2 package can boot SiFive Fre= edom U500 VC707 >> =C2=A0 FPGA to EFI shell with console in/out enabled. >> -## Linux Build Instructions >> -You can build the RISC-V platform using below script, >> -`build -a RISCV64=C2=A0 -t GCC5 -p Platform/SiFive/U5SeriesPkg/Freedo= mU500VC707Board/U500.dsc` >> +**FreedomU540HiFiveUnleashedBoard** >> +Currently the binary built from U540 edk2 package can boot SiFive Fre= edom U540 HiFive Unleashed >> +to EFI shell with console in/out enabled and Linux kernel. Please ref= er to https://github.com/riscv/riscv-uefi-edk2-docs for booting to Linux = kernel. >> =C2=A0 ## Supported Operating Systems >> -Only support to boot to EFI Shell so far. >> +Please refer to https://github.com/riscv/riscv-uefi-edk2-docs. >> =C2=A0 ## Known Issues and Limitations >> =C2=A0 Only RISC-V RV64 is verified on this platform. >> =C2=A0 ## Related Materials >> +- [RISC-V UEFI Documents](https://github.com/riscv/riscv-uefi-edk2-do= cs) >> =C2=A0 - [RISC-V OpenSbi](https://github.com/riscv/opensbi) >> =C2=A0 - [SiFive U500 VC707 FPGA Getting Started Guide](https://sifive= .cdn.prismic.io/sifive%2Fc248fabc-5e44-4412-b1c3-6bb6aac73a2c_sifive-u500= -vc707-gettingstarted-v0.2.pdf) >> =C2=A0 - [SiFive Freedom U540-C000 Manual](https://sifive.cdn.prismic.= io/sifive%2F834354f0-08e6-423c-bf1f-0cb58ef14061_fu540-c000-v1.0.pdf) >> @@ -63,48 +63,54 @@ Only RISC-V RV64 is verified on this platform. >> =C2=A0 ## U5SeriesPkg Libraries and Drivers >> =C2=A0 ### PeiCoreInfoHobLib >> -This is the library to create RISC-V core characteristics for buildin= g up >> -RISC-V related SMBIOS records to support the unified boot loader and = OS image. >> +This is the library to create RISC-V core characteristics for buildin= g up RISC-V related SMBIOS records to support >> +a single boot loader=C2=A0 or OS image on all RISC-V platforms by dis= covering RISC-V hart configurations dynamically. >> =C2=A0 This library leverage the silicon libraries provided in Silicon= /SiFive. >> =C2=A0 ### RiscVPlatformTimerLib >> -This is common U5 series platform timer library which has the >> -platform-specific timer implementation. >> +This is common U5 series platform timer library which has the platfor= m-specific timer implementation. >> + >> +### SerialLib >> +This is common U5 series platform serial port library. >> =C2=A0 ### TimerDxe >> -This is U5 series platform timer DXE driver whcih has the platform-sp= ecific >> -timer implementation. >> +This is common U5 series platform timer DXE driver which has the plat= form-specific timer implementation. >> =C2=A0 ## U500 Platform Libraries and Drivers >> =C2=A0 ### RiscVOpensbiPlatformLib >> -In order to reduce the dependencies with RISC-V OpenSBI project >> -(https://github.com/riscv/opensbi) and fewer burdens to EDK2 build pr= ocess, the >> -implementation of RISC-V EDK2 platform is leveraging platform source = code from >> +In order to reduce the dependencies with RISC-V OpenSBI project (http= s://github.com/riscv/opensbi) and avoid duplicating >> +code we use it, the implementation of RISC-V EDK2 platform is leverag= ing platform source code from >> =C2=A0 OpenSBI code tree. The "platform.c" under OpenSbiPlatformLib is= cloned from >> -RISC-V OpenSBI code tree (in EDK2 RiscVPkg) and built based on EDK2 b= uild >> -environment. >> +[RISC-V OpenSBI code tree](Silicon/RISC-V/ProcessorPkg/Library/RiscVO= pensbiLib/opensbi) and built based on edk2 >> +build environment. >> =C2=A0 ### PlatformPei >> -This is the platform-implementation specific library which is execute= d in early >> -PEI phase for U500 platform initialization. >> +This is the platform-implementation specific library which is execute= d in early PEI phase for U500 platform >> +initialization. >> =C2=A0 ## U540 Platform Libraries and Drivers >> =C2=A0 ### RiscVOpensbiPlatformLib >> -In order to reduce the dependencies with RISC-V OpenSBI project >> -(https://github.com/riscv/opensbi) and fewer burdens to EDK2 build pr= ocess, the >> -implementation of RISC-V EDK2 platform is leveraging platform source = code from >> +In order to reduce the dependencies with RISC-V OpenSBI project (http= s://github.com/riscv/opensbi) and fewer >> +burdens to EDK2 build process, the implementation of RISC-V EDK2 plat= form is leveraging platform source code from >> =C2=A0 OpenSBI code tree. The "platform.c" under OpenSbiPlatformLib is= cloned from >> -RISC-V OpenSBI code tree (in EDK2 RiscVPkg) and built based on EDK2 b= uild >> -environment. >> +[RISC-V OpenSBI code tree](Silicon/RISC-V/ProcessorPkg/Library/RiscVO= pensbiLib/opensbi) and built based on edk2 >> +build environment. >> =C2=A0 ### PlatformPei >> -This is the platform-implementation specific library which is execute= d in early >> -PEI phase for U540 platform initialization. >> +This is the platform-implementation specific library which is execute= d in early PEI phase for U540 platform >> +initialization. >> =C2=A0 ## U5SeriesPkg Platform PCD settings >> =C2=A0 | **PCD name** |**Usage**| >> =C2=A0 |----------------|----------| >> +|PcdU5PlatformSystemClock| U5 series platform system clock| >> =C2=A0 |PcdNumberofU5Cores| Number of U5 core enabled on U5 series pla= tform| >> =C2=A0 |PcdE5MCSupported| Indicates whether the Monitor Core (E5) is s= upported on U5 series platform| >> =C2=A0 |PcdU5UartBase|Platform serial port base address| >> + >> + >> +## Platform Owners >> +Chang, Abner >> +Chen, Gilbert >> +Schaefer, Daniel >>