From: "Daniel Schaefer" <daniel.schaefer@hpe.com>
To: Leif Lindholm <leif@nuviainc.com>, <devel@edk2.groups.io>
Cc: Abner Chang <abner.chang@hpe.com>,
Gilbert Chen <gilbert.chen@hpe.com>,
"Kinney, Michael D" <michael.d.kinney@intel.com>,
<Bret.Barkelew@microsoft.com>, <sean.brogan@microsoft.com>
Subject: Re: [edk2-devel] [PATCH v2 0/3] New RISC-V Patches - Why in edk2-platforms
Date: Wed, 20 May 2020 18:17:59 +0200 [thread overview]
Message-ID: <aa75a083-13e6-5d47-c963-17e03897b124@hpe.com> (raw)
In-Reply-To: <27d3bf55-eb2e-75e1-e5fa-17af59e105aa@hpe.com>
On 5/20/20 6:07 PM, Daniel Schaefer wrote:
> please reply here, fixed Mike's email address, sorry...
>
> On 5/20/20 6:03 PM, Daniel Schaefer wrote:
>> On 5/20/20 1:43 PM, Leif Lindholm wrote:
>>> On Fri, May 15, 2020 at 15:39:34 +0200, Daniel Schaefer wrote:
>>>> Previously we had two packages just for RISC-V on our edk2 branch:
>>>> RiscVPkg and RiscVPlatformPkg
>>>> They are now under
>>>> Platform/RISC-V/PlatformPkg and Silicon/RISC-V/ProcessorPkg
>>>> in edk2-platforms.
>>>
>>> Understood. I took my eye off the ball there for a while, but I'm a
>>> bit confused as to why RiscVPkg isn't going into EDK2. That is very
>>> counterintuitive. And clearly it will need revisiting if we are to add
>>> first-class CI checks like those we do with OvmfPkg/ArmVirtPkg.
>>
>> Yes, I understand your concern. Personally I'd like it also to be in
>> EDK2 straight away, however Mike, Bret and Sean have raised valid
>> concerns:
>>
>> 1. RISC-V is very new and potentially unstable - it's quicker to make
>> changes in edk2-platforms.
>>
>> 2. If we define new interfaces and libraries in edk2, we can't remove
>> them easily because it would be a backwards-incompatible change.
>> edk2-platforms isn't quite as strict.
>>
>> 3. Long-term, I think many agree, we should aim to move much of the
>> RISC-V code into UefiCpuPkg and OvmfPkg. Mike mentioned that would
>> need coordination with ARM maintainers because it might make sense to
>> move their code there as well.
>>
>> Maybe Mike, Bret or Sean would like to provide some more comments?
>>
>>> I *did* have some outstanding comments specifically with regards to
>>> large amounts of code duplication between the SMBIOS implementation of
>>> some closely related RISC-V platforms. That now needs to be revisited.
>>
>> The SMBIOS code hasn't changed. It has moved to
>> Silicon/SiFive/{E51,U54,U54MCCoreplex}/Library/PeiCoreInfoHobLib
>> You're referring to this library, right?
>>
>> They build the SMBIOS entries for a particular processor. Yes, the
>> values do have a lot of overlap but these files are like configuration
>> files. They don't do much, they only set the values of the properties.
>>
>> Currently it is not possible to let the UEFI firmware get this
>> information from the hardware at runtime, especially now, since we're
>> running in S-Mode.
>> To allow that, we created a RISC-V working group to be able to
>> retrieve all of this information dynamically from the processor (among
>> other goals). Then the vendor will not have to modify these files and
>> hardcode the values anymore. Which enables us to create a single
>> library for all processors.
>> See: https://github.com/riscv/configuration-structure
>>
>> I hope I described everything properly, please correct me otherwise,
>> Abner.
>>
>>>
>>>> In the previous version of this patchseries I forgot to attach the
>>>> biggest new
>>>> commit, which adds RiscVEdk2SbiLib. It wraps the ecall interface for
>>>> calling
>>>> SBI in a C API and lets PEI and DXE call SBI interfaces. Because we
>>>> need more
>>>> M-Mode capabilities in PEI and DXE than SBI gives us, we register
>>>> another SBI
>>>> extension, that gives us access to the mscratch register.
>>>
>>> Without looking at it yet, it sounds like that may resolve the only
>>> remaining major issue I had with RiscVPkg.
>>>
>>>> I hope now it makes more sense.
>>>
>>> It is more clear, as per above I am not sure it makes more sense :)
>>> Thanks!
>>
>> Your concerns are very valid, however due to the mentioned trade-offs
>> it might not make sense to address them.
>>
>> - Daniel
next prev parent reply other threads:[~2020-05-20 16:18 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 13:39 [PATCH v2 0/3] New RISC-V Patches Daniel Schaefer
2020-05-15 13:39 ` [PATCH v2 1/3] ProcessorPkg/RiscVOpensbLib: Add opensbi submodule Daniel Schaefer
2020-05-20 11:51 ` Leif Lindholm
2020-05-15 13:39 ` [PATCH v2 2/3] ProcessorPkg/Library: Add RiscVOpensbiLib Daniel Schaefer
2020-05-20 12:00 ` Leif Lindholm
2020-05-20 14:44 ` Daniel Schaefer
2020-05-15 13:39 ` [PATCH v2 3/3] ProcessorPkg/Library: Add RiscVEdk2SbiLib Daniel Schaefer
2020-05-20 18:27 ` Leif Lindholm
2020-05-29 12:43 ` [edk2-devel] " Daniel Schaefer
2020-05-29 13:15 ` Leif Lindholm
2020-05-20 11:43 ` [edk2-devel] [PATCH v2 0/3] New RISC-V Patches Leif Lindholm
2020-05-20 16:03 ` [edk2-devel] [PATCH v2 0/3] New RISC-V Patches - Why in edk2-platforms Daniel Schaefer
2020-05-20 16:07 ` Daniel Schaefer
2020-05-20 16:17 ` Daniel Schaefer [this message]
2020-05-21 6:59 ` Abner Chang
2020-05-28 11:54 ` Leif Lindholm
2020-05-29 14:41 ` Abner Chang
[not found] ` <b55ee3ec-74de-532e-01f7-bd24a327d00b@hpe.com>
[not found] ` <CY4PR21MB0743421F39A05298FBCFBAA0EF8F0@CY4PR21MB0743.namprd21.prod.outlook.com>
[not found] ` <MN2PR11MB4461D8666DE6DA1E7D4B5B9BD28F0@MN2PR11MB4461.namprd11.prod.outlook.com>
[not found] ` <TU4PR8401MB1182F755F76709FF1D46D3F2FF8F0@TU4PR8401MB1182.NAMPRD84.PROD.OUTLOOK.COM>
[not found] ` <MN2PR11MB4461442E7462457D6C20F6F2D28F0@MN2PR11MB4461.namprd11.prod.outlook.com>
[not found] ` <MW2PR2101MB092494AB8318628E06B62089E18F0@MW2PR2101MB0924.namprd21.prod.outlook.com>
2020-06-03 11:57 ` [edk2-devel] Where to put RISC-V packages Daniel Schaefer
2020-06-03 15:02 ` Abner Chang
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