From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0AD0C21B02822 for ; Wed, 14 Nov 2018 14:11:54 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4B63430014DF; Wed, 14 Nov 2018 22:11:54 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-123-77.rdu2.redhat.com [10.10.123.77]) by smtp.corp.redhat.com (Postfix) with ESMTP id 64325608F3; Wed, 14 Nov 2018 22:11:53 +0000 (UTC) To: Leif Lindholm , Ard Biesheuvel Cc: edk2-devel@lists.01.org References: <20181114192724.27068-1-ard.biesheuvel@linaro.org> <20181114200036.o5nv5qnkwlmbkwxu@bivouac.eciton.net> From: Laszlo Ersek Message-ID: Date: Wed, 14 Nov 2018 23:11:52 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181114200036.o5nv5qnkwlmbkwxu@bivouac.eciton.net> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Wed, 14 Nov 2018 22:11:54 +0000 (UTC) Subject: Re: [PATCH] ArmPkg/ArmGicDxe ARM: fix encoding for GICv3 interrupt acknowledge X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Nov 2018 22:11:55 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 11/14/18 21:00, Leif Lindholm wrote: > On Wed, Nov 14, 2018 at 11:27:24AM -0800, Ard Biesheuvel wrote: >> Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses >> the wrong system register encoding to access ICC_IAR1, and attempted >> to access ICC_IAR0 instead. This results in boot time hangs both >> under QEMU emulation and on real hardware. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel > > Reviewed-by: Leif Lindholm > > I would say given how long we've gone without finding this, Right, that makes me curious -- what has changed now? What exposed this bug? Thanks! Laszlo > it's not > justifiable to push this before the stable tag is made - so please > hold off on pushing it until we open the flood gates. > > / > Leif > >> --- >> ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 2 +- >> ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm | 2 +- >> 2 files changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S >> index a72f3c865163..c308d2fa3e2f 100644 >> --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S >> +++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S >> @@ -66,7 +66,7 @@ ASM_FUNC(ArmGicV3EndOfInterrupt) >> // VOID >> // ); >> ASM_FUNC(ArmGicV3AcknowledgeInterrupt) >> - mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1 >> + mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1 >> bx lr >> >> //VOID >> diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm >> index 4228fb59be54..222047d1ad43 100644 >> --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm >> +++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm >> @@ -66,7 +66,7 @@ >> // VOID >> // ); >> RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt >> - mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1 >> + mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1 >> bx lr >> >> //VOID >> -- >> 2.17.1 >> > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel >