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Received: from DM6PR12MB3163.namprd12.prod.outlook.com (2603:10b6:5:15e::26) by DM6PR12MB4027.namprd12.prod.outlook.com (2603:10b6:5:148::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2835.20; Tue, 24 Mar 2020 17:41:12 +0000 Received: from DM6PR12MB3163.namprd12.prod.outlook.com ([fe80::f0f9:a88f:f840:2733]) by DM6PR12MB3163.namprd12.prod.outlook.com ([fe80::f0f9:a88f:f840:2733%7]) with mapi id 15.20.2835.023; Tue, 24 Mar 2020 17:41:12 +0000 From: "Lendacky, Thomas" To: devel@edk2.groups.io Cc: Jordan Justen , Laszlo Ersek , Ard Biesheuvel , Michael D Kinney , Liming Gao , Eric Dong , Ray Ni , Brijesh Singh Subject: [PATCH v6 02/42] MdePkg: Add the MSR definition for the GHCB register Date: Tue, 24 Mar 2020 12:40:16 -0500 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: X-ClientProxiedBy: DM5PR06CA0025.namprd06.prod.outlook.com (2603:10b6:3:5d::11) To DM6PR12MB3163.namprd12.prod.outlook.com (2603:10b6:5:15e::26) Return-Path: thomas.lendacky@amd.com MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by DM5PR06CA0025.namprd06.prod.outlook.com (2603:10b6:3:5d::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2835.19 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: M3+xw8CGeiZmb3fphHZ9DPvqBFx2srKEUwWzebvJ3TneXCz9cIwlxTT1Z3BvkGmkaETYkfuAR3tDLwCp6cp+CCPT3obfBwSYZQ6EPFH1cbf8+3+d3asWLOJ5hgFh6h73OhGs+GSxApJTKjrJOfaChtlNYYNQdW1Rsks4lAck1/NjrQiXMFX5Bwa7Dry/ac+vff/WV0dcBm274NVfVwDHeo0u9ijVFnNuBg6Bn/3JJVr8i5vEnDmZN38KmxXs/pea+hY84EzFQvKtcu/yUIvrTb11wbaB+BkqKFSEKy5CbsKc5cR7eKLqFGo834xkVvY4wu4gsHMHB6gr2asuRG1La/aM9UwG7NQoJjZqdoeqK+CTiRmtseoJvIyXClrMeeMZDjZg5bCOlelTsfFtM9qcsQ2vmrfPbT3Ub2Bi6ZyP2NpSxwFAtvPLPeLUA4yV/JsLHJaY9mYxviCaYPRRF4VYXbsYC/CN0q8A38dEFjvGHBO9sI8fGJ/gqnJbtuAQxlzf624y/VtJs91xFR+NbAQLwpkuBGlh3M7lRz5P4kGA9Ub5cwwApNAt6i6gCkRl9OnZEJQCDCXfh9e++ciCpUKFsg== X-MS-Exchange-AntiSpam-MessageData: gXqQxeBJdp0zfVlGr5jSxvpyhnCaaNeKKzuBQI0gU9Vp4N0L9WdA9DWGfif0boIzldbvUpgGi9U/LHM1lXRJ376FC51sub0+fS95FwG4ubBCEEIBOXv9UtQNLGrRCI4Q8QxjGEl/wiFdBNSk89tZuQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: a17f84a5-ec15-41c7-2ace-08d7d01a8b25 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2020 17:41:12.0139 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fjZQ/rWlGLIHo6Ob6KzavLe5CvAeYGCPbzeAIgfCX1jlqdQ9V2A4PQk6iwt89cv2b6KJoNHCGzlCK4FM7IMr6A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4027 Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 For SEV-ES, the GHCB page address is stored in the GHCB MSR register (0xc0010130). Define the register and the format used for register during GHCB protocol negotiation. Cc: Michael D Kinney Cc: Liming Gao Signed-off-by: Tom Lendacky --- MdePkg/Include/Register/Amd/Fam17Msr.h | 42 ++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h index 6ef45a9b21d3..466a3143599c 100644 --- a/MdePkg/Include/Register/Amd/Fam17Msr.h +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h @@ -17,6 +17,48 @@ #ifndef __FAM17_MSR_H__ #define __FAM17_MSR_H__ +/** + Secure Encrypted Virtualization - Encrypted State (SEV-ES) GHCB register + +**/ +#define MSR_SEV_ES_GHCB 0xc0010130 + +/** + MSR information returned for #MSR_SEV_ES_GHCB +**/ +typedef union { + struct { + UINT64 Function:12; + } GhcbInfo; + + struct { + UINT8 Reserved[3]; + UINT8 SevEncryptionBitPos; + UINT16 SevEsProtocolMin; + UINT16 SevEsProtocolMax; + } GhcbProtocol; + + struct { + UINT64 Function:12; + UINT64 ReasonCodeSet:4; + UINT64 ReasonCode:8; + } GhcbTerminate; + + VOID *Ghcb; + + UINT64 GhcbPhysicalAddress; +} MSR_SEV_ES_GHCB_REGISTER; + +#define GHCB_INFO_SEV_INFO 1 +#define GHCB_INFO_SEV_INFO_GET 2 +#define GHCB_INFO_CPUID_REQUEST 4 +#define GHCB_INFO_CPUID_RESPONSE 5 +#define GHCB_INFO_TERMINATE_REQUEST 256 + +#define GHCB_TERMINATE_GHCB 0 +#define GHCB_TERMINATE_GHCB_GENERAL 0 +#define GHCB_TERMINATE_GHCB_PROTOCOL 1 + /** Secure Encrypted Virtualization (SEV) status register -- 2.17.1