From: "Laszlo Ersek" <lersek@redhat.com>
To: "Kirkendall, Garrett" <Garrett.Kirkendall@amd.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Hao A Wu <hao.a.wu@intel.com>,
"Jiang, Guomin" <guomin.jiang@intel.com>
Subject: Re: [edk2-devel] [PATCH v6 0/4] AMD processor MSR_IA32_MISC_ENABLE
Date: Wed, 24 Jun 2020 10:53:47 +0200 [thread overview]
Message-ID: <ad82ed2d-c80d-aad2-554e-cae96ebbac6a@redhat.com> (raw)
In-Reply-To: <SN1PR12MB2352C7DE5F1EF34AE2F72D1685950@SN1PR12MB2352.namprd12.prod.outlook.com>
On 06/24/20 03:04, Kirkendall, Garrett wrote:
> [AMD Public Use]
>
> Is there anything else needed from me for this patch at this time?
I think we still have an open question here:
https://edk2.groups.io/g/devel/message/61583
To clarify: I'm not suggesting that we should fix that issue. I'm saying
that we should *understand* Guomin's report enough so we can decide
*whether* this series needs a further update, or not.
If there is no feedback (clarification) from Guomin in a few days, I
think Eric or Ray (the UefiCpuPkg maintainers) should merge v6 -- for
example, on Friday.
Thanks,
Laszlo
>
> GARRETT KIRKENDALL
> SMTS Firmware Engineer | CTE
> 7171 Southwest Parkway, Austin, TX 78735 USA
> AMD facebook | amd.com
>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Kirkendall, Garrett via groups.io
> Sent: Monday, June 22, 2020 8:18 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong <eric.dong@intel.com>; Ray Ni <ray.ni@intel.com>; Laszlo Ersek <lersek@redhat.com>; Hao A Wu <hao.a.wu@intel.com>
> Subject: [edk2-devel] [PATCH v6 0/4] AMD processor MSR_IA32_MISC_ENABLE
>
> [CAUTION: External Email]
>
> AMD processor does not support MSR_IA32_MISC_ENABLE register. Accessing this register on AMD causes an unhandled exception in SmmEntry.nasm and a subsequent failure to boot since this is too early in SMM path for the exception handler to be loaded.
>
> 1. Prepare PcAtChipsetPkg/PcAtChipsetPkg.dsc to move StandardSignatureIsAuthenticAMD into UefiCpuLib LibraryClass BaseUefiCpuLib in UefiCpuPkg.
>
> 2. To distinguish between AMD and other processors, refactor StandardSignatureIsAuthenticAMD into BaseUefiCpuLib. So there is only one copy in the source.
>
> 3. Skip manipulation of MSR_IA32_MISC_ENABLE register if running on an AMD processor.
>
> Tested on AMD X64 hardware.
> OvmfIa32 and OvmfIa32X64 on Intel hardware.
>
> v1: Move StandardSignatureIsAuthenticAMD. Handle MSR_IA32_MISC_ENABLE
> v2: Incorporate Laszlo's feedback
> v3: Typo, not sent
> v4: Patch in to add UefiCpuLib to PcAtChipsetPkg.dsc
> v5: Patch in to add UefiCpuLib to SourceLevelDebugPkg.dsc
> v6: Hopefully reformat patch when sending????
>
> Garrett Kirkendall (4):
> PcAtChipsetPkg: PcAtChipsetPkg.dsc add UefiCpuLib LibraryClass
> SourceLevelDebugPkg: SourceLevelDebugPkg.dsc add UefiCpuLib
> LibraryClass
> UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib
> UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on
> AMD
>
> PcAtChipsetPkg/PcAtChipsetPkg.dsc | 2 ++
> SourceLevelDebugPkg/SourceLevelDebugPkg.dsc | 2 ++
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 7 ++++
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf | 2 ++
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf | 2 ++
> UefiCpuPkg/Include/Library/UefiCpuLib.h | 14 ++++++++
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 3 ++
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 38 ++++++++++++++++++++
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 25 ++-----------
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 25 ++-----------
> UefiCpuPkg/Library/MpInitLib/MpLib.c | 23 ------------
> UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 9 ++++-
> UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 19 ++++++++--
> UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 20 +++++++++--
> 14 files changed, 117 insertions(+), 74 deletions(-) create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
>
> Changes at:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fgkirkendall-amd%2Fedk2%2Ftree%2Fsmmentry_nasm_skip_msr_xd_bit_on_amd_v6&data=02%7C01%7Cgarrett.kirkendall%40amd.com%7C5b2918ff7a2345a5ce7f08d816af8e23%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637284290553548804&sdata=F9ktro2rmOouJYui4jqTFK25TK6l1HBl317RW41QDM4%3D&reserved=0
>
> Pull Request:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Fedk2%2Fpull%2F716&data=02%7C01%7Cgarrett.kirkendall%40amd.com%7C5b2918ff7a2345a5ce7f08d816af8e23%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637284290553548804&sdata=FcHQc%2BzJHMAJfSWc9z%2FZ4Bxh5Ur4EnM%2BaIurKJ0iNYU%3D&reserved=0
>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
>
> --
> 2.27.0
>
>
>
>
next prev parent reply other threads:[~2020-06-24 8:53 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-22 13:18 [PATCH v6 0/4] AMD processor MSR_IA32_MISC_ENABLE Kirkendall, Garrett
2020-06-22 13:18 ` [PATCH v6 1/4] PcAtChipsetPkg: PcAtChipsetPkg.dsc add UefiCpuLib LibraryClass Kirkendall, Garrett
2020-06-23 0:52 ` [edk2-devel] " Guomin Jiang
2020-06-23 11:16 ` Laszlo Ersek
2020-06-28 9:11 ` Guomin Jiang
2020-06-28 14:41 ` Dong, Eric
2020-07-07 7:42 ` Ni, Ray
2020-06-22 13:18 ` [PATCH v6 2/4] SourceLevelDebugPkg: SourceLevelDebugPkg.dsc " Kirkendall, Garrett
2020-07-07 3:21 ` Wu, Hao A
2020-06-22 13:18 ` [PATCH v6 3/4] UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib Kirkendall, Garrett
2020-07-07 2:55 ` Dong, Eric
2020-06-22 13:18 ` [PATCH v6 4/4] UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on AMD Kirkendall, Garrett
2020-06-22 15:17 ` Laszlo Ersek
2020-07-07 2:54 ` Dong, Eric
2020-06-24 1:04 ` [edk2-devel] [PATCH v6 0/4] AMD processor MSR_IA32_MISC_ENABLE Kirkendall, Garrett
2020-06-24 8:53 ` Laszlo Ersek [this message]
2020-07-07 2:38 ` Dong, Eric
2020-07-07 23:32 ` Laszlo Ersek
2020-07-08 0:21 ` Guomin Jiang
2020-07-06 10:11 ` Laszlo Ersek
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ad82ed2d-c80d-aad2-554e-cae96ebbac6a@redhat.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox