From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7977881C9D for ; Wed, 14 Dec 2016 21:26:28 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP; 14 Dec 2016 21:26:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,350,1477983600"; d="scan'208";a="912389291" Received: from shwdeftian.ccr.corp.intel.com ([10.239.158.36]) by orsmga003.jf.intel.com with ESMTP; 14 Dec 2016 21:26:26 -0800 From: Feng Tian To: edk2-devel@lists.01.org Cc: Michael D Kinney , Jeff Fan Date: Thu, 15 Dec 2016 13:26:19 +0800 Message-Id: X-Mailer: git-send-email 2.7.1.windows.2 Subject: [patch] UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failure X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Dec 2016 05:26:28 -0000 Cc: Michael D Kinney Cc: Jeff Fan Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S | 1 + UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 2 +- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S | 2 +- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S index 378e065..62f1697 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S @@ -28,6 +28,7 @@ ASM_GLOBAL ASM_PFX(mXdSupported) ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard)) ASM_GLOBAL ASM_PFX(gSmiHandlerIdtr) +.equ MSR_IA32_MISC_ENABLE, 0x1A0 .equ MSR_EFER, 0xc0000080 .equ MSR_EFER_XD, 0x800 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm index a4f4dcb..8296f36 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm @@ -202,7 +202,7 @@ _SmiHandler PROC call eax add esp, 4 - mov eax, mXdSupported + mov eax, offset mXdSupported mov al, [eax] cmp al, 0 jz @f diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S index f4761b0..600d862 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S @@ -158,7 +158,7 @@ L13: rdmsr orw $MSR_EFER_XD,%ax # enable NXE wrmsr - jmp @NxeDone + jmp NxeDone SkipNxe: subl $8, %esp NxeDone: diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm index e2fcb6f..c74f82a 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm @@ -222,7 +222,7 @@ _SmiHandler: add rsp, 200h - mov rax, ASM_PFX(mXdSupported) + mov rax, offset ASM_PFX(mXdSupported) mov al, [rax] cmp al, 0 jz @f -- 2.7.1.windows.2