From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: redhat.com, ip: 209.85.128.67, mailfrom: philmd@redhat.com) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by groups.io with SMTP; Wed, 29 May 2019 09:36:42 -0700 Received: by mail-wm1-f67.google.com with SMTP id f10so2133074wmb.1 for ; Wed, 29 May 2019 09:36:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:openpgp:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=XbL8sTX/6eVF7+iqhBZulXPmULAubB24VFnl6ejaejI=; b=n3ekOSUA9OjmLp0OXzkn6TGGH2H6djxl+VrODj/F6MfFsl+n0gjP0l3Fgwi52+ur5H dgNi/HfihbsOtXb2vW6v/W5WnDR6Qw78ntVyPB8HRYnI8y+/qv6jKnQSYws6gpR1ygG/ T3k6TsA5lT4B+BAyIIeeW1sGZTPc2ls+4bg2ArOomgqlkGL3IxdDftvgpFygG3yERHHM Ul4ZmZ/YKA7yQWvv7eYN26WE0rHD6RGxSj/Q+3OqbGOkxIPI+rUggoewMpCmQ4PZjlh8 NxAYu0F5HoU6YRS3yT37sUfQdb30Xr/ppa7T8skUtQXxqxrslIbJEHwNOcuLPFYPrbVv /lRg== X-Gm-Message-State: APjAAAXFQfUaZ7D7n4c8cun50hjeRK9EMLNf+EwyuIB835fs5xup1nR7 ScCIBEcXJCZ7od6+L+1hbfO1gw== X-Google-Smtp-Source: APXvYqy+HN/5+kcctPIdEycgarSaD6qIiSsdcWRjuAJbCEqL6QE7YfjVEUuoXzS58kq7OmeUXNbm9g== X-Received: by 2002:a1c:c545:: with SMTP id v66mr7677946wmf.51.1559147800832; Wed, 29 May 2019 09:36:40 -0700 (PDT) Return-Path: Received: from [10.201.33.53] ([195.166.127.210]) by smtp.gmail.com with ESMTPSA id t14sm9768577wrr.33.2019.05.29.09.36.39 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Wed, 29 May 2019 09:36:40 -0700 (PDT) Subject: Re: [edk2-devel] [PATCH for-edk2-stable201905 5/6] OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35 To: devel@edk2.groups.io, lersek@redhat.com Cc: Ard Biesheuvel , Gerd Hoffmann , Jordan Justen References: <20190529151209.17503-1-lersek@redhat.com> <20190529151209.17503-6-lersek@redhat.com> From: =?UTF-8?B?UGhpbGlwcGUgTWF0aGlldS1EYXVkw6k=?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: Date: Wed, 29 May 2019 18:36:38 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190529151209.17503-6-lersek@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 5/29/19 5:12 PM, Laszlo Ersek wrote: > (This is a replacement for commit 75136b29541b, "OvmfPkg/PlatformPei: > reorder the 32-bit PCI window vs. the PCIEXBAR on q35", 2019-05-16). > > Commit 7b8fe63561b4 ("OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG > / ECAM) on Q35", 2016-03-10) claimed that, > > On Q35 machine types that QEMU intends to support in the long term, QEMU > never lets the RAM below 4 GB exceed 2 GB. > > Alas, this statement came from a misunderstanding that occurred while we > worked out the interface contract. In fact QEMU does allow the 32-bit RAM > extend up to 0xB000_0000 (exclusive), in case the RAM size falls in the > range (0x8000_0000, 0xB000_0000) (i.e., the RAM size is greater than > 2048MB and smaller than 2816MB). > > In turn, such a RAM size (justifiedly) triggers > > ASSERT (TopOfLowRam <= PciExBarBase); > > in MemMapInitialization(), because we placed the 256MB PCIEXBAR at > 0x8000_0000 (2GB) exactly, relying on the interface contract. (And, the > 32-bit PCI window would follow the PCIEXBAR, covering the [0x9000_0000, > 0xFC00_0000) range.) > > In order to fix this, place the PCIEXBAR at 2816MB (0xB000_0000), and > start the 32-bit PCI window at 3 GB (0xC000_0000). This shrinks the 32-bit > PCI window to > > 0xFC00_0000 - 0xC000_0000 = 0x3C00_0000 = 960 MB. This fix is simpler. Reviewed-by: Philippe Mathieu-Daude > Cc: Ard Biesheuvel > Cc: Gerd Hoffmann > Cc: Jordan Justen > Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 > Signed-off-by: Laszlo Ersek > --- > OvmfPkg/OvmfPkgIa32.dsc | 4 ++-- > OvmfPkg/OvmfPkgIa32X64.dsc | 4 ++-- > OvmfPkg/OvmfPkgX64.dsc | 4 ++-- > 3 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc > index 578fc6c98ec8..e74a9d5a5149 100644 > --- a/OvmfPkg/OvmfPkgIa32.dsc > +++ b/OvmfPkg/OvmfPkgIa32.dsc > @@ -492,8 +492,8 @@ [PcdsFixedAtBuild] > # the PCIEXBAR register. > # > # On Q35 machine types that QEMU intends to support in the long term, QEMU > - # never lets the RAM below 4 GB exceed 2 GB. > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000 > + # never lets the RAM below 4 GB exceed 2816 MB. > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 > > !ifdef $(SOURCE_DEBUG_ENABLE) > gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 > diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc > index eade8f62d3de..67ac015991fd 100644 > --- a/OvmfPkg/OvmfPkgIa32X64.dsc > +++ b/OvmfPkg/OvmfPkgIa32X64.dsc > @@ -497,8 +497,8 @@ [PcdsFixedAtBuild] > # the PCIEXBAR register. > # > # On Q35 machine types that QEMU intends to support in the long term, QEMU > - # never lets the RAM below 4 GB exceed 2 GB. > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000 > + # never lets the RAM below 4 GB exceed 2816 MB. > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 > > !ifdef $(SOURCE_DEBUG_ENABLE) > gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 > diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc > index 733a4c9d8a43..68073ef55b4d 100644 > --- a/OvmfPkg/OvmfPkgX64.dsc > +++ b/OvmfPkg/OvmfPkgX64.dsc > @@ -497,8 +497,8 @@ [PcdsFixedAtBuild] > # the PCIEXBAR register. > # > # On Q35 machine types that QEMU intends to support in the long term, QEMU > - # never lets the RAM below 4 GB exceed 2 GB. > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000 > + # never lets the RAM below 4 GB exceed 2816 MB. > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 > > !ifdef $(SOURCE_DEBUG_ENABLE) > gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 >