Re: [edk2-devel] [PATCH v2 10/10] OvmfPkg/ResetVector: wire up 5-level paging for SEV

["Laszlo Ersek" <lersek@redhat.com>]

On 3/1/24 08:44, Gerd Hoffmann wrote:
> Turn the GetSevCBitMaskAbove31 OneTimeCall into a macro because we
> need that twice (for 4-level and 5-level paging).  Change include
> order to allow AmdSev.asm macros being used in PageTables64.asm.

I *think* the include order change will not only make the macros
visible, but also rearrange how the code (the binary instructions) are
laid out in the reset vector -- however, that should not be a problem.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>


> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  OvmfPkg/ResetVector/Ia32/AmdSev.asm       | 16 ++++++++--------
>  OvmfPkg/ResetVector/Ia32/PageTables64.asm | 14 +++++++++++++-
>  OvmfPkg/ResetVector/ResetVector.nasmb     |  4 ++--
>  3 files changed, 23 insertions(+), 11 deletions(-)
> 
> diff --git a/OvmfPkg/ResetVector/Ia32/AmdSev.asm b/OvmfPkg/ResetVector/Ia32/AmdSev.asm
> index cbb86871636f..c577f5572f04 100644
> --- a/OvmfPkg/ResetVector/Ia32/AmdSev.asm
> +++ b/OvmfPkg/ResetVector/Ia32/AmdSev.asm
> @@ -146,6 +146,14 @@ BITS    32
>      jmp     %%TerminateHlt
>  %endmacro
>  
> +; Get the C-bit mask above 31.
> +; Modified: EDX
> +;
> +; The value is returned in the EDX
> +%macro GetSevCBitMaskAbove31 0
> +    mov edx, dword[SEV_ES_WORK_AREA_ENC_MASK + 4]
> +%endmacro
> +
>  ; Terminate the guest due to unexpected response code.
>  SevEsUnexpectedRespTerminate:
>      TerminateVmgExit    TERM_UNEXPECTED_RESP_CODE
> @@ -191,14 +199,6 @@ pageTableEntries4kLoop:
>  SevClearPageEncMaskForGhcbPageExit:
>      OneTimeCallRet SevClearPageEncMaskForGhcbPage
>  
> -; Get the C-bit mask above 31.
> -; Modified: EDX
> -;
> -; The value is returned in the EDX
> -GetSevCBitMaskAbove31:
> -    mov       edx, dword[SEV_ES_WORK_AREA_ENC_MASK + 4]
> -    OneTimeCallRet GetSevCBitMaskAbove31
> -
>  %endif
>  
>  ; Check if Secure Encrypted Virtualization (SEV) features are enabled.
> diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
> index 29ce155eed8d..92d134441abe 100644
> --- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
> +++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
> @@ -247,11 +247,23 @@ SevInit:
>      ; SEV workflow
>      ;
>      ClearOvmfPageTables
> +%if PG_5_LEVEL
> +    Check5LevelPaging Sev4Level
>      ; If SEV is enabled, the C-bit position is always above 31.
>      ; The mask will be saved in the EDX and applied during the
>      ; the page table build below.
> -    OneTimeCall   GetSevCBitMaskAbove31
> +    GetSevCBitMaskAbove31
> +    CreatePageTables5Level edx
> +    Enable5LevelPaging
> +    jmp SevCommon
> +Sev4Level:
> +%endif
> +    ; If SEV is enabled, the C-bit position is always above 31.
> +    ; The mask will be saved in the EDX and applied during the
> +    ; the page table build below.
> +    GetSevCBitMaskAbove31
>      CreatePageTables4Level edx
> +SevCommon:
>      ; Clear the C-bit from the GHCB page if the SEV-ES is enabled.
>      OneTimeCall   SevClearPageEncMaskForGhcbPage
>      OneTimeCall   SevClearVcHandlerAndStack
> diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb
> index 2bd80149e58b..ba83bc7b3124 100644
> --- a/OvmfPkg/ResetVector/ResetVector.nasmb
> +++ b/OvmfPkg/ResetVector/ResetVector.nasmb
> @@ -92,6 +92,8 @@
>  %define SNP_SEC_MEM_BASE_DESC_3       (CPUID_BASE + CPUID_SIZE + SEV_SNP_KERNEL_HASHES_SIZE)
>  %define SNP_SEC_MEM_SIZE_DESC_3       (FixedPcdGet32 (PcdOvmfPeiMemFvBase) - SNP_SEC_MEM_BASE_DESC_3)
>  
> +%include "Ia32/AmdSev.asm"
> +
>  %ifdef ARCH_X64
>    #include <AutoGen.h>
>  
> @@ -144,8 +146,6 @@
>    %include "X64/OvmfSevMetadata.asm"
>  %endif
>  
> -%include "Ia32/AmdSev.asm"
> -
>  %include "Ia16/Real16ToFlat32.asm"
>  %include "Ia16/Init16.asm"
>  



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