From: "Sami Mujawar" <sami.mujawar@arm.com>
To: Etienne Carriere <etienne.carriere@linaro.org>, devel@edk2.groups.io
Cc: Achin Gupta <achin.gupta@arm.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Jiewen Yao <jiewen.yao@intel.com>,
Leif Lindholm <leif@nuviainc.com>,
Sughosh Ganu <sughosh.ganu@linaro.org>,
nd@arm.com, Ard Biesheuvel <ardb+tianocore@kernel.org>
Subject: Re: [PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs
Date: Tue, 11 May 2021 19:43:09 +0100 [thread overview]
Message-ID: <b1456e4b-b156-6f0a-265a-65ad512a1bd1@arm.com> (raw)
In-Reply-To: <20210504152048.8739-2-etienne.carriere@linaro.org>
Hi Etienn,
This patch looks good to me.
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
On 04/05/2021 04:20 PM, Etienne Carriere wrote:
> Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit
> function IDs as per SMCCC specification. Defines also generic ARM
> SVC identifier macros to wrap 32bit or 64bit identifiers upon target
> built architecture.
>
> Cc: Achin Gupta <achin.gupta@arm.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Sughosh Ganu <sughosh.ganu@linaro.org>
> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
> ---
> ArmPkg/Include/IndustryStandard/ArmFfaSvc.h | 12 ++++++++++++
> ArmPkg/Include/IndustryStandard/ArmMmSvc.h | 15 +++++++++++++++
> 2 files changed, 27 insertions(+)
>
> diff --git a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
> index 65b8343ade..ebcb54b28b 100644
> --- a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
> +++ b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
> @@ -17,9 +17,21 @@
> #define ARM_FFA_SVC_H_
>
> #define ARM_SVC_ID_FFA_VERSION_AARCH32 0x84000063
> +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 0x8400006F
> +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 0x84000070
> #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 0xC400006F
> #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC4000070
>
> +/* Generic IDs when using AArch32 or AArch64 execution state */
> +#ifdef MDE_CPU_AARCH64
> +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64
> +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64
> +#endif
> +#ifdef MDE_CPU_ARM
> +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32
> +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32
> +#endif
> +
> #define SPM_MAJOR_VERSION_FFA 1
> #define SPM_MINOR_VERSION_FFA 0
>
> diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
> index 33d60ccf17..deb3bc99d2 100644
> --- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
> +++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
> @@ -15,10 +15,25 @@
> * privileged operations on its behalf.
> */
> #define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060
> +#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061
> +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064
> +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065
> #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061
> #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
> #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
>
> +/* Generic IDs when using AArch32 or AArch64 execution state */
> +#ifdef MDE_CPU_AARCH64
> +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64
> +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64
> +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64
> +#endif
> +#ifdef MDE_CPU_ARM
> +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32
> +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32
> +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32
> +#endif
> +
> #define SET_MEM_ATTR_DATA_PERM_MASK 0x3
> #define SET_MEM_ATTR_DATA_PERM_SHIFT 0
> #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0
next prev parent reply other threads:[~2021-05-11 18:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-04 15:20 [PATCH 0/5] Arm 32bit support in StandaloveMm Etienne Carriere
2021-05-04 15:20 ` [PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs Etienne Carriere
2021-05-11 18:43 ` Sami Mujawar [this message]
2021-05-04 15:20 ` [PATCH 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg Etienne Carriere
2021-05-11 18:45 ` Sami Mujawar
2021-05-04 15:20 ` [PATCH 3/5] GenGv: Arm: support images entered in Thumb mode Etienne Carriere
2021-05-10 15:54 ` Ard Biesheuvel
2021-05-11 19:13 ` Sami Mujawar
2021-05-04 15:20 ` [PATCH 4/5] StandaloneMmPkg: fix pointer/int casts against 32bit architectures Etienne Carriere
2021-05-05 2:10 ` [edk2-devel] " Yao, Jiewen
2021-05-10 15:50 ` Ard Biesheuvel
2021-05-11 19:14 ` Sami Mujawar
2021-05-04 15:20 ` [PATCH 5/5] StandaloneMmPkg: build for 32bit arm machines Etienne Carriere
2021-05-11 19:18 ` Sami Mujawar
2021-05-12 10:01 ` Etienne Carriere
2021-05-06 3:25 ` 回复: [edk2-devel] [PATCH 0/5] Arm 32bit support in StandaloveMm gaoliming
2021-05-06 6:44 ` Etienne Carriere
-- strict thread matches above, loose matches on Subject: below --
2021-03-14 20:06 [PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs Etienne Carriere
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