* [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling
@ 2021-08-24 6:00 Omkar Anand Kulkarni
2021-08-24 6:00 ` [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver Omkar Anand Kulkarni
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Omkar Anand Kulkarni @ 2021-08-24 6:00 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Sami Mujawar
Changes since v2:
- Rebased to the latest upstream code.
This patch series introduces platform support for RAS using Firmware First
error handling. Firmware first error handling on ARM Neoverse reference design
platforms is achieved using HEST[1] and SDEI[2] ACPI tables.
For doing so the Platform Error handler DXE driver is introduced. This driver
is integral part of the firmware first error handling framework in EDK2. SDEI
being the notification mechanism used to communicate the platform errors to
OSPM, it builds and installs the SDEI ACPI table. Also installs the HEST table
which is already created as part of firmware first framework in EDK2.
This series does provide a reference implementation to leverage the firmware
first framework by implementing a platform MM driver for Dynamic Memory
Controller DMC[3] that has RAS feature enabled. This driver mainly handles
following:
- Implements the Hest Error Source Descriptor protocol introduced as part of
firmware first framework in EDK2. Publishes the 1-bit ECC DRAM error sources
as GHESv2[4] type error source descriptors.
- For any 1-bit CE that occurs on DRAM it reads DMC error record registers and
populates a error status block (CPER)[5] of Memory Type error[6].
References:
[1] : ACPI 6.3, Table 18-382, Hardware Error Source Table
[2] : SDEI Platform Design Document, revision b, 10 Appendix C, ACPI table
definitions for SDEI
[3] : DMC620 Dynamic Memory Controller, revision r1p0
[4] : ACPI Reference Specification 6.3, Table 18-393 GHESv2 Structure
[5] : UEFI Reference Specification 2.8, Appendix N - Common Platform Error
Record
[6] : UEFI Reference Specification 2.8, Section N.2.5 Memory Error Section
This patch series is dependent on the edk2 patch series
https://edk2.groups.io/g/devel/message/79741
Link to github branch with the patches in this series -
https://github.com/omkkul01/edk2-platforms/tree/ras_firware_first_edk2-platforms_v3
Omkar Anand Kulkarni (5):
Platform/ARM: Add DMC-620 ECC error handling driver
Platform/Sgi: dmc-620 firmware-first error handling
Platform/Sgi: define memory region for GHES error status block
Platform/Sgi: Define values for ACPI table header
Platform/Sgi: Add platform error handling driver
Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec | 30 ++
Platform/ARM/SgiPkg/SgiPlatform.dec | 1 +
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 38 ++
Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 30 ++
Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 6 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 13 +
Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf | 61 +++
.../PlatformErrorHandlerDxe.inf | 51 +++
.../Library/PlatformLib/PlatformLib.inf | 6 +
Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h | 174 +++++++++
Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c | 362 ++++++++++++++++++
.../Dmc620Mm/Dmc620MmErrorSourceInfo.c | 194 ++++++++++
.../PlatformErrorHandlerDxe.c | 171 +++++++++
.../Library/PlatformLib/PlatformLibMem.c | 13 +-
14 files changed, 1148 insertions(+), 2 deletions(-)
create mode 100644 Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec
create mode 100644 Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf
create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf
create mode 100644 Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h
create mode 100644 Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c
create mode 100644 Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c
create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c
--
2.17.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver 2021-08-24 6:00 [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling Omkar Anand Kulkarni @ 2021-08-24 6:00 ` Omkar Anand Kulkarni 2021-09-27 17:30 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 2/5] Platform/Sgi: dmc-620 firmware-first error handling Omkar Anand Kulkarni ` (3 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Omkar Anand Kulkarni @ 2021-08-24 6:00 UTC (permalink / raw) To: devel; +Cc: Ard Biesheuvel, Sami Mujawar DMC-620 memory controller improves system reliability by generating interrupts on detecting ECC errors on the data. Add a initial DMC-620 MM driver that implements a MMI handler for handling single-bit ECC error events originating from the DRAM. The driver implements the HEST error source descriptor protocol in order to publish the GHES error source descriptor for single-bit DRAM errors. The GHES error source descriptor that is published is of type 'memory error'. A GHES error source descriptor is published for each instances if the DMC-620 controller in the system. The driver registers a MMI handler for handling 1-bit DRAM ECC error events. The MMI handler, when invoked, reads the DMC-620 error record registers and populates the EFI_PLATFORM_MEMORY_ERROR_DATA type error section information structure with the corresponding information read from the error record registers. Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> --- Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec | 30 ++ Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf | 61 ++++ Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h | 174 ++++++++++ Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c | 362 ++++++++++++++++++++ Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c | 194 +++++++++++ 5 files changed, 821 insertions(+) diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec new file mode 100644 index 000000000000..8f3508574203 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec @@ -0,0 +1,30 @@ +## @file +# DMC-620 MM driver specific declrations. +# +# This file defines GUIDs and declares PCD values for DMC-620 MM driver. +# +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEC_SPECIFICATION = 0x0001001A + PACKAGE_NAME = Dmc620Mm + PACKAGE_GUID = 94110B10-8E72-42A0-8963-D2B57FCF0F38 + PACKAGE_VERSION = 0.1 + +[Guids] + gDmc620MmTokenSpaceGuid = {0xc305f72a, 0xd10d, 0x45e8, { 0x81, 0x78, 0x51, 0x8b, 0x78, 0x62, 0x77, 0x79 } } + gArmDmcEventHandlerGuid = { 0x5ef0afd5, 0xe01a, 0x4c30, { 0x86, 0x19, 0x45, 0x46, 0x26, 0x91, 0x80, 0x98 }} + +[PcdsFixedAtBuild.common] + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold|10|UINT32|0x00000004 + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize|0x100000|UINT32|0x00000003 + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase|0|UINT32|0x00000006 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase|0|UINT64|0x00000007 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize|0|UINT64|0x00000008 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId|0|UINT16|0x00000009 + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount|1|UINT32|0x00000005 + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl|2|UINT32|0x00000001 + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase|0x4E000000|UINT64|0x00000002 diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf new file mode 100644 index 000000000000..8cad07749a23 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf @@ -0,0 +1,61 @@ +## @file +# StandaloneMM driver for the DMC620 Memory Controller. +# +# Driver to handle 1-bit Corrected DRAM errors for DMC(s). +# +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = StandaloneMmDmc620Driver + FILE_GUID = CB53ACD9-A1A1-43B3-A638-AC74DA5D9DA2 + MODULE_TYPE = MM_STANDALONE + VERSION_STRING = 1.0 + PI_SPECIFICATION_VERSION = 0x00010032 + ENTRY_POINT = Dmc620MmDriverInitialize + +[Sources] + Dmc620Mm.c + Dmc620MmErrorSourceInfo.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec + StandaloneMmPkg/StandaloneMmPkg.dec + +[LibraryClasses] + ArmLib + ArmSvcLib + BaseMemoryLib + DebugLib + StandaloneMmDriverEntryPoint + +[Protocols] + gMmHestErrorSourceDescProtocolGuid ##PRODUCES + +[FixedPcd] + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize + + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase + +[Guids] + gArmDmcEventHandlerGuid + +[Depex] + TRUE diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h new file mode 100644 index 000000000000..f5c96396b870 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h @@ -0,0 +1,174 @@ +/** @file + DMC-620 memory controller MM driver definitions. + + Macros and structure definitions for DMC-620 error handling MM driver. + + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef DMC620_MM_DRIVER_H_ +#define DMC620_MM_DRIVER_H_ + +#include <Base.h> +#include <Guid/Cper.h> +#include <IndustryStandard/Acpi.h> +#include <Library/ArmLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/DebugLib.h> +#include <Library/IoLib.h> +#include <Protocol/HestErrorSourceInfo.h> + +// DMC-620 memc register field values and masks. +#define DMC620_MEMC_STATUS_MASK (BIT2|BIT1|BIT0) +#define DMC620_MEMC_STATUS_READY (BIT1|BIT0) +#define DMC620_MEMC_CMD_EXECUTE_DRAIN (BIT2|BIT0) + +// DMC-620 Error Record Status register fields values and masks. +#define DMC620_ERR_STATUS_MV BIT26 +#define DMC620_ERR_STATUS_AV BIT31 + +// DMC-620 Error Record MISC-0 register fields values and masks. +#define DMC620_ERR_MISC0_COLUMN_MASK \ + (BIT9|BIT8|BIT7|BIT6|BIT5|BIT4|BIT3|BIT2|BIT1|BIT0) +#define DMC620_ERR_MISC0_ROW_MASK (0x0FFFFC00) +#define DMC620_ERR_MISC0_ROW_SHIFT 10 +#define DMC620_ERR_MISC0_RANK_MASK (BIT30|BIT29|BIT28) +#define DMC620_ERR_MISC0_RANK_SHIFT 28 +#define DMC620_ERR_MISC0_VAILD BIT31 + +// DMC-620 Error Record register fields values and mask. +#define DMC620_ERR_MISC1_VAILD BIT31 +#define DMC620_ERR_MISC1_BANK_MASK (BIT3|BIT2|BIT1|BIT0) + +// DMC-620 Error Record Global Status register bit field. +#define DMC620_ERR_GSR_ECC_CORRECTED_FH BIT1 + +// +// DMC-620 Memory Mapped register definitions. +// + +// Unused DMC-620 register fields. +#define RESV_0 0x1BD +#define RESV_1 0x2C +#define RESV_2 0x8 +#define RESV_3 0x58 + +#pragma pack(1) +typedef struct { + UINT32 MemcStatus; + UINT32 MemcConfig; + UINT32 MemcCmd; + UINT32 Reserved[RESV_0]; + UINT32 Err0Fr; + UINT32 Reserved1; + UINT32 Err0Ctlr0; + UINT32 Err0Ctlr1; + UINT32 Err0Status; + UINT8 Reserved2[RESV_1]; + UINT32 Err1Fr; + UINT32 Reserved3; + UINT32 Err1Ctlr; + UINT32 Reserved4; + UINT32 Err1Status; + UINT32 Reserved5; + UINT32 Err1Addr0; + UINT32 Err1Addr1; + UINT32 Err1Misc0; + UINT32 Err1Misc1; + UINT32 Err1Misc2; + UINT32 Err1Misc3; + UINT32 Err1Misc4; + UINT32 Err1Misc5; + UINT8 Reserved6[RESV_2]; + UINT32 Err2Fr; + UINT32 Reserved7; + UINT32 Err2Ctlr; + UINT32 Reserved8; + UINT32 Err2Status; + UINT32 Reserved9; + UINT32 Err2Addr0; + UINT32 Err2Addr1; + UINT32 Err2Misc0; + UINT32 Err2Misc1; + UINT32 Err2Misc2; + UINT32 Err2Misc3; + UINT32 Err2Misc4; + UINT32 Err2Misc5; + UINT8 Reserved10[RESV_2]; + UINT32 Reserved11[RESV_3]; + UINT32 Errgsr; +} DMC620_REGS_TYPE; + +// DMC-620 Typical Error Record register definition. +typedef struct { + UINT32 ErrFr; + UINT32 Reserved; + UINT32 ErrCtlr; + UINT32 Reserved1; + UINT32 ErrStatus; + UINT32 Reserved2; + UINT32 ErrAddr0; + UINT32 ErrAddr1; + UINT32 ErrMisc0; + UINT32 ErrMisc1; + UINT32 ErrMisc2; + UINT32 ErrMisc3; + UINT32 ErrMisc4; + UINT32 ErrMisc5; + UINT8 Reserved3[RESV_2]; +} DMC620_ERR_REGS_TYPE; +#pragma pack() + +// List of supported error sources by DMC-620. +typedef enum { + DramEccCfh = 0, + DramEccFh, + ChiFh, + SramEccCfh, + SramEccFh, + DmcErrRecovery +} DMC_ERR_SOURCES; + +/** + MMI handler implementing the HEST error source desc protocol. + + Returns the error source descriptor information for all DMC(s) error sources + and also returns its count and length. + + @param[in] This Pointer for this protocol. + @param[out] Buffer HEST error source descriptor Information + buffer. + @param[out] ErrorSourcesLength Total length of Error Source Descriptors. + @param[out] ErrorSourceCount Total number of supported error sources. + + @retval EFI_SUCCESS Buffer has valid Error Source descriptor + information. + @retval EFI_INVALID_PARAMETER Buffer is NULL. +**/ +EFI_STATUS +EFIAPI +DmcErrorSourceDescInfoGet ( + IN MM_HEST_ERROR_SOURCE_DESC_PROTOCOL *This, + OUT VOID **Buffer, + OUT UINTN *ErrorSourcesLength, + OUT UINTN *ErrorSourcesCount + ); + +/** + Allow reporting of supported DMC-620 error sources. + + Install the HEST Error Source Descriptor protocol handler to allow publishing + of the supported DMC-620 memory controller error sources. + + @param[in] MmSystemTable Pointer to System table. + + @retval EFI_SUCCESS Protocol installation successful. + @retval EFI_INVALID_PARAMETER Invalid system table parameter. +**/ +EFI_STATUS +Dmc620InstallErrorSourceDescProtocol ( + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ); + +#endif // DMC620_MM_DRIVER_H_ diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c new file mode 100644 index 000000000000..91daf713f275 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c @@ -0,0 +1,362 @@ +/** @file + DMC-620 Memory Controller error handling (Standalone MM) driver. + + Supports 1-bit Bit DRAM error handling for multiple DMC instances. On a error + event, publishes the CPER error record of Memory Error type. + + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference + - DMC620 Dynamic Memory Controller, revision r1p0. + - UEFI Reference Specification 2.8, Section N.2.5 Memory Error Section +**/ + +#include <Dmc620Mm.h> + +/** + Helper function to handle the DMC-620 DRAM errors. + + Reads the DRAM error record registers. Creates a CPER error record of type + 'Memory Error' and populates it with information collected from DRAM error + record registers. + + @param[in] DmcCtrl A pointer to DMC control registers. + @param[in] DmcInstance DMC instance which raised the fault event. + @param[in] ErrRecType A type of the DMC error record. + @param[in] ErrorBlockBaseAddress Unique address for populating the error + block status for given DMC error source. +**/ +STATIC +VOID +Dmc620HandleDramError ( + IN DMC620_REGS_TYPE *DmcCtrl, + IN UINTN DmcInstance, + IN UINTN ErrRecType, + IN UINTN ErrorBlockBaseAddress + ) +{ + EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE *ErrBlockSectionDesc; + EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE *ErrBlockStatusHeaderData; + EFI_PLATFORM_MEMORY_ERROR_DATA MemorySectionInfo = {0}; + DMC620_ERR_REGS_TYPE *ErrRecord; + EFI_GUID SectionType; + UINT32 ResetReg; + VOID *ErrBlockSectionData; + UINTN *ErrorStatusRegister; + UINTN *ReadAckRegister; + UINTN *ErrStatusBlock; + UINTN ErrStatus; + UINTN ErrAddr0; + UINTN ErrAddr1; + UINTN ErrMisc0; + UINTN ErrMisc1; + UINT8 CorrectedError; + + // + // Check the type of DRAM error (1-bit or 2-bit) and accordingly select + // error record to use. + // + if (ErrRecType == DMC620_ERR_GSR_ECC_CORRECTED_FH) { + DEBUG (( + DEBUG_INFO, + "%a: DRAM ECC Corrected Fault (1-Bit ECC error)\n", + __FUNCTION__ + )); + ErrRecord = (DMC620_ERR_REGS_TYPE *)&DmcCtrl->Err1Fr; + CorrectedError = 1; + } else { + DEBUG (( + DEBUG_INFO, + "%a: DRAM ECC Fault Handling (2-bit ECC error)\n", + __FUNCTION__ + )); + ErrRecord = (DMC620_ERR_REGS_TYPE *)&DmcCtrl->Err2Fr; + CorrectedError = 0; + } + + // Read most recent DRAM error record registers. + ErrStatus = MmioRead32 ((UINTN)&ErrRecord->ErrStatus); + ErrAddr0 = MmioRead32 ((UINTN)&ErrRecord->ErrAddr0); + ErrAddr1 = MmioRead32 ((UINTN)&ErrRecord->ErrAddr1); + ErrMisc0 = MmioRead32 ((UINTN)&ErrRecord->ErrMisc0); + ErrMisc1 = MmioRead32 ((UINTN)&ErrRecord->ErrMisc1); + + // Clear the status register so that new error records are populated. + ResetReg = MmioRead32 ((UINTN)&ErrRecord->ErrStatus); + MmioWrite32 ((UINTN)&ErrRecord->ErrStatus, ResetReg); + + // + // Get Physical address of DRAM error from Error Record Address register + // and populate Memory Error Section. + // + if (ErrStatus & DMC620_ERR_STATUS_AV) { + DEBUG (( + DEBUG_INFO, + "%a: DRAM Error: Address_0 : 0x%x Address_1 : 0x%x\n", + __FUNCTION__, + ErrAddr0, + ErrAddr1 + )); + + // + // Populate Memory CPER section with DRAM error address (48 bits) and + // address mask fields. + // + MemorySectionInfo.ValidFields |= + EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID | + EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID; + MemorySectionInfo.PhysicalAddressMask = 0xFFFFFFFFFFFF; + MemorySectionInfo.PhysicalAddress = (ErrAddr1 << 32) | ErrAddr0; + } + + // + // Read the Error Record Misc registers and populate relevant fields in + // Memory CPER error section. + // + if ((ErrStatus & DMC620_ERR_STATUS_MV) + && (ErrMisc0 & DMC620_ERR_MISC0_VAILD)) + { + // Populate Memory error section wih DRAM column information. + MemorySectionInfo.ValidFields |= EFI_PLATFORM_MEMORY_COLUMN_VALID; + MemorySectionInfo.Column = ErrMisc0 & DMC620_ERR_MISC0_COLUMN_MASK; + + // + // Populate Memory Error Section with DRAM row information. + // Row bits (bit 16 and 17) are to be filled as extended. + // + MemorySectionInfo.ValidFields |= + EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID; + MemorySectionInfo.Row = + (ErrMisc0 & DMC620_ERR_MISC0_ROW_MASK) >> DMC620_ERR_MISC0_ROW_SHIFT; + MemorySectionInfo.Extended = + ((ErrMisc0 & DMC620_ERR_MISC0_ROW_MASK) >> + (DMC620_ERR_MISC0_ROW_SHIFT + 16)); + + // Populate Memory Error Section wih DRAM rank information. + MemorySectionInfo.ValidFields |= EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID; + MemorySectionInfo.RankNum = (ErrMisc0 & DMC620_ERR_MISC0_RANK_MASK) >> + DMC620_ERR_MISC0_RANK_SHIFT; + } + + // Read Error Record MISC1 register and populate the Memory Error Section. + if ((ErrStatus & DMC620_ERR_STATUS_MV) + && (ErrMisc1 & DMC620_ERR_MISC1_VAILD)) + { + MemorySectionInfo.ValidFields |= EFI_PLATFORM_MEMORY_BANK_VALID; + MemorySectionInfo.Bank = (ErrMisc1 & DMC620_ERR_MISC1_BANK_MASK); + } + + // + // Misc registers 2..5 are not used and convey only the error counter + // information. They are cleared as they do not contribute in Error + // Record creation. + // + if (ErrStatus & DMC620_ERR_STATUS_MV) { + ResetReg = 0x0; + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc2, ResetReg); + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc3, ResetReg); + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc4, ResetReg); + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc5, ResetReg); + } + + // + // Reset error records Status register for recording new DRAM error syndrome + // information. + // + ResetReg = MmioRead32 ((UINTN)&ErrRecord->ErrStatus); + MmioWrite32 ((UINTN)&ErrRecord->ErrStatus, ResetReg); + + // + // Allocate memory for Error Acknowledge register, Error Status register and + // Error status block data. + // + ReadAckRegister = (UINTN *)ErrorBlockBaseAddress; + ErrorStatusRegister = (UINTN *)ErrorBlockBaseAddress + 1; + ErrStatusBlock = (UINTN *)ErrorStatusRegister + 1; + + // Initialize Error Status Register with Error Status Block address. + *ErrorStatusRegister = (UINTN)ErrStatusBlock; + + // + // Locate Block Status Header base address and populate it with Error Status + // Block Header information. + // + ErrBlockStatusHeaderData = (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE *) + ErrStatusBlock; + *ErrBlockStatusHeaderData = + (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) { + .BlockStatus = { + .UncorrectableErrorValid = ((CorrectedError == 0) ? 0 : 1), + .CorrectableErrorValid = ((CorrectedError == 1) ? 1 : 0), + .MultipleUncorrectableErrors = 0x0, + .MultipleCorrectableErrors = 0x0, + .ErrorDataEntryCount = 0x1 + }, + .RawDataOffset = + (sizeof (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) + + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE)), + .RawDataLength = 0, + .DataLength = + (sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + + sizeof(EFI_PLATFORM_MEMORY_ERROR_DATA)), + .ErrorSeverity = ((CorrectedError == 1) ? + EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED : + EFI_ACPI_6_3_ERROR_SEVERITY_FATAL), + }; + + // + // Locate Section Descriptor base address and populate Error Status Section + // Descriptor data. + // + ErrBlockSectionDesc = (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE *) + (ErrBlockStatusHeaderData + 1); + *ErrBlockSectionDesc = + (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) { + .ErrorSeverity = ((CorrectedError == 1) ? + EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED : + EFI_ACPI_6_3_ERROR_SEVERITY_FATAL), + .Revision = EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION, + .ValidationBits = 0, + .Flags = 0, + .ErrorDataLength = sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), + .FruId = {0}, + .FruText = {0}, + .Timestamp = {0}, + }; + SectionType = (EFI_GUID) EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID; + CopyGuid ((EFI_GUID *)ErrBlockSectionDesc->SectionType, &SectionType); + + // Locate Section base address and populate Memory Error Section(Cper) data. + ErrBlockSectionData = (VOID *)(ErrBlockSectionDesc + 1); + CopyMem ( + ErrBlockSectionData, + (VOID *)&MemorySectionInfo, + sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA) + ); +} + +/** + DMC-620 1-bit ECC event handler. + + Supports multiple DMC error processing. Current implementation handles the + DRAM ECC errors. + + @param[in] DispatchHandle The unique handle assigned to this handler by + MmiHandlerRegister(). + @param[in] Context Points to an optional handler context which + was specified when the handler was + registered. + @param[in, out] CommBuffer Buffer passed from Non-MM to MM environmvent. + @param[in, out] CommBufferSize The size of the CommBuffer. + + @retval EFI_SUCCESS Event handler successful. + @retval Other Failure of event handler. +**/ +STATIC +EFI_STATUS +EFIAPI +Dmc620ErrorEventHandler ( + IN EFI_HANDLE DispatchHandle, + IN CONST VOID *Context, OPTIONAL + IN OUT VOID *CommBuffer, OPTIONAL + IN OUT UINTN *CommBufferSize OPTIONAL + ) +{ + DMC620_REGS_TYPE *DmcCtrl; + UINTN DmcIdx; + UINTN ErrGsr; + + // DMC instance which raised the error event. + DmcIdx = *(UINTN *)CommBuffer; + // Error Record Base address for that DMC instance. + DmcCtrl = (DMC620_REGS_TYPE *)(FixedPcdGet64 (PcdDmc620RegisterBase) + + (FixedPcdGet64 (PcdDmc620CtrlSize) * DmcIdx)); + + DEBUG (( + DEBUG_INFO, + "%a: DMC error event raised for DMC: %d with DmcBaseAddr: 0x%x \n", + __FUNCTION__, + DmcIdx, + (UINTN)DmcCtrl + )); + + ErrGsr = MmioRead32 ((UINTN)&DmcCtrl->Errgsr); + + if (ErrGsr & DMC620_ERR_GSR_ECC_CORRECTED_FH) { + // Handle corrected 1-bit DRAM ECC error. + Dmc620HandleDramError ( + DmcCtrl, + DmcIdx, + DMC620_ERR_GSR_ECC_CORRECTED_FH, + FixedPcdGet64 ( + PcdDmc620DramOneBitErrorDataBase) + + (FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize) * DmcIdx) + ); + } else { + DEBUG (( + DEBUG_ERROR, + "%a: Unsupported DMC-620 error reported, ignoring\n", + __FUNCTION__ + )); + } + + // No data to send using the MM communication buffer so clear the comm buffer + // size. + *CommBufferSize = 0; + + return EFI_SUCCESS; +} + +/** + Initialize function for the driver. + + Registers MMI handlers to process fault events on DMC and installs required + protocols to publish the error source descriptors. + + @param[in] ImageHandle Handle to image. + @param[in] SystemTable Pointer to System table. + + @retval EFI_SUCCESS On successful installation of error event handler for + DMC. + @retval Other Failure in installing error event handlers for DMC. +**/ +EFI_STATUS +EFIAPI +Dmc620MmDriverInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_MM_SYSTEM_TABLE *SystemTable + ) +{ + EFI_MM_SYSTEM_TABLE *mMmst; + EFI_STATUS Status; + EFI_HANDLE DispatchHandle; + + ASSERT (SystemTable != NULL); + mMmst = SystemTable; + + // Register MMI handlers for DMC-620 error events. + Status = mMmst->MmiHandlerRegister ( + Dmc620ErrorEventHandler, + &gArmDmcEventHandlerGuid, + &DispatchHandle + ); + if (EFI_ERROR(Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: Registration failed for DMC error event handler, Status:%r\n", + __FUNCTION__, + Status + )); + + return Status; + } + + // Installs the HEST error source descriptor protocol. + Status = Dmc620InstallErrorSourceDescProtocol (SystemTable); + if (EFI_ERROR(Status)) { + mMmst->MmiHandlerUnRegister (DispatchHandle); + } + + return Status; +} diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c b/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c new file mode 100644 index 000000000000..59dcff019a07 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c @@ -0,0 +1,194 @@ +/** @file + Create and populate DMC-620 HEST error source descriptors. + + Implements the HEST Error Source Descriptor protocol. Creates the GHESv2 + type error source descriptors for supported hardware errors. Appends + the created descriptors to the Buffer parameter of the protocol. + + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - ACPI Reference Specification 6.3, Table 18-393 GHESv2 Structure. +**/ + +#include <Library/AcpiLib.h> +#include <Dmc620Mm.h> + +/** + Populate the DMC-620 DRAM Error Source Descriptor. + + Creates error source descriptor of GHESv2 type to be appended to the Hest + table. The error source descriptor is populated with appropriate values + based on the instance number of DMC-620. Allocates and initializes memory + for Error Status Block(Cper) section for each error source. + + @param[in] ErrorDesc HEST error source descriptor Information. + @param[in] DmcIdx Instance number of the DMC-620. +**/ +STATIC +VOID +EFIAPI +Dmc620SetupDramErrorDescriptor ( + IN EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *ErrorDesc, + IN UINTN DmcIdx + ) +{ + UINTN ErrorBlockData; + + // + // Address of reserved memory for the error status block that will be used + // to hold the information about the DRAM error. Initialize this memory + // with 0. + // + ErrorBlockData = FixedPcdGet64 (PcdDmc620DramOneBitErrorDataBase) + + (FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize) * + DmcIdx); + SetMem ( + (VOID *)ErrorBlockData, + FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize), + 0 + ); + + // Build the DRAM error source descriptor. + *ErrorDesc = + (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE) { + .Type = EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2, + .SourceId = FixedPcdGet16 (PcdDmc620DramOneBitErrorSourceId) + DmcIdx, + .RelatedSourceId = 0xFFFF, + .Flags = 0, + .Enabled = 1, + .NumberOfRecordsToPreAllocate = 1, + .MaxSectionsPerRecord = 1, + .MaxRawDataLength = sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), + .ErrorStatusAddress = ARM_GAS64 (ErrorBlockData + 8), + .NotificationStructure = + EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE_INIT ( + EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION, + 0, + FixedPcdGet32 (PcdDmc620DramErrorSdeiEventBase) + DmcIdx + ), + .ErrorStatusBlockLength = + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) + + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + + sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), + .ReadAckRegister = ARM_GAS64 (ErrorBlockData), + .ReadAckPreserve = 0, + .ReadAckWrite = 0 + }; +} + +/** + MMI handler implementing the HEST error source descriptor protocol. + + Returns the error source descriptor information for all supported hardware + error sources. As mentioned in the HEST Error Source Decriptor protocol this + handler returns with error source count and length when Buffer parameter is + NULL. + + @param[in] This Pointer for this protocol. + @param[out] Buffer HEST error source descriptor Information + buffer. + @param[out] ErrorSourcesLength Total length of Error Source Descriptors + @param[out] ErrorSourceCount Total number of supported error spurces. + + @retval EFI_SUCCESS Buffer has valid Error Source descriptor + information. + @retval EFI_INVALID_PARAMETER Buffer is NULL. +**/ +STATIC +EFI_STATUS +EFIAPI +Dmc620ErrorSourceDescInfoGet ( + IN MM_HEST_ERROR_SOURCE_DESC_PROTOCOL *This, + OUT VOID **Buffer, + OUT UINTN *ErrorSourcesLength, + OUT UINTN *ErrorSourcesCount + ) +{ + EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *ErrorDescriptor; + UINTN DmcIdx; + + // + // Update the error source length and error source count parameters. + // + *ErrorSourcesLength = + FixedPcdGet64 (PcdDmc620NumCtrl) * + FixedPcdGet64 (PcdDmc620ErrSourceCount) * + sizeof (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE); + *ErrorSourcesCount = FixedPcdGet64 (PcdDmc620NumCtrl) * + FixedPcdGet64 (PcdDmc620ErrSourceCount); + + // + // If 'Buffer' is NULL return, as this invocation of the protocol handler is + // to determine the total size of all the error source descriptor instances. + // + if (Buffer == NULL) { + return EFI_INVALID_PARAMETER; + } + + // Buffer to be updated with error source descriptor(s) information. + ErrorDescriptor = + (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *)*Buffer; + + // + // Create and populate the available error source descriptor for all DMC(s). + // + for (DmcIdx = 0; DmcIdx < FixedPcdGet64 (PcdDmc620NumCtrl); DmcIdx++) { + // Add the one-bit DRAM error source descriptor. + Dmc620SetupDramErrorDescriptor (ErrorDescriptor, DmcIdx); + ErrorDescriptor++; + } + + return EFI_SUCCESS; +} + +// +// DMC-620 MM_HEST_ERROR_SOURCE_DESC_PROTOCOL protocol instance. +// +STATIC MM_HEST_ERROR_SOURCE_DESC_PROTOCOL mDmc620ErrorSourceDesc = { + Dmc620ErrorSourceDescInfoGet +}; + +/** + Allow reporting of supported DMC-620 error sources. + + Install the HEST Error Source Descriptor protocol handler to allow publishing + of the supported Dmc(s) hardware error sources. + + @param[in] MmSystemTable Pointer to System table. + + @retval EFI_SUCCESS Protocol installation successful. + @retval EFI_INVALID_PARAMETER Invalid system table parameter. +**/ +EFI_STATUS +Dmc620InstallErrorSourceDescProtocol ( + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ) +{ + EFI_HANDLE mDmcHandle = NULL; + EFI_STATUS Status; + + // Check if the MmSystemTable is initialized. + if (MmSystemTable == NULL) { + return EFI_INVALID_PARAMETER; + } + + // Install HEST error source descriptor protocol for DMC(s). + Status = MmSystemTable->MmInstallProtocolInterface ( + &mDmcHandle, + &gMmHestErrorSourceDescProtocolGuid, + EFI_NATIVE_INTERFACE, + &mDmc620ErrorSourceDesc + ); + if (EFI_ERROR(Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: Failed installing HEST error source protocol, status: %r\n", + __FUNCTION__, + Status + )); + } + + return Status; +} -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver Omkar Anand Kulkarni @ 2021-09-27 17:30 ` Sami Mujawar 0 siblings, 0 replies; 11+ messages in thread From: Sami Mujawar @ 2021-09-27 17:30 UTC (permalink / raw) To: Omkar Anand Kulkarni, devel; +Cc: Ard Biesheuvel, nd [-- Attachment #1: Type: text/plain, Size: 34324 bytes --] Hi Omkar, Thank you for this patch. Please find my feedback marked inline as [SAMI]. Regards, Sami Mujawar On 24/08/2021 07:00 AM, Omkar Anand Kulkarni wrote: > DMC-620 memory controller improves system reliability by generating > interrupts on detecting ECC errors on the data. Add a initial DMC-620 MM > driver that implements a MMI handler for handling single-bit ECC error > events originating from the DRAM. > > The driver implements the HEST error source descriptor protocol in order > to publish the GHES error source descriptor for single-bit DRAM errors. > The GHES error source descriptor that is published is of type 'memory > error'. A GHES error source descriptor is published for each instances > if the DMC-620 controller in the system. > > The driver registers a MMI handler for handling 1-bit DRAM ECC error > events. The MMI handler, when invoked, reads the DMC-620 error record > registers and populates the EFI_PLATFORM_MEMORY_ERROR_DATA type error > section information structure with the corresponding information read > from the error record registers. > > Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> > Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> > --- > Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec | 30 ++ > Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf | 61 ++++ > Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h | 174 ++++++++++ > Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c | 362 ++++++++++++++++++++ > Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c | 194 +++++++++++ > 5 files changed, 821 insertions(+) > > diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec > new file mode 100644 > index 000000000000..8f3508574203 > --- /dev/null > +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec > @@ -0,0 +1,30 @@ > +## @file > +# DMC-620 MM driver specific declrations. > +# > +# This file defines GUIDs and declares PCD values for DMC-620 MM driver. > +# > +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + DEC_SPECIFICATION = 0x0001001A > + PACKAGE_NAME = Dmc620Mm > + PACKAGE_GUID = 94110B10-8E72-42A0-8963-D2B57FCF0F38 > + PACKAGE_VERSION = 0.1 > + > +[Guids] > + gDmc620MmTokenSpaceGuid = {0xc305f72a, 0xd10d, 0x45e8, { 0x81, 0x78, 0x51, 0x8b, 0x78, 0x62, 0x77, 0x79 } } > + gArmDmcEventHandlerGuid = { 0x5ef0afd5, 0xe01a, 0x4c30, { 0x86, 0x19, 0x45, 0x46, 0x26, 0x91, 0x80, 0x98 }} > + > +[PcdsFixedAtBuild.common] > + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold|10|UINT32|0x00000004 > + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize|0x100000|UINT32|0x00000003 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase|0|UINT32|0x00000006 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase|0|UINT64|0x00000007 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize|0|UINT64|0x00000008 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId|0|UINT16|0x00000009 > + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount|1|UINT32|0x00000005 > + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl|2|UINT32|0x00000001 > + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase|0x4E000000|UINT64|0x00000002 > diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf > new file mode 100644 > index 000000000000..8cad07749a23 > --- /dev/null > +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf > @@ -0,0 +1,61 @@ > +## @file > +# StandaloneMM driver for the DMC620 Memory Controller. > +# > +# Driver to handle 1-bit Corrected DRAM errors for DMC(s). > +# > +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A [SAMI] Please use latest INF version i.e. 0x0001001B (see https://edk2-docs.gitbook.io/edk-ii-inf-specification/2_inf_overview/24_-defines-_section). > + BASE_NAME = StandaloneMmDmc620Driver > + FILE_GUID = CB53ACD9-A1A1-43B3-A638-AC74DA5D9DA2 > + MODULE_TYPE = MM_STANDALONE > + VERSION_STRING = 1.0 > + PI_SPECIFICATION_VERSION = 0x00010032 > + ENTRY_POINT = Dmc620MmDriverInitialize > + > +[Sources] > + Dmc620Mm.c > + Dmc620MmErrorSourceInfo.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + ArmPlatformPkg/ArmPlatformPkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec > + StandaloneMmPkg/StandaloneMmPkg.dec > + > +[LibraryClasses] > + ArmLib > + ArmSvcLib > + BaseMemoryLib > + DebugLib > + StandaloneMmDriverEntryPoint > + > +[Protocols] > + gMmHestErrorSourceDescProtocolGuid ##PRODUCES > + > +[FixedPcd] > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize > + > + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold > + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize > + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId > + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount > + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl > + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase > + > +[Guids] > + gArmDmcEventHandlerGuid > + > +[Depex] > + TRUE > diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h > new file mode 100644 > index 000000000000..f5c96396b870 > --- /dev/null > +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h > @@ -0,0 +1,174 @@ > +/** @file > + DMC-620 memory controller MM driver definitions. > + > + Macros and structure definitions for DMC-620 error handling MM driver. > + [SAMI] Is it possible to add the DMC specification reference here as well, please? > + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#ifndef DMC620_MM_DRIVER_H_ > +#define DMC620_MM_DRIVER_H_ > + > +#include <Base.h> > +#include <Guid/Cper.h> > +#include <IndustryStandard/Acpi.h> > +#include <Library/ArmLib.h> > +#include <Library/BaseMemoryLib.h> > +#include <Library/DebugLib.h> > +#include <Library/IoLib.h> > +#include <Protocol/HestErrorSourceInfo.h> > + > +// DMC-620 memc register field values and masks. > +#define DMC620_MEMC_STATUS_MASK (BIT2|BIT1|BIT0) > +#define DMC620_MEMC_STATUS_READY (BIT1|BIT0) > +#define DMC620_MEMC_CMD_EXECUTE_DRAIN (BIT2|BIT0) > + > +// DMC-620 Error Record Status register fields values and masks. > +#define DMC620_ERR_STATUS_MV BIT26 > +#define DMC620_ERR_STATUS_AV BIT31 > + > +// DMC-620 Error Record MISC-0 register fields values and masks. > +#define DMC620_ERR_MISC0_COLUMN_MASK \ > + (BIT9|BIT8|BIT7|BIT6|BIT5|BIT4|BIT3|BIT2|BIT1|BIT0) > +#define DMC620_ERR_MISC0_ROW_MASK (0x0FFFFC00) > +#define DMC620_ERR_MISC0_ROW_SHIFT 10 > +#define DMC620_ERR_MISC0_RANK_MASK (BIT30|BIT29|BIT28) > +#define DMC620_ERR_MISC0_RANK_SHIFT 28 > +#define DMC620_ERR_MISC0_VAILD BIT31 > + > +// DMC-620 Error Record register fields values and mask. > +#define DMC620_ERR_MISC1_VAILD BIT31 > +#define DMC620_ERR_MISC1_BANK_MASK (BIT3|BIT2|BIT1|BIT0) > + > +// DMC-620 Error Record Global Status register bit field. > +#define DMC620_ERR_GSR_ECC_CORRECTED_FH BIT1 > + > +// > +// DMC-620 Memory Mapped register definitions. > +// > + > +// Unused DMC-620 register fields. > +#define RESV_0 0x1BD > +#define RESV_1 0x2C > +#define RESV_2 0x8 > +#define RESV_3 0x58 > + > +#pragma pack(1) > +typedef struct { [SAMI] Can you add documentation for what this structure describes, please? > + UINT32 MemcStatus; > + UINT32 MemcConfig; > + UINT32 MemcCmd; > + UINT32 Reserved[RESV_0]; > + UINT32 Err0Fr; > + UINT32 Reserved1; > + UINT32 Err0Ctlr0; > + UINT32 Err0Ctlr1; > + UINT32 Err0Status; > + UINT8 Reserved2[RESV_1]; > + UINT32 Err1Fr; > + UINT32 Reserved3; > + UINT32 Err1Ctlr; > + UINT32 Reserved4; > + UINT32 Err1Status; > + UINT32 Reserved5; > + UINT32 Err1Addr0; > + UINT32 Err1Addr1; > + UINT32 Err1Misc0; > + UINT32 Err1Misc1; > + UINT32 Err1Misc2; > + UINT32 Err1Misc3; > + UINT32 Err1Misc4; > + UINT32 Err1Misc5; > + UINT8 Reserved6[RESV_2]; > + UINT32 Err2Fr; > + UINT32 Reserved7; > + UINT32 Err2Ctlr; > + UINT32 Reserved8; > + UINT32 Err2Status; > + UINT32 Reserved9; > + UINT32 Err2Addr0; > + UINT32 Err2Addr1; > + UINT32 Err2Misc0; > + UINT32 Err2Misc1; > + UINT32 Err2Misc2; > + UINT32 Err2Misc3; > + UINT32 Err2Misc4; > + UINT32 Err2Misc5; > + UINT8 Reserved10[RESV_2]; > + UINT32 Reserved11[RESV_3]; > + UINT32 Errgsr; > +} DMC620_REGS_TYPE; > + > +// DMC-620 Typical Error Record register definition. > +typedef struct { > + UINT32 ErrFr; > + UINT32 Reserved; > + UINT32 ErrCtlr; > + UINT32 Reserved1; > + UINT32 ErrStatus; > + UINT32 Reserved2; > + UINT32 ErrAddr0; > + UINT32 ErrAddr1; > + UINT32 ErrMisc0; > + UINT32 ErrMisc1; > + UINT32 ErrMisc2; > + UINT32 ErrMisc3; > + UINT32 ErrMisc4; > + UINT32 ErrMisc5; > + UINT8 Reserved3[RESV_2]; > +} DMC620_ERR_REGS_TYPE; > +#pragma pack() > + > +// List of supported error sources by DMC-620. > +typedef enum { > + DramEccCfh = 0, > + DramEccFh, > + ChiFh, > + SramEccCfh, > + SramEccFh, > + DmcErrRecovery > +} DMC_ERR_SOURCES; > + > +/** > + MMI handler implementing the HEST error source desc protocol. > + > + Returns the error source descriptor information for all DMC(s) error sources > + and also returns its count and length. > + > + @param[in] This Pointer for this protocol. > + @param[out] Buffer HEST error source descriptor Information > + buffer. > + @param[out] ErrorSourcesLength Total length of Error Source Descriptors. > + @param[out] ErrorSourceCount Total number of supported error sources. > + > + @retval EFI_SUCCESS Buffer has valid Error Source descriptor > + information. > + @retval EFI_INVALID_PARAMETER Buffer is NULL. > +**/ > +EFI_STATUS > +EFIAPI > +DmcErrorSourceDescInfoGet ( > + IN MM_HEST_ERROR_SOURCE_DESC_PROTOCOL *This, > + OUT VOID **Buffer, > + OUT UINTN *ErrorSourcesLength, > + OUT UINTN *ErrorSourcesCount > + ); > + > +/** > + Allow reporting of supported DMC-620 error sources. > + > + Install the HEST Error Source Descriptor protocol handler to allow publishing > + of the supported DMC-620 memory controller error sources. > + > + @param[in] MmSystemTable Pointer to System table. > + > + @retval EFI_SUCCESS Protocol installation successful. > + @retval EFI_INVALID_PARAMETER Invalid system table parameter. > +**/ > +EFI_STATUS > +Dmc620InstallErrorSourceDescProtocol ( > + IN EFI_MM_SYSTEM_TABLE *MmSystemTable > + ); > + > +#endif // DMC620_MM_DRIVER_H_ > diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c > new file mode 100644 > index 000000000000..91daf713f275 > --- /dev/null > +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c > @@ -0,0 +1,362 @@ > +/** @file > + DMC-620 Memory Controller error handling (Standalone MM) driver. > + > + Supports 1-bit Bit DRAM error handling for multiple DMC instances. On a error > + event, publishes the CPER error record of Memory Error type. > + > + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference > + - DMC620 Dynamic Memory Controller, revision r1p0. > + - UEFI Reference Specification 2.8, Section N.2.5 Memory Error Section > +**/ > + > +#include <Dmc620Mm.h> > + > +/** > + Helper function to handle the DMC-620 DRAM errors. > + > + Reads the DRAM error record registers. Creates a CPER error record of type > + 'Memory Error' and populates it with information collected from DRAM error > + record registers. > + > + @param[in] DmcCtrl A pointer to DMC control registers. > + @param[in] DmcInstance DMC instance which raised the fault event. > + @param[in] ErrRecType A type of the DMC error record. > + @param[in] ErrorBlockBaseAddress Unique address for populating the error > + block status for given DMC error source. > +**/ > +STATIC > +VOID > +Dmc620HandleDramError ( > + IN DMC620_REGS_TYPE *DmcCtrl, > + IN UINTN DmcInstance, > + IN UINTN ErrRecType, > + IN UINTN ErrorBlockBaseAddress > + ) > +{ > + EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE *ErrBlockSectionDesc; > + EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE *ErrBlockStatusHeaderData; > + EFI_PLATFORM_MEMORY_ERROR_DATA MemorySectionInfo = {0}; [SAMI] Call ZeroMem() to initialise MemorySectionInfo structure. > + DMC620_ERR_REGS_TYPE *ErrRecord; > + EFI_GUID SectionType; > + UINT32 ResetReg; > + VOID *ErrBlockSectionData; > + UINTN *ErrorStatusRegister; > + UINTN *ReadAckRegister; > + UINTN *ErrStatusBlock; > + UINTN ErrStatus; > + UINTN ErrAddr0; > + UINTN ErrAddr1; > + UINTN ErrMisc0; > + UINTN ErrMisc1; > + UINT8 CorrectedError; > + > + // > + // Check the type of DRAM error (1-bit or 2-bit) and accordingly select > + // error record to use. > + // > + if (ErrRecType == DMC620_ERR_GSR_ECC_CORRECTED_FH) { > + DEBUG (( > + DEBUG_INFO, > + "%a: DRAM ECC Corrected Fault (1-Bit ECC error)\n", > + __FUNCTION__ > + )); > + ErrRecord = (DMC620_ERR_REGS_TYPE *)&DmcCtrl->Err1Fr; > + CorrectedError = 1; > + } else { > + DEBUG (( > + DEBUG_INFO, > + "%a: DRAM ECC Fault Handling (2-bit ECC error)\n", > + __FUNCTION__ > + )); > + ErrRecord = (DMC620_ERR_REGS_TYPE *)&DmcCtrl->Err2Fr; > + CorrectedError = 0; > + } > + > + // Read most recent DRAM error record registers. > + ErrStatus = MmioRead32 ((UINTN)&ErrRecord->ErrStatus); [SAMI] Why is a typecast to UINTN required here? If ErrRecord->ErrStatus is the address of the ErrStatus register then this should have been UINTN in DMC620_ERR_REGS_TYPE, right? The same question for the typecasts used in Mmio[Read|Write]32 the rest of this patch. I can see why you did this after having a look at https://developer.arm.com/documentation/100568/0100/programmers-model/register-summary?lang=en. I think you should use #defines for the register offsets instead of defining the DMC620_ERR_REGS_TYPE structure. > + ErrAddr0 = MmioRead32 ((UINTN)&ErrRecord->ErrAddr0); > + ErrAddr1 = MmioRead32 ((UINTN)&ErrRecord->ErrAddr1); > + ErrMisc0 = MmioRead32 ((UINTN)&ErrRecord->ErrMisc0); > + ErrMisc1 = MmioRead32 ((UINTN)&ErrRecord->ErrMisc1); > + > + // Clear the status register so that new error records are populated. > + ResetReg = MmioRead32 ((UINTN)&ErrRecord->ErrStatus); > + MmioWrite32 ((UINTN)&ErrRecord->ErrStatus, ResetReg); > + > + // > + // Get Physical address of DRAM error from Error Record Address register > + // and populate Memory Error Section. > + // > + if (ErrStatus & DMC620_ERR_STATUS_AV) { [SAMI] If condition must evaluate a boolean expression. https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/5_source_files/57_c_programming#5-7-2-1-boolean-values-variable-type-boolean-do-not-require-explicit-comparisons-to-true-or-false > + DEBUG (( > + DEBUG_INFO, > + "%a: DRAM Error: Address_0 : 0x%x Address_1 : 0x%x\n", > + __FUNCTION__, > + ErrAddr0, > + ErrAddr1 > + )); > + > + // > + // Populate Memory CPER section with DRAM error address (48 bits) and > + // address mask fields. > + // > + MemorySectionInfo.ValidFields |= > + EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID | > + EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID; > + MemorySectionInfo.PhysicalAddressMask = 0xFFFFFFFFFFFF; > + MemorySectionInfo.PhysicalAddress = (ErrAddr1 << 32) | ErrAddr0; > + } > + > + // > + // Read the Error Record Misc registers and populate relevant fields in > + // Memory CPER error section. > + // > + if ((ErrStatus & DMC620_ERR_STATUS_MV) > + && (ErrMisc0 & DMC620_ERR_MISC0_VAILD)) > + { > + // Populate Memory error section wih DRAM column information. > + MemorySectionInfo.ValidFields |= EFI_PLATFORM_MEMORY_COLUMN_VALID; > + MemorySectionInfo.Column = ErrMisc0 & DMC620_ERR_MISC0_COLUMN_MASK; > + > + // > + // Populate Memory Error Section with DRAM row information. > + // Row bits (bit 16 and 17) are to be filled as extended. > + // > + MemorySectionInfo.ValidFields |= > + EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID; > + MemorySectionInfo.Row = > + (ErrMisc0 & DMC620_ERR_MISC0_ROW_MASK) >> DMC620_ERR_MISC0_ROW_SHIFT; > + MemorySectionInfo.Extended = > + ((ErrMisc0 & DMC620_ERR_MISC0_ROW_MASK) >> > + (DMC620_ERR_MISC0_ROW_SHIFT + 16)); > + > + // Populate Memory Error Section wih DRAM rank information. > + MemorySectionInfo.ValidFields |= EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID; > + MemorySectionInfo.RankNum = (ErrMisc0 & DMC620_ERR_MISC0_RANK_MASK) >> > + DMC620_ERR_MISC0_RANK_SHIFT; > + } > + > + // Read Error Record MISC1 register and populate the Memory Error Section. > + if ((ErrStatus & DMC620_ERR_STATUS_MV) > + && (ErrMisc1 & DMC620_ERR_MISC1_VAILD)) > + { > + MemorySectionInfo.ValidFields |= EFI_PLATFORM_MEMORY_BANK_VALID; > + MemorySectionInfo.Bank = (ErrMisc1 & DMC620_ERR_MISC1_BANK_MASK); > + } > + > + // > + // Misc registers 2..5 are not used and convey only the error counter > + // information. They are cleared as they do not contribute in Error > + // Record creation. > + // > + if (ErrStatus & DMC620_ERR_STATUS_MV) { > + ResetReg = 0x0; > + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc2, ResetReg); > + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc3, ResetReg); > + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc4, ResetReg); > + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc5, ResetReg); > + } > + > + // > + // Reset error records Status register for recording new DRAM error syndrome > + // information. > + // > + ResetReg = MmioRead32 ((UINTN)&ErrRecord->ErrStatus); > + MmioWrite32 ((UINTN)&ErrRecord->ErrStatus, ResetReg); > + > + // > + // Allocate memory for Error Acknowledge register, Error Status register and > + // Error status block data. > + // > + ReadAckRegister = (UINTN *)ErrorBlockBaseAddress; > + ErrorStatusRegister = (UINTN *)ErrorBlockBaseAddress + 1; [SAMI] Can you check if the pointer math here is what you expect, please? It will help if some explanation is added. Memory certainly is not being allocated here. > + ErrStatusBlock = (UINTN *)ErrorStatusRegister + 1; > + > + // Initialize Error Status Register with Error Status Block address. > + *ErrorStatusRegister = (UINTN)ErrStatusBlock; > + > + // > + // Locate Block Status Header base address and populate it with Error Status > + // Block Header information. > + // > + ErrBlockStatusHeaderData = (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE *) > + ErrStatusBlock; > + *ErrBlockStatusHeaderData = > + (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) { > + .BlockStatus = { > + .UncorrectableErrorValid = ((CorrectedError == 0) ? 0 : 1), > + .CorrectableErrorValid = ((CorrectedError == 1) ? 1 : 0), > + .MultipleUncorrectableErrors = 0x0, > + .MultipleCorrectableErrors = 0x0, > + .ErrorDataEntryCount = 0x1 > + }, [SAMI] This initialisation form at is not supported by all compilers. Can you fix this, please? > + .RawDataOffset = > + (sizeof (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) + > + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE)), > + .RawDataLength = 0, > + .DataLength = > + (sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + > + sizeof(EFI_PLATFORM_MEMORY_ERROR_DATA)), > + .ErrorSeverity = ((CorrectedError == 1) ? > + EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED : > + EFI_ACPI_6_3_ERROR_SEVERITY_FATAL), > + }; > + > + // > + // Locate Section Descriptor base address and populate Error Status Section > + // Descriptor data. > + // > + ErrBlockSectionDesc = (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE *) > + (ErrBlockStatusHeaderData + 1); > + *ErrBlockSectionDesc = > + (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) { > + .ErrorSeverity = ((CorrectedError == 1) ? > + EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED : > + EFI_ACPI_6_3_ERROR_SEVERITY_FATAL), > + .Revision = EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION, > + .ValidationBits = 0, > + .Flags = 0, > + .ErrorDataLength = sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), > + .FruId = {0}, > + .FruText = {0}, > + .Timestamp = {0}, > + }; > + SectionType = (EFI_GUID) EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID; > + CopyGuid ((EFI_GUID *)ErrBlockSectionDesc->SectionType, &SectionType); > + > + // Locate Section base address and populate Memory Error Section(Cper) data. > + ErrBlockSectionData = (VOID *)(ErrBlockSectionDesc + 1); > + CopyMem ( > + ErrBlockSectionData, > + (VOID *)&MemorySectionInfo, > + sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA) > + ); > +} > + > +/** > + DMC-620 1-bit ECC event handler. > + > + Supports multiple DMC error processing. Current implementation handles the > + DRAM ECC errors. > + > + @param[in] DispatchHandle The unique handle assigned to this handler by > + MmiHandlerRegister(). > + @param[in] Context Points to an optional handler context which > + was specified when the handler was > + registered. > + @param[in, out] CommBuffer Buffer passed from Non-MM to MM environmvent. > + @param[in, out] CommBufferSize The size of the CommBuffer. > + > + @retval EFI_SUCCESS Event handler successful. > + @retval Other Failure of event handler. > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +Dmc620ErrorEventHandler ( > + IN EFI_HANDLE DispatchHandle, > + IN CONST VOID *Context, OPTIONAL > + IN OUT VOID *CommBuffer, OPTIONAL > + IN OUT UINTN *CommBufferSize OPTIONAL > + ) > +{ > + DMC620_REGS_TYPE *DmcCtrl; > + UINTN DmcIdx; > + UINTN ErrGsr; > + > + // DMC instance which raised the error event. > + DmcIdx = *(UINTN *)CommBuffer; [SAMI] Would it be good to add validation for the DMC instance index? > + // Error Record Base address for that DMC instance. > + DmcCtrl = (DMC620_REGS_TYPE *)(FixedPcdGet64 (PcdDmc620RegisterBase) + > + (FixedPcdGet64 (PcdDmc620CtrlSize) * DmcIdx)); > + > + DEBUG (( > + DEBUG_INFO, > + "%a: DMC error event raised for DMC: %d with DmcBaseAddr: 0x%x \n", > + __FUNCTION__, > + DmcIdx, > + (UINTN)DmcCtrl > + )); > + > + ErrGsr = MmioRead32 ((UINTN)&DmcCtrl->Errgsr); > + > + if (ErrGsr & DMC620_ERR_GSR_ECC_CORRECTED_FH) { [SAMI] Fix if condition. > + // Handle corrected 1-bit DRAM ECC error. > + Dmc620HandleDramError ( > + DmcCtrl, > + DmcIdx, > + DMC620_ERR_GSR_ECC_CORRECTED_FH, > + FixedPcdGet64 ( > + PcdDmc620DramOneBitErrorDataBase) + > + (FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize) * DmcIdx) > + ); > + } else { > + DEBUG (( > + DEBUG_ERROR, > + "%a: Unsupported DMC-620 error reported, ignoring\n", > + __FUNCTION__ > + )); > + } > + > + // No data to send using the MM communication buffer so clear the comm buffer > + // size. > + *CommBufferSize = 0; > + > + return EFI_SUCCESS; > +} > + > +/** > + Initialize function for the driver. > + > + Registers MMI handlers to process fault events on DMC and installs required > + protocols to publish the error source descriptors. > + > + @param[in] ImageHandle Handle to image. > + @param[in] SystemTable Pointer to System table. > + > + @retval EFI_SUCCESS On successful installation of error event handler for > + DMC. > + @retval Other Failure in installing error event handlers for DMC. > +**/ > +EFI_STATUS > +EFIAPI > +Dmc620MmDriverInitialize ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_MM_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_MM_SYSTEM_TABLE *mMmst; > + EFI_STATUS Status; > + EFI_HANDLE DispatchHandle; > + > + ASSERT (SystemTable != NULL); > + mMmst = SystemTable; > + > + // Register MMI handlers for DMC-620 error events. > + Status = mMmst->MmiHandlerRegister ( > + Dmc620ErrorEventHandler, > + &gArmDmcEventHandlerGuid, > + &DispatchHandle > + ); > + if (EFI_ERROR(Status)) { [SAMI] Space needed after EFI_ERROR and opening bracket. Same comment for other places in this patch. > + DEBUG (( > + DEBUG_ERROR, > + "%a: Registration failed for DMC error event handler, Status:%r\n", > + __FUNCTION__, > + Status > + )); > + > + return Status; > + } > + > + // Installs the HEST error source descriptor protocol. > + Status = Dmc620InstallErrorSourceDescProtocol (SystemTable); > + if (EFI_ERROR(Status)) { > + mMmst->MmiHandlerUnRegister (DispatchHandle); > + } > + > + return Status; > +} > diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c b/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c > new file mode 100644 > index 000000000000..59dcff019a07 > --- /dev/null > +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c > @@ -0,0 +1,194 @@ > +/** @file > + Create and populate DMC-620 HEST error source descriptors. > + > + Implements the HEST Error Source Descriptor protocol. Creates the GHESv2 > + type error source descriptors for supported hardware errors. Appends > + the created descriptors to the Buffer parameter of the protocol. > + > + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - ACPI Reference Specification 6.3, Table 18-393 GHESv2 Structure. > +**/ > + > +#include <Library/AcpiLib.h> > +#include <Dmc620Mm.h> > + > +/** > + Populate the DMC-620 DRAM Error Source Descriptor. > + > + Creates error source descriptor of GHESv2 type to be appended to the Hest > + table. The error source descriptor is populated with appropriate values > + based on the instance number of DMC-620. Allocates and initializes memory > + for Error Status Block(Cper) section for each error source. > + > + @param[in] ErrorDesc HEST error source descriptor Information. > + @param[in] DmcIdx Instance number of the DMC-620. > +**/ > +STATIC > +VOID > +EFIAPI > +Dmc620SetupDramErrorDescriptor ( > + IN EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *ErrorDesc, > + IN UINTN DmcIdx > + ) > +{ > + UINTN ErrorBlockData; > + > + // > + // Address of reserved memory for the error status block that will be used > + // to hold the information about the DRAM error. Initialize this memory > + // with 0. > + // > + ErrorBlockData = FixedPcdGet64 (PcdDmc620DramOneBitErrorDataBase) + > + (FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize) * > + DmcIdx); > + SetMem ( > + (VOID *)ErrorBlockData, > + FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize), > + 0 > + ); > + > + // Build the DRAM error source descriptor. > + *ErrorDesc = > + (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE) { > + .Type = EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2, > + .SourceId = FixedPcdGet16 (PcdDmc620DramOneBitErrorSourceId) + DmcIdx, > + .RelatedSourceId = 0xFFFF, > + .Flags = 0, > + .Enabled = 1, > + .NumberOfRecordsToPreAllocate = 1, > + .MaxSectionsPerRecord = 1, > + .MaxRawDataLength = sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), > + .ErrorStatusAddress = ARM_GAS64 (ErrorBlockData + 8), [SAMI] This initialisation style is not protable and some compilers may not support this. Please change this. > + .NotificationStructure = > + EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE_INIT ( > + EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION, > + 0, > + FixedPcdGet32 (PcdDmc620DramErrorSdeiEventBase) + DmcIdx > + ), > + .ErrorStatusBlockLength = > + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) + > + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + > + sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), > + .ReadAckRegister = ARM_GAS64 (ErrorBlockData), > + .ReadAckPreserve = 0, > + .ReadAckWrite = 0 > + }; > +} > + > +/** > + MMI handler implementing the HEST error source descriptor protocol. > + > + Returns the error source descriptor information for all supported hardware > + error sources. As mentioned in the HEST Error Source Decriptor protocol this > + handler returns with error source count and length when Buffer parameter is > + NULL. > + > + @param[in] This Pointer for this protocol. > + @param[out] Buffer HEST error source descriptor Information > + buffer. > + @param[out] ErrorSourcesLength Total length of Error Source Descriptors > + @param[out] ErrorSourceCount Total number of supported error spurces. > + > + @retval EFI_SUCCESS Buffer has valid Error Source descriptor > + information. > + @retval EFI_INVALID_PARAMETER Buffer is NULL. > +**/ > +STATIC > +EFI_STATUS > +EFIAPI > +Dmc620ErrorSourceDescInfoGet ( > + IN MM_HEST_ERROR_SOURCE_DESC_PROTOCOL *This, > + OUT VOID **Buffer, > + OUT UINTN *ErrorSourcesLength, > + OUT UINTN *ErrorSourcesCount > + ) > +{ > + EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *ErrorDescriptor; > + UINTN DmcIdx; > + > + // > + // Update the error source length and error source count parameters. > + // > + *ErrorSourcesLength = > + FixedPcdGet64 (PcdDmc620NumCtrl) * > + FixedPcdGet64 (PcdDmc620ErrSourceCount) * > + sizeof (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE); > + *ErrorSourcesCount = FixedPcdGet64 (PcdDmc620NumCtrl) * > + FixedPcdGet64 (PcdDmc620ErrSourceCount); > + > + // > + // If 'Buffer' is NULL return, as this invocation of the protocol handler is > + // to determine the total size of all the error source descriptor instances. > + // > + if (Buffer == NULL) { > + return EFI_INVALID_PARAMETER; [SAMI] Depending on how this function is designed to be used, this check should be moved at the begining of the function. Is the function is expected to return the length and count to the caller so that the caller can allocate a buffer of the required size? [/SAMI] > + } > + > + // Buffer to be updated with error source descriptor(s) information. > + ErrorDescriptor = > + (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *)*Buffer; > + > + // > + // Create and populate the available error source descriptor for all DMC(s). > + // > + for (DmcIdx = 0; DmcIdx < FixedPcdGet64 (PcdDmc620NumCtrl); DmcIdx++) { > + // Add the one-bit DRAM error source descriptor. > + Dmc620SetupDramErrorDescriptor (ErrorDescriptor, DmcIdx); > + ErrorDescriptor++; > + } > + > + return EFI_SUCCESS; > +} > + > +// > +// DMC-620 MM_HEST_ERROR_SOURCE_DESC_PROTOCOL protocol instance. > +// > +STATIC MM_HEST_ERROR_SOURCE_DESC_PROTOCOL mDmc620ErrorSourceDesc = { > + Dmc620ErrorSourceDescInfoGet > +}; > + > +/** > + Allow reporting of supported DMC-620 error sources. > + > + Install the HEST Error Source Descriptor protocol handler to allow publishing > + of the supported Dmc(s) hardware error sources. > + > + @param[in] MmSystemTable Pointer to System table. > + > + @retval EFI_SUCCESS Protocol installation successful. > + @retval EFI_INVALID_PARAMETER Invalid system table parameter. > +**/ > +EFI_STATUS > +Dmc620InstallErrorSourceDescProtocol ( > + IN EFI_MM_SYSTEM_TABLE *MmSystemTable > + ) > +{ > + EFI_HANDLE mDmcHandle = NULL; > + EFI_STATUS Status; > + > + // Check if the MmSystemTable is initialized. > + if (MmSystemTable == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + // Install HEST error source descriptor protocol for DMC(s). > + Status = MmSystemTable->MmInstallProtocolInterface ( > + &mDmcHandle, > + &gMmHestErrorSourceDescProtocolGuid, > + EFI_NATIVE_INTERFACE, > + &mDmc620ErrorSourceDesc > + ); > + if (EFI_ERROR(Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: Failed installing HEST error source protocol, status: %r\n", > + __FUNCTION__, > + Status > + )); > + } > + > + return Status; > +} [-- Attachment #2: Type: text/html, Size: 37643 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [edk2-platforms][PATCH v3 2/5] Platform/Sgi: dmc-620 firmware-first error handling 2021-08-24 6:00 [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling Omkar Anand Kulkarni 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver Omkar Anand Kulkarni @ 2021-08-24 6:00 ` Omkar Anand Kulkarni 2021-10-04 12:45 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 3/5] Platform/Sgi: define memory region for GHES error status block Omkar Anand Kulkarni ` (2 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Omkar Anand Kulkarni @ 2021-08-24 6:00 UTC (permalink / raw) To: devel; +Cc: Ard Biesheuvel, Sami Mujawar Enable the use of HEST table generation protocol, GHES error source descriptor protocol and DMC-620 MM driver on ARM Neoverse Reference Design platforms. This allows firmware-first error handling and reporting of DMC-620 memory controller's 1-bit DRAM ECC errors. Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 17 +++++++++++ Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 30 ++++++++++++++++++++ Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 6 ++++ Platform/ARM/SgiPkg/SgiPlatform.fdf | 6 ++++ 4 files changed, 59 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 7e37732fb93c..bb32584de63d 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -21,6 +21,9 @@ DEFINE LPI_EN = FALSE DEFINE CPPC_EN = FALSE + # To allow firmware first error handling, set this to TRUE. + DEFINE ENABLE_GHES_MM = FALSE + [BuildOptions] *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES @@ -208,6 +211,12 @@ gArmTokenSpaceGuid.PcdMmBufferBase|0xFF600000 gArmTokenSpaceGuid.PcdMmBufferSize|0x10000 +!if $(ENABLE_GHES_MM) == TRUE + ## GHESv2 Generic Error memory space + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase|0xFF610000 + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 +!endif + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform @@ -365,3 +374,11 @@ !else ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf !endif + + # + # GHESv2 HEST error sources support + # + MdeModulePkg/Universal/Apei/HestDxe/HestDxe.inf +!if $(ENABLE_GHES_MM) == TRUE + ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceDxe.inf +!endif diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc index 5287e1f8e568..dbba82c74f39 100644 --- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc @@ -11,6 +11,10 @@ # Library Class section - list of all Library Classes needed by this Platform. # ################################################################################ +[Defines] + # To enable DMC-620 MM driver, set this to TRUE. + DEFINE ENABLE_DMC620_MM = FALSE + [LibraryClasses] # # Basic @@ -94,6 +98,25 @@ gEfiSecurityPkgTokenSpaceGuid.PcdUserPhysicalPresence|TRUE !endif +!if $(ENABLE_GHES_MM) == TRUE + ## GHESv2 Generic Error Memory Space + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase|0xFF610000 + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 +!endif + +!if $(ENABLE_DMC620_MM) == TRUE + ## DMC620 + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl|2 + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase|0x4E000000 + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize|0x100000 + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold|10 + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount|1 + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase|804 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase|0xFF610000 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize|0x100 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId|0 +!endif + ################################################################################################### # # Components Section - list of the modules and components that will be processed by compilation @@ -134,6 +157,13 @@ } !endif +!if $(ENABLE_GHES_MM) == TRUE + ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceStandaloneMm.inf +!endif +!if $(ENABLE_DMC620_MM) == TRUE + Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf +!endif + ################################################################################################### # # BuildOptions Section - Define the module specific tool chain flags that should be used as diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf index c1c24b747fa5..e029b9164570 100644 --- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf @@ -48,6 +48,12 @@ READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE +!if $(ENABLE_GHES_MM) == TRUE + INF ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceStandaloneMm.inf +!endif +!if $(ENABLE_DMC620_MM) == TRUE + INF Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf +!endif INF StandaloneMmPkg/Core/StandaloneMmCore.inf !if $(SECURE_STORAGE_ENABLE) == TRUE INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf index 8227ae03330c..d6e942e19b81 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -179,6 +179,12 @@ READ_LOCK_STATUS = TRUE # MM Communicate INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf + # Hest Error Source Support + INF MdeModulePkg/Universal/Apei/HestDxe/HestDxe.inf +!if $(ENABLE_GHES_MM) == TRUE + INF ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceDxe.inf +!endif + # # Platform driver # -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [edk2-platforms][PATCH v3 2/5] Platform/Sgi: dmc-620 firmware-first error handling 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 2/5] Platform/Sgi: dmc-620 firmware-first error handling Omkar Anand Kulkarni @ 2021-10-04 12:45 ` Sami Mujawar 0 siblings, 0 replies; 11+ messages in thread From: Sami Mujawar @ 2021-10-04 12:45 UTC (permalink / raw) To: Omkar Anand Kulkarni, devel; +Cc: Ard Biesheuvel, nd Hi Omkar, I have a minor suggestion marked inline as [SAMI]. Other than that this patch looks good to me. Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Regards, Sami Mujawar On 24/08/2021 07:00 AM, Omkar Anand Kulkarni wrote: > Enable the use of HEST table generation protocol, GHES error source > descriptor protocol and DMC-620 MM driver on ARM Neoverse Reference > Design platforms. This allows firmware-first error handling and > reporting of DMC-620 memory controller's 1-bit DRAM ECC errors. > > Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> > Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> > --- > Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 17 +++++++++++ > Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc | 30 ++++++++++++++++++++ > Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 6 ++++ > Platform/ARM/SgiPkg/SgiPlatform.fdf | 6 ++++ > 4 files changed, 59 insertions(+) > > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > index 7e37732fb93c..bb32584de63d 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > @@ -21,6 +21,9 @@ > DEFINE LPI_EN = FALSE > DEFINE CPPC_EN = FALSE > > + # To allow firmware first error handling, set this to TRUE. > + DEFINE ENABLE_GHES_MM = FALSE > + > [BuildOptions] > *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES > > @@ -208,6 +211,12 @@ > gArmTokenSpaceGuid.PcdMmBufferBase|0xFF600000 > gArmTokenSpaceGuid.PcdMmBufferSize|0x10000 > > +!if $(ENABLE_GHES_MM) == TRUE > + ## GHESv2 Generic Error memory space > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase|0xFF610000 > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 > +!endif > + > ################################################################################ > # > # Components Section - list of all EDK II Modules needed by this Platform > @@ -365,3 +374,11 @@ > !else > ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf > !endif > + > + # > + # GHESv2 HEST error sources support > + # > + MdeModulePkg/Universal/Apei/HestDxe/HestDxe.inf [SAMI] Should HestDxe.inf be included when ENABLE_GHES_MM== TRUE? Same question for SgiPlatform.fdf below. > +!if $(ENABLE_GHES_MM) == TRUE > + ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceDxe.inf > +!endif > diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc > index 5287e1f8e568..dbba82c74f39 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc > +++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc > @@ -11,6 +11,10 @@ > # Library Class section - list of all Library Classes needed by this Platform. > # > ################################################################################ > +[Defines] > + # To enable DMC-620 MM driver, set this to TRUE. > + DEFINE ENABLE_DMC620_MM = FALSE > + > [LibraryClasses] > # > # Basic > @@ -94,6 +98,25 @@ > gEfiSecurityPkgTokenSpaceGuid.PcdUserPhysicalPresence|TRUE > !endif > > +!if $(ENABLE_GHES_MM) == TRUE > + ## GHESv2 Generic Error Memory Space > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase|0xFF610000 > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 > +!endif > + > +!if $(ENABLE_DMC620_MM) == TRUE > + ## DMC620 > + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl|2 > + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase|0x4E000000 > + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize|0x100000 > + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold|10 > + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount|1 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase|804 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase|0xFF610000 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize|0x100 > + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId|0 > +!endif > + > ################################################################################################### > # > # Components Section - list of the modules and components that will be processed by compilation > @@ -134,6 +157,13 @@ > } > !endif > > +!if $(ENABLE_GHES_MM) == TRUE > + ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceStandaloneMm.inf > +!endif > +!if $(ENABLE_DMC620_MM) == TRUE > + Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf > +!endif > + > ################################################################################################### > # > # BuildOptions Section - Define the module specific tool chain flags that should be used as > diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf > index c1c24b747fa5..e029b9164570 100644 > --- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf > +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf > @@ -48,6 +48,12 @@ READ_STATUS = TRUE > READ_LOCK_CAP = TRUE > READ_LOCK_STATUS = TRUE > > +!if $(ENABLE_GHES_MM) == TRUE > + INF ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceStandaloneMm.inf > +!endif > +!if $(ENABLE_DMC620_MM) == TRUE > + INF Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf > +!endif > INF StandaloneMmPkg/Core/StandaloneMmCore.inf > !if $(SECURE_STORAGE_ENABLE) == TRUE > INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf > index 8227ae03330c..d6e942e19b81 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf > +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf > @@ -179,6 +179,12 @@ READ_LOCK_STATUS = TRUE > # MM Communicate > INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf > > + # Hest Error Source Support > + INF MdeModulePkg/Universal/Apei/HestDxe/HestDxe.inf > +!if $(ENABLE_GHES_MM) == TRUE > + INF ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceDxe.inf > +!endif > + > # > # Platform driver > # ^ permalink raw reply [flat|nested] 11+ messages in thread
* [edk2-platforms][PATCH v3 3/5] Platform/Sgi: define memory region for GHES error status block 2021-08-24 6:00 [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling Omkar Anand Kulkarni 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver Omkar Anand Kulkarni 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 2/5] Platform/Sgi: dmc-620 firmware-first error handling Omkar Anand Kulkarni @ 2021-08-24 6:00 ` Omkar Anand Kulkarni 2021-10-04 18:23 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 4/5] Platform/Sgi: Define values for ACPI table header Omkar Anand Kulkarni 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 5/5] Platform/Sgi: Add platform error handling driver Omkar Anand Kulkarni 4 siblings, 1 reply; 11+ messages in thread From: Omkar Anand Kulkarni @ 2021-08-24 6:00 UTC (permalink / raw) To: devel; +Cc: Ard Biesheuvel, Sami Mujawar Allow platforms to define the base address and size of the memory region that is reserved for MM drivers to populate the GHES generic error status block with information about the platform error. Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> --- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 4 ++++ Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 6 ++++++ Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 13 +++++++++++-- 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec index 8cd818a9bf64..e46fa5d9a1d5 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -31,6 +31,7 @@ [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001 gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 + gArmSgiTokenSpaceGuid.PcdGhesMmSupported|FALSE|BOOLEAN|0x00000027 [PcdsFixedAtBuild] gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002 diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index bb32584de63d..5307280ef9a3 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -107,6 +107,10 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE +!if $(ENABLE_GHES_MM) == TRUE + gArmSgiTokenSpaceGuid.PcdGhesMmSupported|TRUE +!endif + [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdVFPEnabled|1 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 22e247ea4fae..8cc362ea194f 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -79,10 +79,16 @@ gArmSgiTokenSpaceGuid.PcdWdogBase gArmSgiTokenSpaceGuid.PcdWdogSize + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase +[FeaturePcd] + gArmSgiTokenSpaceGuid.PcdGhesMmSupported + [Guids] gArmSgiPlatformIdDescriptorGuid gEfiHobListGuid ## CONSUMES ## SystemTable diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index 8139b75d8ee4..fd4a90bbc0ef 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. +* Copyright (c) 2018-2021, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -17,7 +17,8 @@ // Total number of descriptors, including the final "end-of-table" descriptor. #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ - (14 + (FixedPcdGet32 (PcdChipCount) * 2)) + (14 + (FixedPcdGet32 (PcdChipCount) * 2)) + \ + (FeaturePcdGet (PcdGhesMmSupported)) /** Returns the Virtual Memory Map of the platform. @@ -239,6 +240,14 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Length = PcdGet64 (PcdMmBufferSize); VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; + if (FeaturePcdGet (PcdGhesMmSupported)) { + // GHESv2 Generic Error Memory Space + VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdGhesGenericErrorDataMmBufferBase); + VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdGhesGenericErrorDataMmBufferBase); + VirtualMemoryTable[Index].Length = PcdGet64 (PcdGhesGenericErrorDataMmBufferSize); + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + } + // End of Table VirtualMemoryTable[++Index].PhysicalBase = 0; VirtualMemoryTable[Index].VirtualBase = 0; -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [edk2-platforms][PATCH v3 3/5] Platform/Sgi: define memory region for GHES error status block 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 3/5] Platform/Sgi: define memory region for GHES error status block Omkar Anand Kulkarni @ 2021-10-04 18:23 ` Sami Mujawar 0 siblings, 0 replies; 11+ messages in thread From: Sami Mujawar @ 2021-10-04 18:23 UTC (permalink / raw) To: Omkar Anand Kulkarni, devel; +Cc: Ard Biesheuvel, nd Hi Omkar, This patch looks good to me. Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Regards, Sami Mujawar On 24/08/2021 07:00 AM, Omkar Anand Kulkarni wrote: > Allow platforms to define the base address and size of the memory region > that is reserved for MM drivers to populate the GHES generic error > status block with information about the platform error. > > Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> > Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> > --- > Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + > Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 4 ++++ > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 6 ++++++ > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 13 +++++++++++-- > 4 files changed, 22 insertions(+), 2 deletions(-) > > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec > index 8cd818a9bf64..e46fa5d9a1d5 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.dec > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec > @@ -31,6 +31,7 @@ > [PcdsFeatureFlag.common] > gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001 > gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 > + gArmSgiTokenSpaceGuid.PcdGhesMmSupported|FALSE|BOOLEAN|0x00000027 > > [PcdsFixedAtBuild] > gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002 > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > index bb32584de63d..5307280ef9a3 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > @@ -107,6 +107,10 @@ > gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE > gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE > > +!if $(ENABLE_GHES_MM) == TRUE > + gArmSgiTokenSpaceGuid.PcdGhesMmSupported|TRUE > +!endif > + > [PcdsFixedAtBuild.common] > gArmTokenSpaceGuid.PcdVFPEnabled|1 > gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 > diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf > index 22e247ea4fae..8cc362ea194f 100644 > --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf > +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf > @@ -79,10 +79,16 @@ > gArmSgiTokenSpaceGuid.PcdWdogBase > gArmSgiTokenSpaceGuid.PcdWdogSize > > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase > + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize > + > gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase > > +[FeaturePcd] > + gArmSgiTokenSpaceGuid.PcdGhesMmSupported > + > [Guids] > gArmSgiPlatformIdDescriptorGuid > gEfiHobListGuid ## CONSUMES ## SystemTable > diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c > index 8139b75d8ee4..fd4a90bbc0ef 100644 > --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c > +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. > +* Copyright (c) 2018-2021, ARM Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -17,7 +17,8 @@ > > // Total number of descriptors, including the final "end-of-table" descriptor. > #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ > - (14 + (FixedPcdGet32 (PcdChipCount) * 2)) > + (14 + (FixedPcdGet32 (PcdChipCount) * 2)) + \ > + (FeaturePcdGet (PcdGhesMmSupported)) > > /** > Returns the Virtual Memory Map of the platform. > @@ -239,6 +240,14 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryTable[Index].Length = PcdGet64 (PcdMmBufferSize); > VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; > > + if (FeaturePcdGet (PcdGhesMmSupported)) { > + // GHESv2 Generic Error Memory Space > + VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdGhesGenericErrorDataMmBufferBase); > + VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdGhesGenericErrorDataMmBufferBase); > + VirtualMemoryTable[Index].Length = PcdGet64 (PcdGhesGenericErrorDataMmBufferSize); > + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + } > + > // End of Table > VirtualMemoryTable[++Index].PhysicalBase = 0; > VirtualMemoryTable[Index].VirtualBase = 0; ^ permalink raw reply [flat|nested] 11+ messages in thread
* [edk2-platforms][PATCH v3 4/5] Platform/Sgi: Define values for ACPI table header 2021-08-24 6:00 [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling Omkar Anand Kulkarni ` (2 preceding siblings ...) 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 3/5] Platform/Sgi: define memory region for GHES error status block Omkar Anand Kulkarni @ 2021-08-24 6:00 ` Omkar Anand Kulkarni 2021-10-04 12:46 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 5/5] Platform/Sgi: Add platform error handling driver Omkar Anand Kulkarni 4 siblings, 1 reply; 11+ messages in thread From: Omkar Anand Kulkarni @ 2021-08-24 6:00 UTC (permalink / raw) To: devel; +Cc: Ard Biesheuvel, Sami Mujawar For ACPI tables that are generated dynamically, define the ACPI table header values that have to be used to build the table header. Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 5307280ef9a3..102d7926bde1 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -221,6 +221,13 @@ gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 !endif + # ACPI Table Header IDs + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"ARMLTD" + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x4152464e49464552 # REFINFRA + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x20200831 + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x204d5241 # ARM + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 + ################################################################################ # # Components Section - list of all EDK II Modules needed by this Platform -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [edk2-platforms][PATCH v3 4/5] Platform/Sgi: Define values for ACPI table header 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 4/5] Platform/Sgi: Define values for ACPI table header Omkar Anand Kulkarni @ 2021-10-04 12:46 ` Sami Mujawar 0 siblings, 0 replies; 11+ messages in thread From: Sami Mujawar @ 2021-10-04 12:46 UTC (permalink / raw) To: Omkar Anand Kulkarni, devel; +Cc: Ard Biesheuvel, nd Hi Omkar, Thank you for this patch. Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Regards, Sami Mujawar On 24/08/2021 07:00 AM, Omkar Anand Kulkarni wrote: > For ACPI tables that are generated dynamically, define the ACPI table > header values that have to be used to build the table header. > > Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> > Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> > --- > Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > index 5307280ef9a3..102d7926bde1 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > @@ -221,6 +221,13 @@ > gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 > !endif > > + # ACPI Table Header IDs > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"ARMLTD" > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x4152464e49464552 # REFINFRA > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x20200831 > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x204d5241 # ARM > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 > + > ################################################################################ > # > # Components Section - list of all EDK II Modules needed by this Platform ^ permalink raw reply [flat|nested] 11+ messages in thread
* [edk2-platforms][PATCH v3 5/5] Platform/Sgi: Add platform error handling driver 2021-08-24 6:00 [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling Omkar Anand Kulkarni ` (3 preceding siblings ...) 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 4/5] Platform/Sgi: Define values for ACPI table header Omkar Anand Kulkarni @ 2021-08-24 6:00 ` Omkar Anand Kulkarni 2021-10-04 12:46 ` Sami Mujawar 4 siblings, 1 reply; 11+ messages in thread From: Omkar Anand Kulkarni @ 2021-08-24 6:00 UTC (permalink / raw) To: devel; +Cc: Ard Biesheuvel, Sami Mujawar Enables firmware first error handling on the given platform. Installs and publishes the SDEI and HEST ACPI tables required for firmware first error handling. Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 10 ++ Platform/ARM/SgiPkg/SgiPlatform.fdf | 7 + Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf | 51 ++++++ Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c | 171 ++++++++++++++++++++ 4 files changed, 239 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc index 102d7926bde1..20f003b96cdb 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -24,6 +24,9 @@ # To allow firmware first error handling, set this to TRUE. DEFINE ENABLE_GHES_MM = FALSE + # To allow firmware first error handling, set this to TRUE. + DEFINE ENABLE_FIRWARE_FIRST = FALSE + [BuildOptions] *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES @@ -326,6 +329,13 @@ # Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf + # + # platform error handler driver + # +!if $(ENABLE_FIRMWARE_FIRST) == TRUE + Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf +!endif + # # FAT filesystem + GPT/MBR partitioning # diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf index d6e942e19b81..b1d088610c4c 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -190,6 +190,13 @@ READ_LOCK_STATUS = TRUE # INF Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf + # + # platform error handler driver + # +!if $(ENABLE_FIRMWARE_FIRST) == TRUE + INF Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf +!endif + # # Bds # diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf new file mode 100644 index 000000000000..fe9ed4175b0b --- /dev/null +++ b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf @@ -0,0 +1,51 @@ +## @file +# Dxe driver to handle platform errors. +# +# This driver installs SDEI and HEST ACPI tables required for firmware first +# error handling. +# +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = PlatformErrorHandlerDxe + FILE_GUID = a3187ea4-feb4-415f-b11e-2312623ffa6f + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = PlatformErrorHandlerEntryPoint + +[Sources.common] + PlatformErrorHandlerDxe.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/ARM/SgiPkg/SgiPlatform.dec + +[LibraryClasses] + AcpiLib + BaseLib + DebugLib + UefiDriverEntryPoint + +[Guids] + gArmSgiAcpiTablesGuid + +[Protocols] + gEfiAcpiTableProtocolGuid ## PROTOCOL ALWAYS_CONSUMED + gHestTableProtocolGuid ## PROTOCOL ALWAYS_CONSUMED + +[FixedPcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId + +[Depex] + AFTER gArmPlatformHestErrorSourcesGuid diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c new file mode 100644 index 000000000000..25b29152f1bb --- /dev/null +++ b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c @@ -0,0 +1,171 @@ +/** @file + Driver to handle and support all platform errors. + + Installs the SDEI and HEST ACPI tables for firmware first error handling. + + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - ACPI 6.3, Table 18-382, Hardware Error Source Table + - SDEI Platform Design Document, revision b, 10 Appendix C, ACPI table + definitions for SDEI +**/ + +#include <IndustryStandard/Acpi.h> + +#include <Library/AcpiLib.h> +#include <Library/BaseLib.h> +#include <Library/DebugLib.h> +#include <Library/UefiBootServicesTableLib.h> + +#include <Protocol/AcpiTable.h> +#include <Protocol/HestTable.h> + + +/** + Build and install the SDEI ACPI table. + + For platforms that allow firmware-first platform error handling, SDEI is used + as the notification mechanism for those errors. + + @retval EFI_SUCCESS SDEI table installed successfully. + @retval Other For any error during installation. +**/ +STATIC +EFI_STATUS +InstallSdeiTable (VOID) +{ + EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL; + EFI_ACPI_DESCRIPTION_HEADER Header; + EFI_STATUS Status; + UINTN AcpiTableHandle; + + Header = + (EFI_ACPI_DESCRIPTION_HEADER) { + EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE, + sizeof (EFI_ACPI_DESCRIPTION_HEADER), // Length + 0x01, // Revision + 0x00, // Checksum + {'A', 'R', 'M', 'L', 'T', 'D'}, // OemId + 0x4152464e49464552, // OemTableId:"REFINFRA" + 0x20201027, // OemRevision + 0x204d5241, // CreatorId:"ARM " + 0x00000001, // CreatorRevision + }; + + Header.Checksum = CalculateCheckSum8 ((UINT8 *)&Header, Header.Length); + Status = gBS->LocateProtocol ( + &gEfiAcpiTableProtocolGuid, + NULL, + (VOID **)&mAcpiTableProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: Failed to locate ACPI table protocol, status: %r\n", + __FUNCTION__, + Status + )); + return Status; + } + + Status = mAcpiTableProtocol->InstallAcpiTable ( + mAcpiTableProtocol, + &Header, + Header.Length, + &AcpiTableHandle + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: Failed to install SDEI ACPI table, status: %r\n", + __FUNCTION__, + Status + )); + } + + return Status; +} + +/** + Install the HEST ACPI table. + + HEST ACPI table is used to list the platform errors for which the error + handling has been supported. Use the HEST table generation protocol to + install the HEST table. + + @retval EFI_SUCCESS HEST table installed successfully. + @retval Other For any error during installation. +**/ +STATIC +EFI_STATUS +InstallHestTable (VOID) +{ + HEST_TABLE_PROTOCOL *HestProtocol; + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gHestTableProtocolGuid, + NULL, + (VOID **)&HestProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: Failed to locate HEST DXE Protocol, status: %r\n", + __FUNCTION__, + Status + )); + return Status; + } + + Status = HestProtocol->InstallHestTable (); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "%a: Failed to install HEST table, status: %r\n", + __FUNCTION__, + Status + )); + } + + return Status; +} + +/** + Entry point for the DXE driver. + + This function installs the HEST ACPI table, using the HEST table generation + protocol. Also creates and installs the SDEI ACPI table required for firmware + first error handling. + + @param[in] ImageHandle Handle to the EFI image. + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS On successful installation of ACPI tables + @retval Other On Failure +**/ +EFI_STATUS +EFIAPI +PlatformErrorHandlerEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + // Build and install SDEI table. + Status = InstallSdeiTable (); + if (EFI_ERROR (Status)) { + return Status; + } + + // Install the created HEST table. + Status = InstallHestTable (); + if (EFI_ERROR (Status)) { + return Status; + } + + return EFI_SUCCESS; +} -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [edk2-platforms][PATCH v3 5/5] Platform/Sgi: Add platform error handling driver 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 5/5] Platform/Sgi: Add platform error handling driver Omkar Anand Kulkarni @ 2021-10-04 12:46 ` Sami Mujawar 0 siblings, 0 replies; 11+ messages in thread From: Sami Mujawar @ 2021-10-04 12:46 UTC (permalink / raw) To: Omkar Anand Kulkarni, devel; +Cc: Ard Biesheuvel, nd Hi Omkar, Please find my feedback inline marked [SAMI]. Regards, Sami Mujawar On 24/08/2021 07:00 AM, Omkar Anand Kulkarni wrote: > Enables firmware first error handling on the given platform. Installs > and publishes the SDEI and HEST ACPI tables required for firmware first > error handling. > > Signed-off-by: Omkar Anand Kulkarni <omkar.kulkarni@arm.com> > --- > Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 10 ++ > Platform/ARM/SgiPkg/SgiPlatform.fdf | 7 + > Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf | 51 ++++++ > Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c | 171 ++++++++++++++++++++ > 4 files changed, 239 insertions(+) > > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > index 102d7926bde1..20f003b96cdb 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc > @@ -24,6 +24,9 @@ > # To allow firmware first error handling, set this to TRUE. > DEFINE ENABLE_GHES_MM = FALSE > > + # To allow firmware first error handling, set this to TRUE. > + DEFINE ENABLE_FIRWARE_FIRST = FALSE > + > [BuildOptions] > *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES > > @@ -326,6 +329,13 @@ > # > Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf > > + # > + # platform error handler driver > + # > +!if $(ENABLE_FIRMWARE_FIRST) == TRUE > + Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf > +!endif > + > # > # FAT filesystem + GPT/MBR partitioning > # > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf > index d6e942e19b81..b1d088610c4c 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf > +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf > @@ -190,6 +190,13 @@ READ_LOCK_STATUS = TRUE > # > INF Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf > > + # > + # platform error handler driver > + # > +!if $(ENABLE_FIRMWARE_FIRST) == TRUE > + INF Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf > +!endif > + > # > # Bds > # > diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf > new file mode 100644 > index 000000000000..fe9ed4175b0b > --- /dev/null > +++ b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.inf > @@ -0,0 +1,51 @@ > +## @file > +# Dxe driver to handle platform errors. > +# > +# This driver installs SDEI and HEST ACPI tables required for firmware first > +# error handling. > +# > +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A [SAMI] Update INF revision to use the latest version. > + BASE_NAME = PlatformErrorHandlerDxe > + FILE_GUID = a3187ea4-feb4-415f-b11e-2312623ffa6f > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = PlatformErrorHandlerEntryPoint > + > +[Sources.common] > + PlatformErrorHandlerDxe.c > + > +[Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Platform/ARM/SgiPkg/SgiPlatform.dec > + > +[LibraryClasses] > + AcpiLib > + BaseLib > + DebugLib > + UefiDriverEntryPoint > + > +[Guids] > + gArmSgiAcpiTablesGuid > + > +[Protocols] > + gEfiAcpiTableProtocolGuid ## PROTOCOL ALWAYS_CONSUMED > + gHestTableProtocolGuid ## PROTOCOL ALWAYS_CONSUMED > + > +[FixedPcd] > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId > + > +[Depex] > + AFTER gArmPlatformHestErrorSourcesGuid > diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c > new file mode 100644 > index 000000000000..25b29152f1bb > --- /dev/null > +++ b/Platform/ARM/SgiPkg/Drivers/PlatformErrorHandlerDxe/PlatformErrorHandlerDxe.c > @@ -0,0 +1,171 @@ > +/** @file > + Driver to handle and support all platform errors. > + > + Installs the SDEI and HEST ACPI tables for firmware first error handling. > + > + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved. > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - ACPI 6.3, Table 18-382, Hardware Error Source Table > + - SDEI Platform Design Document, revision b, 10 Appendix C, ACPI table > + definitions for SDEI > +**/ > + > +#include <IndustryStandard/Acpi.h> > + > +#include <Library/AcpiLib.h> > +#include <Library/BaseLib.h> > +#include <Library/DebugLib.h> > +#include <Library/UefiBootServicesTableLib.h> > + > +#include <Protocol/AcpiTable.h> > +#include <Protocol/HestTable.h> > + > + > +/** > + Build and install the SDEI ACPI table. > + > + For platforms that allow firmware-first platform error handling, SDEI is used > + as the notification mechanism for those errors. > + > + @retval EFI_SUCCESS SDEI table installed successfully. > + @retval Other For any error during installation. > +**/ > +STATIC > +EFI_STATUS > +InstallSdeiTable (VOID) [SAMI] Fix coding style, please. VOID and closing brackets should each be on a new line. > +{ > + EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL; > + EFI_ACPI_DESCRIPTION_HEADER Header; > + EFI_STATUS Status; > + UINTN AcpiTableHandle; > + > + Header = > + (EFI_ACPI_DESCRIPTION_HEADER) { > + EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE, > + sizeof (EFI_ACPI_DESCRIPTION_HEADER), // Length > + 0x01, // Revision > + 0x00, // Checksum > + {'A', 'R', 'M', 'L', 'T', 'D'}, // OemId > + 0x4152464e49464552, // OemTableId:"REFINFRA" > + 0x20201027, // OemRevision > + 0x204d5241, // CreatorId:"ARM " > + 0x00000001, // CreatorRevision > + }; > + [SAMI] I would prefer a static structure locally initialised in this file and used in this function. Can you fix this, please? > + Header.Checksum = CalculateCheckSum8 ((UINT8 *)&Header, Header.Length); [SAMI] I dont think this is needed as the checksum is calculated in mAcpiTableProtocol->InstallAcpiTable(). See https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableProtocol.c#L241 [/SAMI] > + Status = gBS->LocateProtocol ( > + &gEfiAcpiTableProtocolGuid, > + NULL, > + (VOID **)&mAcpiTableProtocol > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: Failed to locate ACPI table protocol, status: %r\n", > + __FUNCTION__, > + Status > + )); > + return Status; > + } > + > + Status = mAcpiTableProtocol->InstallAcpiTable ( > + mAcpiTableProtocol, > + &Header, > + Header.Length, > + &AcpiTableHandle > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: Failed to install SDEI ACPI table, status: %r\n", > + __FUNCTION__, > + Status > + )); > + } > + > + return Status; > +} > + > +/** > + Install the HEST ACPI table. > + > + HEST ACPI table is used to list the platform errors for which the error > + handling has been supported. Use the HEST table generation protocol to > + install the HEST table. > + > + @retval EFI_SUCCESS HEST table installed successfully. > + @retval Other For any error during installation. > +**/ > +STATIC > +EFI_STATUS > +InstallHestTable (VOID) [SAMI] Fix coding style, please. VOID and closing brackets should each be on a new line. > +{ > + HEST_TABLE_PROTOCOL *HestProtocol; > + EFI_STATUS Status; > + > + Status = gBS->LocateProtocol ( > + &gHestTableProtocolGuid, > + NULL, > + (VOID **)&HestProtocol > + ); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: Failed to locate HEST DXE Protocol, status: %r\n", > + __FUNCTION__, > + Status > + )); > + return Status; [SAMI] Fix alignment. > + } > + > + Status = HestProtocol->InstallHestTable (); > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "%a: Failed to install HEST table, status: %r\n", > + __FUNCTION__, > + Status > + )); > + } > + > + return Status; > +} > + > +/** > + Entry point for the DXE driver. > + > + This function installs the HEST ACPI table, using the HEST table generation > + protocol. Also creates and installs the SDEI ACPI table required for firmware > + first error handling. > + > + @param[in] ImageHandle Handle to the EFI image. > + @param[in] SystemTable A pointer to the EFI System Table. > + > + @retval EFI_SUCCESS On successful installation of ACPI tables > + @retval Other On Failure > +**/ > +EFI_STATUS > +EFIAPI > +PlatformErrorHandlerEntryPoint ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + > + // Build and install SDEI table. > + Status = InstallSdeiTable (); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + // Install the created HEST table. > + Status = InstallHestTable (); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + return EFI_SUCCESS; > +} ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2021-10-04 18:23 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-08-24 6:00 [edk2-platforms][PATCH v3 0/5] Platform/Sgi: Add platform support for firmware first error handling Omkar Anand Kulkarni 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 1/5] Platform/ARM: Add DMC-620 ECC error handling driver Omkar Anand Kulkarni 2021-09-27 17:30 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 2/5] Platform/Sgi: dmc-620 firmware-first error handling Omkar Anand Kulkarni 2021-10-04 12:45 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 3/5] Platform/Sgi: define memory region for GHES error status block Omkar Anand Kulkarni 2021-10-04 18:23 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 4/5] Platform/Sgi: Define values for ACPI table header Omkar Anand Kulkarni 2021-10-04 12:46 ` Sami Mujawar 2021-08-24 6:00 ` [edk2-platforms][PATCH v3 5/5] Platform/Sgi: Add platform error handling driver Omkar Anand Kulkarni 2021-10-04 12:46 ` Sami Mujawar
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