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From: "Lendacky, Thomas" <thomas.lendacky@amd.com>
To: "Ni, Ray" <ray.ni@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Justen, Jordan L" <jordan.l.justen@intel.com>,
	Laszlo Ersek <lersek@redhat.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>,
	"Gao, Liming" <liming.gao@intel.com>,
	"Dong, Eric" <eric.dong@intel.com>,
	Brijesh Singh <brijesh.singh@amd.com>
Subject: Re: [RFC PATCH v3 22/43] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write NAE events
Date: Thu, 12 Dec 2019 14:39:36 -0600	[thread overview]
Message-ID: <b20fee21-d0de-8ed5-378d-98fa4d042ca4@amd.com> (raw)
In-Reply-To: <734D49CCEBEEF84792F5B80ED585239D5C399A29@SHSMSX104.ccr.corp.intel.com>

On 12/12/19 12:53 AM, Ni, Ray wrote:
> Tom,
> Why all DR registers are not pushed to stack in VC handler?
> I thought only DR7 pushing is skipped.

It was probably just to be on the safe side in case the hypervisor didn't
remove the intercept for them. And since none of the other debug registers
are used by the #VC handler and their values aren't restored on exit, I
just decided not to push them. But I can push them if you think it best.

Thanks,
Tom

> 
> Thanks,
> Ray
> 
>> -----Original Message-----
>> From: Tom Lendacky <thomas.lendacky@amd.com>
>> Sent: Thursday, November 21, 2019 4:07 AM
>> To: devel@edk2.groups.io
>> Cc: Justen, Jordan L <jordan.l.justen@intel.com>; Laszlo Ersek <lersek@redhat.com>; Ard Biesheuvel
>> <ard.biesheuvel@linaro.org>; Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming <liming.gao@intel.com>; Dong,
>> Eric <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Brijesh Singh <brijesh.singh@amd.com>
>> Subject: [RFC PATCH v3 22/43] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write NAE events
>>
>> BZ: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2198&amp;data=02%7C01%7Cthomas.lendacky%40amd.com%7C6858e5b903674581483b08d77ed0123b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637117304434355086&amp;sdata=jRdTglBwajIycWATDilfbyC%2BrvPOTFCUl0MqhhuE5nA%3D&amp;reserved=0
>>
>> Under SEV-ES, a DR7 read or write intercept generates a #VC exception.
>> The #VC handler must provide special support to the guest for this. On
>> a DR7 write, the #VC handler must cache the value and issue a VMGEXIT
>> to notify the hypervisor of the write. However, the #VC handler must
>> not actually set the value of the DR7 register. On a DR7 read, the #VC
>> handler must return the cached value of the DR7 register to the guest.
>> VMGEXIT is not invoked for a DR7 register read.
>>
>> To avoid exception recursion, a #VC exception will not try to read and
>> push the actual debug registers into the EFI_SYSTEM_CONTEXT_X64 struct
>> and instead push zeroes. The #VC exception handler does not make use of
>> the debug registers from saved context.
>>
>> Cc: Eric Dong <eric.dong@intel.com>
>> Cc: Ray Ni <ray.ni@intel.com>
>> Cc: Laszlo Ersek <lersek@redhat.com>
>> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
>> ---
>>  .../X64/AMDSevVcCommon.c                      | 68 +++++++++++++++++++
>>  .../X64/ExceptionHandlerAsm.nasm              | 15 ++++
>>  2 files changed, 83 insertions(+)
>>
>> diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
>> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
>> index 1d7c34e7e442..22393f72d795 100644
>> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
>> +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
>> @@ -13,6 +13,12 @@
>>
>>  #define CR4_OSXSAVE (1 << 18)
>>
>> +#define DR7_RESET_VALUE 0x400
>> +typedef struct {
>> +  BOOLEAN  Dr7Cached;
>> +  UINT64   Dr7;
>> +} SEV_ES_PER_CPU_DATA;
>> +
>>  typedef enum {
>>    LongMode64Bit        = 0,
>>    LongModeCompat32Bit,
>> @@ -1081,6 +1087,60 @@ RdtscExit (
>>    return 0;
>>  }
>>
>> +STATIC
>> +UINTN
>> +Dr7WriteExit (
>> +  GHCB                     *Ghcb,
>> +  EFI_SYSTEM_CONTEXT_X64   *Regs,
>> +  SEV_ES_INSTRUCTION_DATA  *InstructionData
>> +  )
>> +{
>> +  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = &InstructionData->Ext;
>> +  SEV_ES_PER_CPU_DATA            *SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 1);
>> +  INTN                           *Register;
>> +  UINTN                          Status;
>> +
>> +  DecodeModRm (Regs, InstructionData);
>> +
>> +  /* MOV DRn always treats MOD == 3 no matter how encoded */
>> +  Register = GetRegisterPointer (Regs, Ext->ModRm.Rm);
>> +
>> +  /* Using a value of 0 for ExitInfo1 means RAX holds the value */
>> +  Ghcb->SaveArea.Rax = *Register;
>> +  GhcbSetRegValid (Ghcb, GhcbRax);
>> +
>> +  Status = VmgExit (Ghcb, SvmExitDr7Write, 0, 0);
>> +  if (Status) {
>> +    return Status;
>> +  }
>> +
>> +  SevEsData->Dr7 = *Register;
>> +  SevEsData->Dr7Cached = TRUE;
>> +
>> +  return 0;
>> +}
>> +
>> +STATIC
>> +UINTN
>> +Dr7ReadExit (
>> +  GHCB                     *Ghcb,
>> +  EFI_SYSTEM_CONTEXT_X64   *Regs,
>> +  SEV_ES_INSTRUCTION_DATA  *InstructionData
>> +  )
>> +{
>> +  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = &InstructionData->Ext;
>> +  SEV_ES_PER_CPU_DATA            *SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 1);
>> +  INTN                           *Register;
>> +
>> +  DecodeModRm (Regs, InstructionData);
>> +
>> +  /* MOV DRn always treats MOD == 3 no matter how encoded */
>> +  Register = GetRegisterPointer (Regs, Ext->ModRm.Rm);
>> +  *Register = (SevEsData->Dr7Cached) ? SevEsData->Dr7 : DR7_RESET_VALUE;
>> +
>> +  return 0;
>> +}
>> +
>>  UINTN
>>  DoVcCommon (
>>    GHCB                *Ghcb,
>> @@ -1097,6 +1157,14 @@ DoVcCommon (
>>
>>    ExitCode = Regs->ExceptionData;
>>    switch (ExitCode) {
>> +  case SvmExitDr7Read:
>> +    NaeExit = Dr7ReadExit;
>> +    break;
>> +
>> +  case SvmExitDr7Write:
>> +    NaeExit = Dr7WriteExit;
>> +    break;
>> +
>>    case SvmExitRdtsc:
>>      NaeExit = RdtscExit;
>>      break;
>> diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
>> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
>> index 19198f273137..a0549f7ae6bd 100644
>> --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
>> +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
>> @@ -225,6 +225,9 @@ HasErrorCode:
>>      push    rax
>>
>>  ;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
>> +    cmp     qword [rbp + 8], 29
>> +    je      VcDebugRegs          ; For SEV-ES (#VC) Debug registers ignored
>> +
>>      mov     rax, dr7
>>      push    rax
>>      mov     rax, dr6
>> @@ -237,7 +240,19 @@ HasErrorCode:
>>      push    rax
>>      mov     rax, dr0
>>      push    rax
>> +    jmp     DrFinish
>>
>> +VcDebugRegs:
>> +;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7 are skipped for #VC to avoid exception recursion
>> +    xor     rax, rax
>> +    push    rax
>> +    push    rax
>> +    push    rax
>> +    push    rax
>> +    push    rax
>> +    push    rax
>> +
>> +DrFinish:
>>  ;; FX_SAVE_STATE_X64 FxSaveState;
>>      sub rsp, 512
>>      mov rdi, rsp
>> --
>> 2.17.1
> 

  reply	other threads:[~2019-12-12 20:39 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-20 20:06 [RFC PATCH v3 00/43] SEV-ES guest support Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 01/43] MdePkg: Create PCDs to be used in support of SEV-ES Lendacky, Thomas
2019-12-12  6:53   ` Ni, Ray
2019-12-12 20:48     ` Lendacky, Thomas
2019-12-13  1:21       ` Ni, Ray
2019-11-20 20:06 ` [RFC PATCH v3 02/43] MdePkg: Add the MSR definition for the GHCB register Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 03/43] MdePkg: Add a structure definition for the GHCB Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 04/43] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables Lendacky, Thomas
2019-12-12  6:53   ` [edk2-devel] " Ni, Ray
2019-12-12 20:58     ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 05/43] MdePkg/BaseLib: Add support for the XGETBV instruction Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 06/43] MdePkg/BaseLib: Add support for the VMGEXIT instruction Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 07/43] UefiCpuPkg: Implement library support for VMGEXIT Lendacky, Thomas
2019-11-21 11:15   ` [edk2-devel] " Laszlo Ersek
2019-11-21 16:48     ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 08/43] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 09/43] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 10/43] UefiCpuPkg/CpuExceptionHandler: Support string IO " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 11/43] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 12/43] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 13/43] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO) Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 14/43] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD NAE events Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 15/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 16/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 17/43] UefiCpuPkg/CpuExceptionHandler: Add support for INVD " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 18/43] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 19/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 20/43] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 21/43] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 22/43] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write " Lendacky, Thomas
2019-12-12  6:53   ` Ni, Ray
2019-12-12 20:39     ` Lendacky, Thomas [this message]
2019-12-12  6:53   ` Ni, Ray
2019-12-12 20:27     ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 23/43] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 24/43] OvmfPkg: Add support to perform SEV-ES initialization Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 25/43] OvmfPkg/ResetVector: Add support for a 32-bit SEV check Lendacky, Thomas
2019-11-21 11:02   ` [edk2-devel] " Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 26/43] OvmfPkg: Create a GHCB page for use during Sec phase Lendacky, Thomas
2019-11-21 11:29   ` [edk2-devel] " Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 27/43] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 28/43] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase Lendacky, Thomas
2019-12-12  6:54   ` Ni, Ray
2019-12-12 21:03     ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 29/43] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 30/43] OvmfPkg/Sec: Add #VC exception handling for Sec phase Lendacky, Thomas
2019-11-21 12:06   ` [edk2-devel] " Laszlo Ersek
2019-11-21 20:46     ` Lendacky, Thomas
2019-11-22 12:52       ` Laszlo Ersek
2019-11-22 16:30         ` Lendacky, Thomas
2019-11-22 21:10           ` Laszlo Ersek
2019-11-22 22:48             ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 31/43] OvmfPkg/Sec: Enable cache early to speed up booting Lendacky, Thomas
2019-11-21 12:08   ` [edk2-devel] " Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 32/43] OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Bypass flash detection with SEV-ES is enabled Lendacky, Thomas
2019-11-21 12:31   ` [edk2-devel] " Laszlo Ersek
2019-11-21 21:11     ` Lendacky, Thomas
2019-11-22 12:20       ` Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 33/43] MdeModulePkg: Reserve a 16-bit protected mode code segment descriptor Lendacky, Thomas
2019-12-12  6:57   ` Ni, Ray
2019-12-12 21:19     ` [edk2-devel] " Lendacky, Thomas
2019-12-13  1:20       ` Ni, Ray
2019-11-20 20:06 ` [RFC PATCH v3 34/43] UefiCpuPkg: Add " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 35/43] UefiCpuPkg/MpInitLib: Add a CPU MP data flag to indicate if SEV-ES is enabled Lendacky, Thomas
2019-12-12  7:01   ` Ni, Ray
2019-12-12 21:21     ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 36/43] UefiCpuPkg: Allow AP booting under SEV-ES Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 37/43] OvmfPkg: Reserve a page in memory for the SEV-ES AP reset vector Lendacky, Thomas
2019-11-21 19:27   ` [edk2-devel] " Laszlo Ersek
2019-11-21 22:49     ` Lendacky, Thomas
2019-11-22 16:06       ` Laszlo Ersek
2019-11-22 16:40         ` Lendacky, Thomas
2019-11-20 20:07 ` [RFC PATCH v3 38/43] OvmfPkg: Move the GHCB allocations into reserved memory Lendacky, Thomas
2019-11-20 20:07 ` [RFC PATCH v3 39/43] MdePkg: Add a finalization function to the CPU protocol Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 40/43] UefiCpuPkg/MpInitLib: Add MP finalization interface to MpInitLib Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 41/43] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 42/43] UefiCpuPkg/CpuDxe: Provide an DXE MP finalization routine to support SEV-ES Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 43/43] MdeModulePkg/DxeCore: Perform the CPU protocol finalization support Lendacky, Thomas
2019-11-21  1:53 ` [edk2-devel] [RFC PATCH v3 00/43] SEV-ES guest support Nate DeSimone
2019-11-21 15:50   ` Lendacky, Thomas
2019-11-21  9:45 ` Laszlo Ersek
2019-11-21  9:48   ` Laszlo Ersek

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