From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web09.5310.1645785975858614312 for ; Fri, 25 Feb 2022 02:46:16 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ChPWaas3; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: sebastien.boeuf@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645785975; x=1677321975; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ci7YuyRf3FSRC1xc313Dr6E0n8icfSjrXv07FNPJl/A=; b=ChPWaas3day66cRIC4yBn/ABEuKpRpRGOJFOvb4gJA8CKGAcPdJ5tLbC 5BfQ2UqLhARSkaa49dmTe6FYMn4egsQHKuh2pI3X2O//Ybo4EgRbBm6Eq YGiBXONuYR2418qC03AzRHNjf/ZZOe6WN2s3E7mkNsjBO6CV7HU2hZhmq wi+rV/SHWnriNHVjhQq3/G1BjjKBWdOARz9xM38Whx16zwWo76YSClA5Z a2kXIqqPuzM87a+SvUNxR7yYY9/5TasMAGoh+EvQ4Hhz6PeE6+0+EV3bX APcW3T/rNX2dEJ4ILmK62SM3wsgB0MYNcwiGWG40oosW+vy/x2RaULxYA w==; X-IronPort-AV: E=McAfee;i="6200,9189,10268"; a="232447196" X-IronPort-AV: E=Sophos;i="5.90,136,1643702400"; d="scan'208";a="232447196" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2022 02:46:15 -0800 X-IronPort-AV: E=Sophos;i="5.90,136,1643702400"; d="scan'208";a="707822307" Received: from cward2-mobl2.ger.corp.intel.com (HELO sboeuf-mobl.home) ([10.252.25.151]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2022 02:46:13 -0800 From: "Boeuf, Sebastien" To: devel@edk2.groups.io Cc: jiewen.yao@intel.com, jordan.l.justen@intel.com, kraxel@redhat.com, sebastien.boeuf@intel.com Subject: [PATCH v4 4/7] OvmfPkg: Generate CloudHv as a PVH ELF binary Date: Fri, 25 Feb 2022 11:45:30 +0100 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable From: Sebastien Boeuf Following the model from the Xen target, CloudHv is generated as a PVH ELF binary to take advantage of the PVH specification, which requires less emulation from the VMM. The fdf include file CloudHvElfHeader.fdf.inc has been generated from the following commands: $ gcc -D PVH64 -o elf_gen OvmfPkg/OvmfXenElfHeaderGenerator.c $ ./elf_gen 4194304 OvmfPkg/CloudHv/CloudHvElfHeader.fdf.inc Signed-off-by: Sebastien Boeuf --- OvmfPkg/CloudHv/CloudHvElfHeader.fdf.inc | 54 ++++++++++++++++++++++++ OvmfPkg/CloudHv/CloudHvX64.dsc | 2 +- OvmfPkg/CloudHv/CloudHvX64.fdf | 8 ++-- OvmfPkg/VarStore.fdf.inc | 5 +++ 4 files changed, 65 insertions(+), 4 deletions(-) create mode 100644 OvmfPkg/CloudHv/CloudHvElfHeader.fdf.inc diff --git a/OvmfPkg/CloudHv/CloudHvElfHeader.fdf.inc b/OvmfPkg/CloudHv/Clo= udHvElfHeader.fdf.inc new file mode 100644 index 0000000000..8377e30bdc --- /dev/null +++ b/OvmfPkg/CloudHv/CloudHvElfHeader.fdf.inc @@ -0,0 +1,54 @@ +## @file +# FDF include file that defines a PVH ELF header. +# +# Copyright (c) 2022, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +DATA =3D { + # ELF file header + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x03, 0x00, 0x01, 0x00, 0x00, 0x00, + 0xd0, 0xff, 0x4f, 0x00, 0x00, 0x00, 0x00, 0x00, # hdr.e_entry + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x38, 0x00, 0x0= 2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + # ELF Program segment headers + # - Load segment + 0x01, 0x00, 0x00, 0x00, + 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x40, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x40, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + # - ELFNOTE segment + 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, + 0xb0, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0xb0, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0xb0, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x14, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x14, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + # XEN_ELFNOTE_PHYS32_ENTRY + 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, + 0x12, 0x00, 0x00, 0x00, + 0x58, 0x65, 0x6e, 0x00, + 0xd0, 0xff, 0x4f, 0x00 +} diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc index 3172100310..b4d855d80f 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.dsc +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc @@ -631,7 +631,7 @@ # ##########################################################################= ###### [Components] - OvmfPkg/ResetVector/ResetVector.inf + OvmfPkg/XenResetVector/XenResetVector.inf = # # SEC Phase modules diff --git a/OvmfPkg/CloudHv/CloudHvX64.fdf b/OvmfPkg/CloudHv/CloudHvX64.fdf index ce3302c6d6..f638978730 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.fdf +++ b/OvmfPkg/CloudHv/CloudHvX64.fdf @@ -14,8 +14,8 @@ !include OvmfPkg/OvmfPkgDefines.fdf.inc = # -# Build the variable store and the firmware code as one unified flash devi= ce -# image. +# This will allow the flash device image to be recognize as an ELF, with f= irst +# an ELF headers, then the firmware code. # [FD.CLOUDHV] BaseAddress =3D $(FW_BASE_ADDRESS) @@ -24,7 +24,9 @@ ErasePolarity =3D 1 BlockSize =3D $(BLOCK_SIZE) NumBlocks =3D $(FW_BLOCKS) = +DEFINE PVH_HEADER_CLOUDHV =3D TRUE !include OvmfPkg/VarStore.fdf.inc +DEFINE PVH_HEADER_CLOUDHV =3D FALSE = $(VARS_SIZE)|$(FVMAIN_SIZE) FV =3D FVMAIN_COMPACT @@ -142,7 +144,7 @@ READ_LOCK_STATUS =3D TRUE # INF OvmfPkg/Sec/SecMain.inf = -INF RuleOverride=3DRESET_VECTOR OvmfPkg/ResetVector/ResetVector.inf +INF RuleOverride=3DRESET_VECTOR OvmfPkg/XenResetVector/XenResetVector.inf = ##########################################################################= ###### [FV.PEIFV] diff --git a/OvmfPkg/VarStore.fdf.inc b/OvmfPkg/VarStore.fdf.inc index a1e524e393..3774e1cca8 100644 --- a/OvmfPkg/VarStore.fdf.inc +++ b/OvmfPkg/VarStore.fdf.inc @@ -15,6 +15,10 @@ 0x00000000|0x00040000 !endif #NV_VARIABLE_STORE + +!if $(PVH_HEADER_CLOUDHV) =3D=3D TRUE +!include OvmfPkg/CloudHv/CloudHvElfHeader.fdf.inc +!else DATA =3D { ## This is the EFI_FIRMWARE_VOLUME_HEADER # ZeroVector [] @@ -79,6 +83,7 @@ DATA =3D { # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } +!endif = !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) 0x0000e000|0x00001000 -- = 2.32.0 --------------------------------------------------------------------- Intel Corporation SAS (French simplified joint stock company) Registered headquarters: "Les Montalets"- 2, rue de Paris, = 92196 Meudon Cedex, France Registration Number: 302 456 199 R.C.S. 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