Re: [edk2-devel] [PATCH v3 06/13] MdePkg/Register/Amd: define GHCB macros for SNP AP creation

["Laszlo Ersek" <lersek@redhat.com>]

On 05/19/21 20:19, Brijesh Singh wrote:
> From: Tom Lendacky <thomas.lendacky@amd.com>
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=33275

(1) The bugzilla number is still wrong (just differently wrong from how
it was in v2). But I'll fix it up when I merge this, after the stable tag.

> 
> Version 2 of GHCB introduces NAE for creating AP when SEV-SNP is enabled
> in the guest VM. See the GHCB specification, Table 5 "List of Supported
> Non-Automatic Events" and sections 4.1.9 and 4.3.2, for further details.
> 
> While at it, define the VMSA state save area that is required for creating
> the AP. The save area format is defined in AMD APM volume 2, Table B-4
> (there is a mistake in the table that defines the size of the reserved
> area at offset 0xc8 as a dword, when it is actually a word). The format of
> the save area segment registers is further defined in AMD APM volume 2,
> sections 10 and 15.5.
> 
> Cc: James Bottomley <jejb@linux.ibm.com>
> Cc: Min Xu <min.m.xu@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Tom Lendacky <thomas.lendacky@amd.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Erdem Aktas <erdemaktas@google.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> ---
>  MdePkg/Include/Register/Amd/Ghcb.h | 84 ++++++++++++++++++++++++++++++
>  1 file changed, 84 insertions(+)
> 
> diff --git a/MdePkg/Include/Register/Amd/Ghcb.h b/MdePkg/Include/Register/Amd/Ghcb.h
> index 029904b1c63a..8c5f46e4bb53 100644
> --- a/MdePkg/Include/Register/Amd/Ghcb.h
> +++ b/MdePkg/Include/Register/Amd/Ghcb.h
> @@ -55,6 +55,7 @@
>  #define SVM_EXIT_AP_RESET_HOLD                  0x80000004ULL
>  #define SVM_EXIT_AP_JUMP_TABLE                  0x80000005ULL
>  #define SVM_EXIT_SNP_PAGE_STATE_CHANGE          0x80000010ULL
> +#define SVM_EXIT_SNP_AP_CREATION                0x80000013ULL
>  #define SVM_EXIT_HYPERVISOR_FEATURES            0x8000FFFDULL
>  #define SVM_EXIT_UNSUPPORTED                    0x8000FFFFULL
>  
> @@ -83,6 +84,12 @@
>  #define IOIO_SEG_ES         0
>  #define IOIO_SEG_DS         (BIT11 | BIT10)
>  
> +//
> +// AP Creation Information
> +//
> +#define SVM_VMGEXIT_SNP_AP_CREATE_ON_INIT  0
> +#define SVM_VMGEXIT_SNP_AP_CREATE          1
> +#define SVM_VMGEXIT_SNP_AP_DESTROY         2
>  
>  typedef PACKED struct {
>    UINT8                  Reserved1[203];
> @@ -195,4 +202,81 @@ typedef struct {
>    SNP_PAGE_STATE_ENTRY   Entry[SNP_PAGE_STATE_MAX_ENTRY];
>  } SNP_PAGE_STATE_CHANGE_INFO;
>  
> +//
> +// SEV-ES save area mapping structures used for SEV-SNP AP Creation.
> +// Only the fields required to be set to a non-zero value are defined.
> +//
> +// The segment register definition is defined for processor reset/real mode
> +// (as when an INIT of the vCPU is requested). Should other modes (long mode,
> +// etc.) be required, then the definitions can be enhanced.
> +//
> +
> +//
> +// Segment types at processor reset, See AMD APM Volume 2, Table 14-2.
> +//

Thank you for these comment updates!

Laszlo

> +#define SEV_ES_RESET_CODE_SEGMENT_TYPE  0xA
> +#define SEV_ES_RESET_DATA_SEGMENT_TYPE  0x2
> +
> +#define SEV_ES_RESET_LDT_TYPE           0x2
> +#define SEV_ES_RESET_TSS_TYPE           0x3
> +
> +#pragma pack (1)
> +typedef union {
> +    struct {
> +      UINT16  Type:4;
> +      UINT16  Sbit:1;
> +      UINT16  Dpl:2;
> +      UINT16  Present:1;
> +      UINT16  Avl:1;
> +      UINT16  Reserved1:1;
> +      UINT16  Db:1;
> +      UINT16  Granularity:1;
> +    } Bits;
> +    UINT16  Uint16;
> +} SEV_ES_SEGMENT_REGISTER_ATTRIBUTES;
> +
> +typedef struct {
> +  UINT16                                Selector;
> +  SEV_ES_SEGMENT_REGISTER_ATTRIBUTES    Attributes;
> +  UINT32                                Limit;
> +  UINT64                                Base;
> +} SEV_ES_SEGMENT_REGISTER;
> +
> +typedef struct {
> +  SEV_ES_SEGMENT_REGISTER  Es;
> +  SEV_ES_SEGMENT_REGISTER  Cs;
> +  SEV_ES_SEGMENT_REGISTER  Ss;
> +  SEV_ES_SEGMENT_REGISTER  Ds;
> +  SEV_ES_SEGMENT_REGISTER  Fs;
> +  SEV_ES_SEGMENT_REGISTER  Gs;
> +  SEV_ES_SEGMENT_REGISTER  Gdtr;
> +  SEV_ES_SEGMENT_REGISTER  Ldtr;
> +  SEV_ES_SEGMENT_REGISTER  Idtr;
> +  SEV_ES_SEGMENT_REGISTER  Tr;
> +  UINT8                    Reserved1[42];
> +  UINT8                    Vmpl;
> +  UINT8                    Reserved2[5];
> +  UINT64                   Efer;
> +  UINT8                    Reserved3[112];
> +  UINT64                   Cr4;
> +  UINT8                    Reserved4[8];
> +  UINT64                   Cr0;
> +  UINT64                   Dr7;
> +  UINT64                   Dr6;
> +  UINT64                   Rflags;
> +  UINT64                   Rip;
> +  UINT8                    Reserved5[232];
> +  UINT64                   GPat;
> +  UINT8                    Reserved6[320];
> +  UINT64                   SevFeatures;
> +  UINT8                    Reserved7[48];
> +  UINT64                   XCr0;
> +  UINT8                    Reserved8[24];
> +  UINT32                   Mxcsr;
> +  UINT16                   X87Ftw;
> +  UINT8                    Reserved9[2];
> +  UINT16                   X87Fcw;
> +} SEV_ES_SAVE_AREA;
> +#pragma pack ()
> +
>  #endif
>