From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.85.221.65; helo=mail-wr1-f65.google.com; envelope-from=philmd@redhat.com; receiver=edk2-devel@lists.01.org Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AF9A0201B0457 for ; Thu, 21 Feb 2019 12:57:03 -0800 (PST) Received: by mail-wr1-f65.google.com with SMTP id i16so23910375wrs.13 for ; Thu, 21 Feb 2019 12:57:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:from:openpgp:cc:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=ihZUjb5c8XT+opnGd+p3I0giITlkLqrhUU8P7GH1YBo=; b=RIrkPvX9FrnWvT1h6zkuB7FBqMgUMulTFk2hyAKV7ER65R1mTdS4nCeEcDHHFnOxKc xC+mLWR3nwaPXPe17y/NxjqdrdF2U/De0kfpuuqIIMFhHpxM0Q0ThjNJlH1Hs4tS25FE 5/Qsvzgi1JrlPaO+BwdJzyisGFhKH7GtgO4Pkd2ZxL7cznwL0QYFWlcQIizuzIAnjxRP uwn7VsN0jfxCTr3O+rDIIjjtOVpUhvqIe4o5NOYV5V6cqBD/qnPYBRgGGV9b7fFOkS7z xtiDaBIznJNxhPXN1BdtABdyLn+1uZu1mVb2D+OZ7wr8ZRS0bzbxDn/RahQycaGsOVCe ILyQ== X-Gm-Message-State: AHQUAuaWKEN5KjT4A52WRzjLBn6fT+vNulpR7jEmuY0haRsS690anONB PA//b410R1QzUg7Savm1bLQq2w== X-Google-Smtp-Source: AHgI3IblH19BeKTwMSFXiMM0HSjugoFaWBMPikoqMM4mD/e3NX6Y3GF4dEt1U2iNIT0cZV1ecMnmjQ== X-Received: by 2002:a5d:4686:: with SMTP id u6mr327540wrq.206.1550782621877; Thu, 21 Feb 2019 12:57:01 -0800 (PST) Received: from [192.168.1.37] (109.red-83-53-160.dynamicip.rima-tde.net. [83.53.160.109]) by smtp.gmail.com with ESMTPSA id b3sm19097668wme.27.2019.02.21.12.57.01 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Thu, 21 Feb 2019 12:57:01 -0800 (PST) To: "Wu, Hao A" , "edk2-devel@lists.01.org" References: From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: Date: Thu, 21 Feb 2019 21:57:00 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: Subject: Re: [PATCHv2 1/1] MdeModulePkg/SdMmcPciHcDxe Fix eMMC HS400 switch sequence X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Feb 2019 20:57:04 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Hi Hao A, On 2/20/19 2:11 AM, Wu, Hao A wrote: > Thanks Mateusz, > > Reviewed-by: Hao Wu > And pushed via commit 68c67d3a2a33261e41ff0123129b4e9759617f71. I think you mean "pushed 'after' commit 68c67d3a2a33261e41ff0123129b4e9759617f71". Commit 68c67d3a2a33261e41ff0123129b4e9759617f71 is: "BaseTools: Fixed a code bug for Pcd Array", while this patch is commited as 195f673f6270aaf73dd34b75f1da26451b63c316. Now about this commit 195f673f6270aaf, I think you have an issue with your configuration, as the patch author was remplaced from: Albecki, Mateusz to: Albecki, Mateusz Regards, Phil. > > Best Regards, > Hao Wu > > >> -----Original Message----- >> From: Albecki, Mateusz >> Sent: Monday, February 18, 2019 7:12 PM >> To: edk2-devel@lists.01.org >> Cc: Albecki, Mateusz; Wu, Hao A >> Subject: [PATCHv2 1/1] MdeModulePkg/SdMmcPciHcDxe Fix eMMC HS400 >> switch sequence >> >> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1140 >> >> In eMMC HS400 switch sequence flow eMMC driver attempted >> to execute SEND_STATUS just after switching bus timing to high >> speed and before downgrading clock frequency to 52MHz. Since link >> was at that time in incorrect state SEND_STATUS was failing which >> made driver think switch to HS400 failed. >> This change makes driver always change clock frequency after >> switching bus timing and before executing SEND_STATUS. >> >> Cc: Hao Wu >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Albecki Mateusz >> --- >> MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 39 >> +++++++++++++------------ >> 1 file changed, 20 insertions(+), 19 deletions(-) >> >> diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c >> b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c >> index 4ef849fd0962..15db8a87a5c4 100644 >> --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c >> +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c >> @@ -642,7 +642,7 @@ EmmcSwitchBusWidth ( >> } >> >> /** >> - Switch the clock frequency to the specified value. >> + Switch the bus timing and clock frequency. >> >> Refer to EMMC Electrical Standard Spec 5.1 Section 6.6 and SD Host >> Controller >> Simplified Spec 3.0 Figure 3-3 for details. >> @@ -660,7 +660,7 @@ EmmcSwitchBusWidth ( >> >> **/ >> EFI_STATUS >> -EmmcSwitchClockFreq ( >> +EmmcSwitchBusTiming ( >> IN EFI_PCI_IO_PROTOCOL *PciIo, >> IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru, >> IN UINT8 Slot, >> @@ -689,22 +689,10 @@ EmmcSwitchClockFreq ( >> >> Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet); >> if (EFI_ERROR (Status)) { >> - DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Switch to hstiming %d >> fails with %r\n", HsTiming, Status)); >> + DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Switch to hstiming %d >> fails with %r\n", HsTiming, Status)); >> return Status; >> } >> >> - Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus); >> - if (EFI_ERROR (Status)) { >> - DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Send status fails >> with %r\n", Status)); >> - return Status; >> - } >> - // >> - // Check the switch operation is really successful or not. >> - // >> - if ((DevStatus & BIT7) != 0) { >> - DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: The switch operation >> fails as DevStatus is 0x%08x\n", DevStatus)); >> - return EFI_DEVICE_ERROR; >> - } >> // >> // Convert the clock freq unit from MHz to KHz. >> // >> @@ -713,6 +701,19 @@ EmmcSwitchClockFreq ( >> return Status; >> } >> >> + Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus); >> + if (EFI_ERROR (Status)) { >> + DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Send status fails >> with %r\n", Status)); >> + return Status; >> + } >> + // >> + // Check the switch operation is really successful or not. >> + // >> + if ((DevStatus & BIT7) != 0) { >> + DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: The switch operation >> fails as DevStatus is 0x%08x\n", DevStatus)); >> + return EFI_DEVICE_ERROR; >> + } >> + >> if (mOverride != NULL && mOverride->NotifyPhase != NULL) { >> Status = mOverride->NotifyPhase ( >> Private->ControllerHandle, >> @@ -799,7 +800,7 @@ EmmcSwitchToHighSpeed ( >> } >> >> HsTiming = 1; >> - Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, Timing, >> ClockFreq); >> + Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, >> Timing, ClockFreq); >> >> return Status; >> } >> @@ -887,7 +888,7 @@ EmmcSwitchToHS200 ( >> Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof >> (ClockCtrl), &ClockCtrl); >> >> HsTiming = 2; >> - Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, Timing, >> ClockFreq); >> + Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, >> Timing, ClockFreq); >> if (EFI_ERROR (Status)) { >> return Status; >> } >> @@ -937,7 +938,7 @@ EmmcSwitchToHS400 ( >> // Set to Hight Speed timing and set the clock frequency to a value less than >> 52MHz. >> // >> HsTiming = 1; >> - Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, >> SdMmcMmcHsSdr, 52); >> + Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, >> SdMmcMmcHsSdr, 52); >> if (EFI_ERROR (Status)) { >> return Status; >> } >> @@ -957,7 +958,7 @@ EmmcSwitchToHS400 ( >> } >> >> HsTiming = 3; >> - Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, Timing, >> ClockFreq); >> + Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, >> Timing, ClockFreq); >> >> return Status; >> } >> -- >> 2.14.1.windows.1 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel >