From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web11.4651.1583919272948017912 for ; Wed, 11 Mar 2020 02:34:33 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: siyuan.fu@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Mar 2020 02:34:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,540,1574150400"; d="scan'208";a="277307446" Received: from shwdeopenpsi787.ccr.corp.intel.com ([10.239.158.56]) by fmsmga002.fm.intel.com with ESMTP; 11 Mar 2020 02:34:30 -0700 From: "Siyuan, Fu" To: devel@edk2.groups.io Cc: Bob Feng , Liming Gao Subject: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen. Date: Wed, 11 Mar 2020 17:34:28 +0800 Message-Id: X-Mailer: git-send-email 2.19.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The current FitGen has "-NA" parameter to indicate whether microcode is placed with an alignment, but it could only support 0x800 alignment: - With"-NA" means microcode is not aligned. - No "-NA" means Microcode is 0x800 aligned. There is no method to specify other alignment value. This patch add "-A" option to FitGen for to configure the alignment to a user specified value. The change is backward compatible as: - Only "-NA" means microcode is not aligned (same as before). - No "-NA" and No "-A" means Microcode is 0x800 aligned (same as before). - Only "-A" means microcode is aligned with specified value (new). Cc: Bob Feng Cc: Liming Gao Signed-off-by: Siyuan Fu --- Silicon/Intel/Tools/FitGen/FitGen.c | 35 +++++++++++++++++++---------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitGen/FitGen.c index 49ec33a7fd..75d8932d90 100644 --- a/Silicon/Intel/Tools/FitGen/FitGen.c +++ b/Silicon/Intel/Tools/FitGen/FitGen.c @@ -260,7 +260,8 @@ typedef struct { FIT_TABLE_CONTEXT_ENTRY BiosModule[MAX_BIOS_MODULE_ENTRY]; UINT32 BiosModuleVersion; FIT_TABLE_CONTEXT_ENTRY Microcode[MAX_MICROCODE_ENTRY]; - BOOLEAN MicrocodeAlignment; + BOOLEAN MicrocodeIsAligned; + UINT32 MicrocodeAlignValue; UINT32 MicrocodeVersion; FIT_TABLE_CONTEXT_ENTRY OptionalModule[MAX_OPTIONAL_ENTRY]; FIT_TABLE_CONTEXT_ENTRY PortModule[MAX_PORT_ENTRY]; @@ -325,6 +326,7 @@ Returns: "\t[-V ]\n" "\t[-F ] [-F ] [-V ]\n" "\t[-NA]\n" + "\t[-A ]\n" "\t[-CLEAR]\n" "\t[-L ]\n" "\t[-I ]\n" @@ -357,7 +359,8 @@ Returns: printf ("\tMicrocodeGuid - Guid of Microcode Module.\n"); printf ("\tMicrocodeSlotSize - Occupied region size of each Microcode binary.\n"); printf ("\tMicrocodeFfsGuid - Guid of FFS which is used to save Microcode binary"); - printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is 0x800 aligned.\n"); + printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is aligned with option MicrocodeAlignment value.\n"); + printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. Ignored if \"-NA\" is specified. Default value is 0x800.\n"); printf ("\tRecordType - FIT entry record type. User should ensure it is ordered.\n"); printf ("\tRecordDataAddress - FIT entry record data address.\n"); printf ("\tRecordDataSize - FIT entry record data size.\n"); @@ -957,17 +960,25 @@ Returns: // if ((Index >= argc) || ((strcmp (argv[Index], "-NA") != 0) && - (strcmp (argv[Index], "-na") != 0)) ) { + (strcmp (argv[Index], "-na") != 0) && + (strcmp (argv[Index], "-A") != 0) && + (strcmp (argv[Index], "-a") != 0))) { // // by pass // - gFitTableContext.MicrocodeAlignment = TRUE; - } else { + gFitTableContext.MicrocodeIsAligned = TRUE; + gFitTableContext.MicrocodeAlignValue = 0x800; + } else if ((strcmp (argv[Index], "-NA") == 0) || (strcmp (argv[Index], "-na") == 0)) { + gFitTableContext.MicrocodeIsAligned = FALSE; + gFitTableContext.MicrocodeAlignValue = 1; + Index += 1; + } else if ((strcmp (argv[Index], "-A") == 0) || (strcmp (argv[Index], "-a") == 0)) { + gFitTableContext.MicrocodeIsAligned = TRUE; // - // no alignment + // Get alignment from parameter // - gFitTableContext.MicrocodeAlignment = FALSE; - Index += 1; + gFitTableContext.MicrocodeAlignValue = xtoi (argv[Index + 1]);; + Index += 2; } // @@ -1159,8 +1170,8 @@ Returns: // // MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment. // - if (gFitTableContext.MicrocodeAlignment) { - MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT; + if (gFitTableContext.MicrocodeIsAligned) { + MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + (gFitTableContext.MicrocodeAlignValue - 1)) & ~(gFitTableContext.MicrocodeAlignValue - 1); } else { MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32)); } @@ -1537,8 +1548,8 @@ Returns: // // MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment. // - if (gFitTableContext.MicrocodeAlignment) { - MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT; + if (gFitTableContext.MicrocodeIsAligned) { + MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + (gFitTableContext.MicrocodeAlignValue - 1)) & ~(gFitTableContext.MicrocodeAlignValue - 1); } else { MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32)); } -- 2.19.1.windows.1