* [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.
@ 2020-03-11 9:34 Siyuan, Fu
2020-03-12 2:02 ` Bob Feng
0 siblings, 1 reply; 3+ messages in thread
From: Siyuan, Fu @ 2020-03-11 9:34 UTC (permalink / raw)
To: devel; +Cc: Bob Feng, Liming Gao
The current FitGen has "-NA" parameter to indicate whether microcode
is placed with an alignment, but it could only support 0x800 alignment:
- With"-NA" means microcode is not aligned.
- No "-NA" means Microcode is 0x800 aligned.
There is no method to specify other alignment value.
This patch add "-A" option to FitGen for to configure the alignment
to a user specified value. The change is backward compatible as:
- Only "-NA" means microcode is not aligned (same as before).
- No "-NA" and No "-A" means Microcode is 0x800 aligned (same as
before).
- Only "-A" means microcode is aligned with specified value (new).
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
---
Silicon/Intel/Tools/FitGen/FitGen.c | 35 +++++++++++++++++++----------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitGen/FitGen.c
index 49ec33a7fd..75d8932d90 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -260,7 +260,8 @@ typedef struct {
FIT_TABLE_CONTEXT_ENTRY BiosModule[MAX_BIOS_MODULE_ENTRY];
UINT32 BiosModuleVersion;
FIT_TABLE_CONTEXT_ENTRY Microcode[MAX_MICROCODE_ENTRY];
- BOOLEAN MicrocodeAlignment;
+ BOOLEAN MicrocodeIsAligned;
+ UINT32 MicrocodeAlignValue;
UINT32 MicrocodeVersion;
FIT_TABLE_CONTEXT_ENTRY OptionalModule[MAX_OPTIONAL_ENTRY];
FIT_TABLE_CONTEXT_ENTRY PortModule[MAX_PORT_ENTRY];
@@ -325,6 +326,7 @@ Returns:
"\t[-V <FitEntryDefaultVersion>]\n"
"\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>] [-V <FitHeaderVersion>]\n"
"\t[-NA]\n"
+ "\t[-A <MicrocodeAlignment>]\n"
"\t[-CLEAR]\n"
"\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"
"\t[-I <BiosInfoGuid>]\n"
@@ -357,7 +359,8 @@ Returns:
printf ("\tMicrocodeGuid - Guid of Microcode Module.\n");
printf ("\tMicrocodeSlotSize - Occupied region size of each Microcode binary.\n");
printf ("\tMicrocodeFfsGuid - Guid of FFS which is used to save Microcode binary");
- printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is 0x800 aligned.\n");
+ printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is aligned with option MicrocodeAlignment value.\n");
+ printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. Ignored if \"-NA\" is specified. Default value is 0x800.\n");
printf ("\tRecordType - FIT entry record type. User should ensure it is ordered.\n");
printf ("\tRecordDataAddress - FIT entry record data address.\n");
printf ("\tRecordDataSize - FIT entry record data size.\n");
@@ -957,17 +960,25 @@ Returns:
//
if ((Index >= argc) ||
((strcmp (argv[Index], "-NA") != 0) &&
- (strcmp (argv[Index], "-na") != 0)) ) {
+ (strcmp (argv[Index], "-na") != 0) &&
+ (strcmp (argv[Index], "-A") != 0) &&
+ (strcmp (argv[Index], "-a") != 0))) {
//
// by pass
//
- gFitTableContext.MicrocodeAlignment = TRUE;
- } else {
+ gFitTableContext.MicrocodeIsAligned = TRUE;
+ gFitTableContext.MicrocodeAlignValue = 0x800;
+ } else if ((strcmp (argv[Index], "-NA") == 0) || (strcmp (argv[Index], "-na") == 0)) {
+ gFitTableContext.MicrocodeIsAligned = FALSE;
+ gFitTableContext.MicrocodeAlignValue = 1;
+ Index += 1;
+ } else if ((strcmp (argv[Index], "-A") == 0) || (strcmp (argv[Index], "-a") == 0)) {
+ gFitTableContext.MicrocodeIsAligned = TRUE;
//
- // no alignment
+ // Get alignment from parameter
//
- gFitTableContext.MicrocodeAlignment = FALSE;
- Index += 1;
+ gFitTableContext.MicrocodeAlignValue = xtoi (argv[Index + 1]);;
+ Index += 2;
}
//
@@ -1159,8 +1170,8 @@ Returns:
//
// MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment.
//
- if (gFitTableContext.MicrocodeAlignment) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+ if (gFitTableContext.MicrocodeIsAligned) {
+ MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + (gFitTableContext.MicrocodeAlignValue - 1)) & ~(gFitTableContext.MicrocodeAlignValue - 1);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
@@ -1537,8 +1548,8 @@ Returns:
//
// MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment.
//
- if (gFitTableContext.MicrocodeAlignment) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+ if (gFitTableContext.MicrocodeIsAligned) {
+ MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + (gFitTableContext.MicrocodeAlignValue - 1)) & ~(gFitTableContext.MicrocodeAlignValue - 1);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
--
2.19.1.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.
2020-03-11 9:34 [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen Siyuan, Fu
@ 2020-03-12 2:02 ` Bob Feng
2020-03-17 5:26 ` Liming Gao
0 siblings, 1 reply; 3+ messages in thread
From: Bob Feng @ 2020-03-12 2:02 UTC (permalink / raw)
To: Fu, Siyuan, devel@edk2.groups.io; +Cc: Gao, Liming
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
-----Original Message-----
From: Fu, Siyuan
Sent: Wednesday, March 11, 2020 5:34 PM
To: devel@edk2.groups.io
Cc: Feng, Bob C <bob.c.feng@intel.com>; Gao, Liming <liming.gao@intel.com>
Subject: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.
The current FitGen has "-NA" parameter to indicate whether microcode is placed with an alignment, but it could only support 0x800 alignment:
- With"-NA" means microcode is not aligned.
- No "-NA" means Microcode is 0x800 aligned.
There is no method to specify other alignment value.
This patch add "-A" option to FitGen for to configure the alignment to a user specified value. The change is backward compatible as:
- Only "-NA" means microcode is not aligned (same as before).
- No "-NA" and No "-A" means Microcode is 0x800 aligned (same as
before).
- Only "-A" means microcode is aligned with specified value (new).
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
---
Silicon/Intel/Tools/FitGen/FitGen.c | 35 +++++++++++++++++++----------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitGen/FitGen.c
index 49ec33a7fd..75d8932d90 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -260,7 +260,8 @@ typedef struct {
FIT_TABLE_CONTEXT_ENTRY BiosModule[MAX_BIOS_MODULE_ENTRY];
UINT32 BiosModuleVersion;
FIT_TABLE_CONTEXT_ENTRY Microcode[MAX_MICROCODE_ENTRY];
- BOOLEAN MicrocodeAlignment;
+ BOOLEAN MicrocodeIsAligned;
+ UINT32 MicrocodeAlignValue;
UINT32 MicrocodeVersion;
FIT_TABLE_CONTEXT_ENTRY OptionalModule[MAX_OPTIONAL_ENTRY];
FIT_TABLE_CONTEXT_ENTRY PortModule[MAX_PORT_ENTRY];
@@ -325,6 +326,7 @@ Returns:
"\t[-V <FitEntryDefaultVersion>]\n"
"\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>] [-V <FitHeaderVersion>]\n"
"\t[-NA]\n"
+ "\t[-A <MicrocodeAlignment>]\n"
"\t[-CLEAR]\n"
"\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"
"\t[-I <BiosInfoGuid>]\n"
@@ -357,7 +359,8 @@ Returns:
printf ("\tMicrocodeGuid - Guid of Microcode Module.\n");
printf ("\tMicrocodeSlotSize - Occupied region size of each Microcode binary.\n");
printf ("\tMicrocodeFfsGuid - Guid of FFS which is used to save Microcode binary");
- printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is 0x800 aligned.\n");
+ printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is aligned with option MicrocodeAlignment value.\n");
+ printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. Ignored if \"-NA\" is specified. Default value is 0x800.\n");
printf ("\tRecordType - FIT entry record type. User should ensure it is ordered.\n");
printf ("\tRecordDataAddress - FIT entry record data address.\n");
printf ("\tRecordDataSize - FIT entry record data size.\n");
@@ -957,17 +960,25 @@ Returns:
//
if ((Index >= argc) ||
((strcmp (argv[Index], "-NA") != 0) &&
- (strcmp (argv[Index], "-na") != 0)) ) {
+ (strcmp (argv[Index], "-na") != 0) &&
+ (strcmp (argv[Index], "-A") != 0) &&
+ (strcmp (argv[Index], "-a") != 0))) {
//
// by pass
//
- gFitTableContext.MicrocodeAlignment = TRUE;
- } else {
+ gFitTableContext.MicrocodeIsAligned = TRUE;
+ gFitTableContext.MicrocodeAlignValue = 0x800; } else if ((strcmp
+ (argv[Index], "-NA") == 0) || (strcmp (argv[Index], "-na") == 0)) {
+ gFitTableContext.MicrocodeIsAligned = FALSE;
+ gFitTableContext.MicrocodeAlignValue = 1;
+ Index += 1;
+ } else if ((strcmp (argv[Index], "-A") == 0) || (strcmp (argv[Index], "-a") == 0)) {
+ gFitTableContext.MicrocodeIsAligned = TRUE;
//
- // no alignment
+ // Get alignment from parameter
//
- gFitTableContext.MicrocodeAlignment = FALSE;
- Index += 1;
+ gFitTableContext.MicrocodeAlignValue = xtoi (argv[Index + 1]);;
+ Index += 2;
}
//
@@ -1159,8 +1170,8 @@ Returns:
//
// MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment.
//
- if (gFitTableContext.MicrocodeAlignment) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+ if (gFitTableContext.MicrocodeIsAligned) {
+ MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) +
+ (gFitTableContext.MicrocodeAlignValue - 1)) &
+ ~(gFitTableContext.MicrocodeAlignValue - 1);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
@@ -1537,8 +1548,8 @@ Returns:
//
// MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment.
//
- if (gFitTableContext.MicrocodeAlignment) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+ if (gFitTableContext.MicrocodeIsAligned) {
+ MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) +
+ (gFitTableContext.MicrocodeAlignValue - 1)) &
+ ~(gFitTableContext.MicrocodeAlignValue - 1);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
--
2.19.1.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.
2020-03-12 2:02 ` Bob Feng
@ 2020-03-17 5:26 ` Liming Gao
0 siblings, 0 replies; 3+ messages in thread
From: Liming Gao @ 2020-03-17 5:26 UTC (permalink / raw)
To: Feng, Bob C, Fu, Siyuan, devel@edk2.groups.io
Siyuan:
Sorry for the late response. Please also update tool minor version to match this change.
#define UTILITY_MINOR_VERSION 60 ==> #define UTILITY_MINOR_VERSION 61
It is defined edk2-platforms\Silicon\Intel\Tools\FitGen\FitGen.h
Thanks
Liming
-----Original Message-----
From: Feng, Bob C <bob.c.feng@intel.com>
Sent: 2020年3月12日 10:02
To: Fu, Siyuan <siyuan.fu@intel.com>; devel@edk2.groups.io
Cc: Gao, Liming <liming.gao@intel.com>
Subject: RE: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
-----Original Message-----
From: Fu, Siyuan
Sent: Wednesday, March 11, 2020 5:34 PM
To: devel@edk2.groups.io
Cc: Feng, Bob C <bob.c.feng@intel.com>; Gao, Liming <liming.gao@intel.com>
Subject: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.
The current FitGen has "-NA" parameter to indicate whether microcode is placed with an alignment, but it could only support 0x800 alignment:
- With"-NA" means microcode is not aligned.
- No "-NA" means Microcode is 0x800 aligned.
There is no method to specify other alignment value.
This patch add "-A" option to FitGen for to configure the alignment to a user specified value. The change is backward compatible as:
- Only "-NA" means microcode is not aligned (same as before).
- No "-NA" and No "-A" means Microcode is 0x800 aligned (same as
before).
- Only "-A" means microcode is aligned with specified value (new).
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
---
Silicon/Intel/Tools/FitGen/FitGen.c | 35 +++++++++++++++++++----------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c b/Silicon/Intel/Tools/FitGen/FitGen.c
index 49ec33a7fd..75d8932d90 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -260,7 +260,8 @@ typedef struct {
FIT_TABLE_CONTEXT_ENTRY BiosModule[MAX_BIOS_MODULE_ENTRY];
UINT32 BiosModuleVersion;
FIT_TABLE_CONTEXT_ENTRY Microcode[MAX_MICROCODE_ENTRY];
- BOOLEAN MicrocodeAlignment;
+ BOOLEAN MicrocodeIsAligned;
+ UINT32 MicrocodeAlignValue;
UINT32 MicrocodeVersion;
FIT_TABLE_CONTEXT_ENTRY OptionalModule[MAX_OPTIONAL_ENTRY];
FIT_TABLE_CONTEXT_ENTRY PortModule[MAX_PORT_ENTRY];
@@ -325,6 +326,7 @@ Returns:
"\t[-V <FitEntryDefaultVersion>]\n"
"\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>] [-V <FitHeaderVersion>]\n"
"\t[-NA]\n"
+ "\t[-A <MicrocodeAlignment>]\n"
"\t[-CLEAR]\n"
"\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"
"\t[-I <BiosInfoGuid>]\n"
@@ -357,7 +359,8 @@ Returns:
printf ("\tMicrocodeGuid - Guid of Microcode Module.\n");
printf ("\tMicrocodeSlotSize - Occupied region size of each Microcode binary.\n");
printf ("\tMicrocodeFfsGuid - Guid of FFS which is used to save Microcode binary");
- printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is 0x800 aligned.\n");
+ printf ("\t-NA - No 0x800 aligned Microcode requirement. No -NA means Microcode is aligned with option MicrocodeAlignment value.\n");
+ printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. Ignored if \"-NA\" is specified. Default value is 0x800.\n");
printf ("\tRecordType - FIT entry record type. User should ensure it is ordered.\n");
printf ("\tRecordDataAddress - FIT entry record data address.\n");
printf ("\tRecordDataSize - FIT entry record data size.\n");
@@ -957,17 +960,25 @@ Returns:
//
if ((Index >= argc) ||
((strcmp (argv[Index], "-NA") != 0) &&
- (strcmp (argv[Index], "-na") != 0)) ) {
+ (strcmp (argv[Index], "-na") != 0) &&
+ (strcmp (argv[Index], "-A") != 0) &&
+ (strcmp (argv[Index], "-a") != 0))) {
//
// by pass
//
- gFitTableContext.MicrocodeAlignment = TRUE;
- } else {
+ gFitTableContext.MicrocodeIsAligned = TRUE;
+ gFitTableContext.MicrocodeAlignValue = 0x800; } else if ((strcmp
+ (argv[Index], "-NA") == 0) || (strcmp (argv[Index], "-na") == 0)) {
+ gFitTableContext.MicrocodeIsAligned = FALSE;
+ gFitTableContext.MicrocodeAlignValue = 1;
+ Index += 1;
+ } else if ((strcmp (argv[Index], "-A") == 0) || (strcmp (argv[Index], "-a") == 0)) {
+ gFitTableContext.MicrocodeIsAligned = TRUE;
//
- // no alignment
+ // Get alignment from parameter
//
- gFitTableContext.MicrocodeAlignment = FALSE;
- Index += 1;
+ gFitTableContext.MicrocodeAlignValue = xtoi (argv[Index + 1]);;
+ Index += 2;
}
//
@@ -1159,8 +1170,8 @@ Returns:
//
// MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment.
//
- if (gFitTableContext.MicrocodeAlignment) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+ if (gFitTableContext.MicrocodeIsAligned) {
+ MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) +
+ (gFitTableContext.MicrocodeAlignValue - 1)) &
+ ~(gFitTableContext.MicrocodeAlignValue - 1);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
@@ -1537,8 +1548,8 @@ Returns:
//
// MCU might be put at 2KB alignment, if so, we need to adjust the size as 2KB alignment.
//
- if (gFitTableContext.MicrocodeAlignment) {
- MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+ if (gFitTableContext.MicrocodeIsAligned) {
+ MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) +
+ (gFitTableContext.MicrocodeAlignValue - 1)) &
+ ~(gFitTableContext.MicrocodeAlignValue - 1);
} else {
MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32));
}
--
2.19.1.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-03-17 5:26 UTC | newest]
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2020-03-11 9:34 [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen Siyuan, Fu
2020-03-12 2:02 ` Bob Feng
2020-03-17 5:26 ` Liming Gao
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