From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web11.903.1647050145463002246 for ; Fri, 11 Mar 2022 17:55:45 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=JRMBrZxz; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647050145; x=1678586145; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nPVP/3IdPpcB+CTl1mKvyGtw9v57MZFFR0+clgirt6I=; b=JRMBrZxzITjuw5Es1ihn9ZzqGTqjx6gcCjc37u7OYM0iOl0uV6FTCpNp Xxg4KL2QqbxfGOmzJAMMXokSAiNdfFlvxMo7ebonZDZtlgEh+LHe2B6Xm caT6iAn2RUZOcLH5848lCXcJ6g/f3dcigJG0xPC3/Hgk8J4lgXNUWtVw6 La/ksct/cN//w7tKnv4/r0sQBgO4Z1rDgqbzwqYPnpX+asibbOWIQKErv uxjav02BU1ETKLsALGzP1HR2wRN7b4qR+spo9LeXsPQ9U3AnpvByDnM4q 9FAQxilkjO02I7cf7hn1HGX/XdDgrywNyMgQlcks8PpwIT1zc6wnT5nUF g==; X-IronPort-AV: E=McAfee;i="6200,9189,10283"; a="255894676" X-IronPort-AV: E=Sophos;i="5.90,175,1643702400"; d="scan'208";a="255894676" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Mar 2022 17:55:44 -0800 X-IronPort-AV: E=Sophos;i="5.90,175,1643702400"; d="scan'208";a="555564837" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.255.29.254]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Mar 2022 17:55:41 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann , Sebastien Boeuf Subject: [PATCH V8 25/47] OvmfPkg/PlatformPei: Refactor MemMapInitialization Date: Sat, 12 Mar 2022 09:53:50 +0800 Message-Id: X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863 MemMapInitialization is split into 2 functions: - PlatformMemMapInitialization is for PlatformInfoLib - MemMapInitialization calls PlatformMemMapInitialization and then sets PCDs. It is for PlatformPei. Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Cc: Sebastien Boeuf Signed-off-by: Min Xu --- OvmfPkg/PlatformPei/Platform.c | 35 +++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 3e02ba2c9fc4..01fca33e7119 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -52,7 +52,8 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = { }; VOID -MemMapInitialization ( +EFIAPI +PlatformMemMapInitialization ( IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { @@ -110,10 +111,6 @@ MemMapInitialization ( // PciSize = 0xFC000000 - PciBase; PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize); - PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase); - ASSERT_RETURN_ERROR (PcdStatus); - PcdStatus = PcdSet64S (PcdPciMmio32Size, PciSize); - ASSERT_RETURN_ERROR (PcdStatus); PlatformInfoHob->PcdPciMmio32Base = PciBase; PlatformInfoHob->PcdPciMmio32Size = PciSize; @@ -173,15 +170,35 @@ MemMapInitialization ( PciIoBase, PciIoSize ); - PcdStatus = PcdSet64S (PcdPciIoBase, PciIoBase); - ASSERT_RETURN_ERROR (PcdStatus); - PcdStatus = PcdSet64S (PcdPciIoSize, PciIoSize); - ASSERT_RETURN_ERROR (PcdStatus); PlatformInfoHob->PcdPciIoBase = PciIoBase; PlatformInfoHob->PcdPciIoSize = PciIoSize; } +VOID +MemMapInitialization ( + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + RETURN_STATUS PcdStatus; + + PlatformMemMapInitialization (PlatformInfoHob); + + if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) { + return; + } + + PcdStatus = PcdSet64S (PcdPciMmio32Base, PlatformInfoHob->PcdPciMmio32Base); + ASSERT_RETURN_ERROR (PcdStatus); + PcdStatus = PcdSet64S (PcdPciMmio32Size, PlatformInfoHob->PcdPciMmio32Size); + ASSERT_RETURN_ERROR (PcdStatus); + + PcdStatus = PcdSet64S (PcdPciIoBase, PlatformInfoHob->PcdPciIoBase); + ASSERT_RETURN_ERROR (PcdStatus); + PcdStatus = PcdSet64S (PcdPciIoSize, PlatformInfoHob->PcdPciIoSize); + ASSERT_RETURN_ERROR (PcdStatus); +} + #define UPDATE_BOOLEAN_PCD_FROM_FW_CFG(TokenName) \ do { \ BOOLEAN Setting; \ -- 2.29.2.windows.2