* [RFC PATCH v1 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:05 ` Laszlo Ersek
2019-04-03 7:00 ` [RFC PATCH v1 2/8] OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg Hao Wu
` (7 subsequent siblings)
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit copies the exact 8259InterruptControllerDxe driver from
PcAtChipsetPkg to OvmfPkg.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/8259InterruptControllerDxe/8259.inf | 52 ++
OvmfPkg/8259InterruptControllerDxe/8259.h | 226 +++++++
OvmfPkg/8259InterruptControllerDxe/8259.c | 628 ++++++++++++++++++++
OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni | 22 +
| 20 +
5 files changed, 948 insertions(+)
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
new file mode 100644
index 0000000000..1d9be675e3
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
@@ -0,0 +1,52 @@
+## @file
+# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
+#
+# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = Legacy8259
+ MODULE_UNI_FILE = Legacy8259.uni
+ FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = Install8259
+
+[Sources]
+ 8259.c
+ 8259.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+ PcAtChipsetPkg/PcAtChipsetPkg.dec
+
+[LibraryClasses]
+ UefiBootServicesTableLib
+ DebugLib
+ UefiDriverEntryPoint
+ IoLib
+ PcdLib
+
+[Protocols]
+ gEfiLegacy8259ProtocolGuid ## PRODUCES
+ gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
+
+[Pcd]
+ gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
+ gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
+
+[Depex]
+ TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ Legacy8259Extra.uni
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
new file mode 100644
index 0000000000..0d4c1e8223
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
@@ -0,0 +1,226 @@
+/** @file
+ Driver implementing the Tiano Legacy 8259 Protocol
+
+Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _8259_H__
+#define _8259_H__
+
+#include <FrameworkDxe.h>
+
+#include <Protocol/Legacy8259.h>
+#include <Protocol/PciIo.h>
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/BaseLib.h>
+#include <Library/PcdLib.h>
+
+#include <IndustryStandard/Pci.h>
+
+// 8259 Hardware definitions
+
+#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08
+#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70
+
+#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68
+#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
+
+#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20
+#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
+#define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0
+#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
+#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0
+#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1
+
+#define LEGACY_8259_EOI 0x20
+
+// Protocol Function Prototypes
+
+/**
+ Sets the base address for the 8259 master and slave PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
+ @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetVectorBase (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ );
+
+/**
+ Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Sets the mode of the PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Mode 16-bit real or 32-bit protected mode.
+ @param[in] Mask The value with which to set the interrupt mask.
+ @param[in] EdgeLevel The value with which to set the edge/level mask.
+
+ @retval EFI_SUCCESS The mode was set successfully.
+ @retval EFI_INVALID_PARAMETER The mode was not set.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMode (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ );
+
+/**
+ Translates the IRQ into a vector.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[out] Vector The vector that is assigned to the IRQ.
+
+ @retval EFI_SUCCESS The Vector that matches Irq was returned.
+ @retval EFI_INVALID_PARAMETER Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetVector (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Enables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EnableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ );
+
+/**
+ Disables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259DisableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ Reads the PCI configuration space to get the interrupt number that is assigned to the card.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] PciHandle PCI function for which to return the vector.
+ @param[out] Vector IRQ number that corresponds to the interrupt line.
+
+ @retval EFI_SUCCESS The interrupt line value was read successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetInterruptLine (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Issues the End of Interrupt (EOI) commands to PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq The interrupt for which to issue the EOI command.
+
+ @retval EFI_SUCCESS The EOI command was issued.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EndOfInterrupt (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+#endif
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.c b/OvmfPkg/8259InterruptControllerDxe/8259.c
new file mode 100644
index 0000000000..a89e893649
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.c
@@ -0,0 +1,628 @@
+/** @file
+ This contains the installation function for the driver.
+
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "8259.h"
+
+//
+// Global for the Legacy 8259 Protocol that is produced by this driver
+//
+EFI_LEGACY_8259_PROTOCOL mInterrupt8259 = {
+ Interrupt8259SetVectorBase,
+ Interrupt8259GetMask,
+ Interrupt8259SetMask,
+ Interrupt8259SetMode,
+ Interrupt8259GetVector,
+ Interrupt8259EnableIrq,
+ Interrupt8259DisableIrq,
+ Interrupt8259GetInterruptLine,
+ Interrupt8259EndOfInterrupt
+};
+
+//
+// Global for the handle that the Legacy 8259 Protocol is installed
+//
+EFI_HANDLE m8259Handle = NULL;
+
+UINT8 mMasterBase = 0xff;
+UINT8 mSlaveBase = 0xff;
+EFI_8259_MODE mMode = Efi8259ProtectedMode;
+UINT16 mProtectedModeMask = 0xffff;
+UINT16 mLegacyModeMask;
+UINT16 mProtectedModeEdgeLevel = 0x0000;
+UINT16 mLegacyModeEdgeLevel;
+
+//
+// Worker Functions
+//
+
+/**
+ Write to mask and edge/level triggered registers of master and slave PICs.
+
+ @param[in] Mask low byte for master PIC mask register,
+ high byte for slave PIC mask register.
+ @param[in] EdgeLevel low byte for master PIC edge/level triggered register,
+ high byte for slave PIC edge/level triggered register.
+
+**/
+VOID
+Interrupt8259WriteMask (
+ IN UINT16 Mask,
+ IN UINT16 EdgeLevel
+ )
+{
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8) Mask);
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8) (Mask >> 8));
+ IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8) EdgeLevel);
+ IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8) (EdgeLevel >> 8));
+}
+
+/**
+ Read from mask and edge/level triggered registers of master and slave PICs.
+
+ @param[out] Mask low byte for master PIC mask register,
+ high byte for slave PIC mask register.
+ @param[out] EdgeLevel low byte for master PIC edge/level triggered register,
+ high byte for slave PIC edge/level triggered register.
+
+**/
+VOID
+Interrupt8259ReadMask (
+ OUT UINT16 *Mask,
+ OUT UINT16 *EdgeLevel
+ )
+{
+ UINT16 MasterValue;
+ UINT16 SlaveValue;
+
+ if (Mask != NULL) {
+ MasterValue = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
+ SlaveValue = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
+
+ *Mask = (UINT16) (MasterValue | (SlaveValue << 8));
+ }
+
+ if (EdgeLevel != NULL) {
+ MasterValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER);
+ SlaveValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE);
+
+ *EdgeLevel = (UINT16) (MasterValue | (SlaveValue << 8));
+ }
+}
+
+//
+// Legacy 8259 Protocol Interface Functions
+//
+
+/**
+ Sets the base address for the 8259 master and slave PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
+ @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetVectorBase (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ )
+{
+ UINT8 Mask;
+ EFI_TPL OriginalTpl;
+
+ OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ //
+ // Set vector base for slave PIC
+ //
+ if (SlaveBase != mSlaveBase) {
+ mSlaveBase = SlaveBase;
+
+ //
+ // Initialization sequence is needed for setting vector base.
+ //
+
+ //
+ // Preserve interrtup mask register before initialization sequence
+ // because it will be cleared during initialization
+ //
+ Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
+
+ //
+ // ICW1: cascade mode, ICW4 write required
+ //
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x11);
+
+ //
+ // ICW2: new vector base (must be multiple of 8)
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, mSlaveBase);
+
+ //
+ // ICW3: slave indentification code must be 2
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x02);
+
+ //
+ // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x01);
+
+ //
+ // Restore interrupt mask register
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, Mask);
+ }
+
+ //
+ // Set vector base for master PIC
+ //
+ if (MasterBase != mMasterBase) {
+ mMasterBase = MasterBase;
+
+ //
+ // Initialization sequence is needed for setting vector base.
+ //
+
+ //
+ // Preserve interrtup mask register before initialization sequence
+ // because it will be cleared during initialization
+ //
+ Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
+
+ //
+ // ICW1: cascade mode, ICW4 write required
+ //
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x11);
+
+ //
+ // ICW2: new vector base (must be multiple of 8)
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, mMasterBase);
+
+ //
+ // ICW3: slave PIC is cascaded on IRQ2
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x04);
+
+ //
+ // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x01);
+
+ //
+ // Restore interrupt mask register
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);
+ }
+
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
+
+ gBS->RestoreTPL (OriginalTpl);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ )
+{
+ if (LegacyMask != NULL) {
+ *LegacyMask = mLegacyModeMask;
+ }
+
+ if (LegacyEdgeLevel != NULL) {
+ *LegacyEdgeLevel = mLegacyModeEdgeLevel;
+ }
+
+ if (ProtectedMask != NULL) {
+ *ProtectedMask = mProtectedModeMask;
+ }
+
+ if (ProtectedEdgeLevel != NULL) {
+ *ProtectedEdgeLevel = mProtectedModeEdgeLevel;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
+ @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
+ @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
+ @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMask (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ )
+{
+ if (LegacyMask != NULL) {
+ mLegacyModeMask = *LegacyMask;
+ }
+
+ if (LegacyEdgeLevel != NULL) {
+ mLegacyModeEdgeLevel = *LegacyEdgeLevel;
+ }
+
+ if (ProtectedMask != NULL) {
+ mProtectedModeMask = *ProtectedMask;
+ }
+
+ if (ProtectedEdgeLevel != NULL) {
+ mProtectedModeEdgeLevel = *ProtectedEdgeLevel;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Sets the mode of the PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Mode 16-bit real or 32-bit protected mode.
+ @param[in] Mask The value with which to set the interrupt mask.
+ @param[in] EdgeLevel The value with which to set the edge/level mask.
+
+ @retval EFI_SUCCESS The mode was set successfully.
+ @retval EFI_INVALID_PARAMETER The mode was not set.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259SetMode (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ )
+{
+ if (Mode == mMode) {
+ return EFI_SUCCESS;
+ }
+
+ if (Mode == Efi8259LegacyMode) {
+ //
+ // In Efi8259ProtectedMode, mask and edge/level trigger registers should
+ // be changed through this protocol, so we can track them in the
+ // corresponding module variables.
+ //
+ Interrupt8259ReadMask (&mProtectedModeMask, &mProtectedModeEdgeLevel);
+
+ if (Mask != NULL) {
+ //
+ // Update the Mask for the new mode
+ //
+ mLegacyModeMask = *Mask;
+ }
+
+ if (EdgeLevel != NULL) {
+ //
+ // Update the Edge/Level triggered mask for the new mode
+ //
+ mLegacyModeEdgeLevel = *EdgeLevel;
+ }
+
+ mMode = Mode;
+
+ //
+ // Write new legacy mode mask/trigger level
+ //
+ Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);
+
+ return EFI_SUCCESS;
+ }
+
+ if (Mode == Efi8259ProtectedMode) {
+ //
+ // Save the legacy mode mask/trigger level
+ //
+ Interrupt8259ReadMask (&mLegacyModeMask, &mLegacyModeEdgeLevel);
+ //
+ // Always force Timer to be enabled after return from 16-bit code.
+ // This always insures that on next entry, timer is counting.
+ //
+ mLegacyModeMask &= 0xFFFE;
+
+ if (Mask != NULL) {
+ //
+ // Update the Mask for the new mode
+ //
+ mProtectedModeMask = *Mask;
+ }
+
+ if (EdgeLevel != NULL) {
+ //
+ // Update the Edge/Level triggered mask for the new mode
+ //
+ mProtectedModeEdgeLevel = *EdgeLevel;
+ }
+
+ mMode = Mode;
+
+ //
+ // Write new protected mode mask/trigger level
+ //
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ return EFI_SUCCESS;
+ }
+
+ return EFI_INVALID_PARAMETER;
+}
+
+/**
+ Translates the IRQ into a vector.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[out] Vector The vector that is assigned to the IRQ.
+
+ @retval EFI_SUCCESS The Vector that matches Irq was returned.
+ @retval EFI_INVALID_PARAMETER Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetVector (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (Irq <= Efi8259Irq7) {
+ *Vector = (UINT8) (mMasterBase + Irq);
+ } else {
+ *Vector = (UINT8) (mSlaveBase + (Irq - Efi8259Irq8));
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Enables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+ @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EnableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ mProtectedModeMask = (UINT16) (mProtectedModeMask & ~(1 << Irq));
+ if (LevelTriggered) {
+ mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel | (1 << Irq));
+ } else {
+ mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
+ }
+
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Disables the specified IRQ.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq IRQ0-IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259DisableIrq (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ mProtectedModeMask = (UINT16) (mProtectedModeMask | (1 << Irq));
+
+ mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
+
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Reads the PCI configuration space to get the interrupt number that is assigned to the card.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] PciHandle PCI function for which to return the vector.
+ @param[out] Vector IRQ number that corresponds to the interrupt line.
+
+ @retval EFI_SUCCESS The interrupt line value was read successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259GetInterruptLine (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ )
+{
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT8 InterruptLine;
+ EFI_STATUS Status;
+
+ Status = gBS->HandleProtocol (
+ PciHandle,
+ &gEfiPciIoProtocolGuid,
+ (VOID **) &PciIo
+ );
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PciIo->Pci.Read (
+ PciIo,
+ EfiPciIoWidthUint8,
+ PCI_INT_LINE_OFFSET,
+ 1,
+ &InterruptLine
+ );
+ //
+ // Interrupt line is same location for standard PCI cards, standard
+ // bridge and CardBus bridge.
+ //
+ *Vector = InterruptLine;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Issues the End of Interrupt (EOI) commands to PICs.
+
+ @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
+ @param[in] Irq The interrupt for which to issue the EOI command.
+
+ @retval EFI_SUCCESS The EOI command was issued.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+EFI_STATUS
+EFIAPI
+Interrupt8259EndOfInterrupt (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ )
+{
+ if ((UINT32)Irq > Efi8259Irq15) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (Irq >= Efi8259Irq8) {
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
+ }
+
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Driver Entry point.
+
+ @param[in] ImageHandle ImageHandle of the loaded driver.
+ @param[in] SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCCESS Error installing Legacy 8259 Protocol.
+
+**/
+EFI_STATUS
+EFIAPI
+Install8259 (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_8259_IRQ Irq;
+
+ //
+ // Initialze mask values from PCDs
+ //
+ mLegacyModeMask = PcdGet16 (Pcd8259LegacyModeMask);
+ mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);
+
+ //
+ // Clear all pending interrupt
+ //
+ for (Irq = Efi8259Irq0; Irq <= Efi8259Irq15; Irq++) {
+ Interrupt8259EndOfInterrupt (&mInterrupt8259, Irq);
+ }
+
+ //
+ // Set the 8259 Master base to 0x68 and the 8259 Slave base to 0x70
+ //
+ Status = Interrupt8259SetVectorBase (&mInterrupt8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);
+
+ //
+ // Set all 8259 interrupts to edge triggered and disabled
+ //
+ Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
+
+ //
+ // Install 8259 Protocol onto a new handle
+ //
+ Status = gBS->InstallProtocolInterface (
+ &m8259Handle,
+ &gEfiLegacy8259ProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &mInterrupt8259
+ );
+ return Status;
+}
diff --git a/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni b/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
new file mode 100644
index 0000000000..4db40af797
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
@@ -0,0 +1,22 @@
+// /** @file
+// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
+//
+// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
+//
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol"
+
+#string STR_MODULE_DESCRIPTION #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol."
+
--git a/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni b/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
new file mode 100644
index 0000000000..f3f7d26677
--- /dev/null
+++ b/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Legacy8259 Localized Strings and Content
+//
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// **/
+
+#string STR_PROPERTIES_MODULE_NAME
+#language en-US
+"Legacy 8259 Interrupt Controller DXE Driver"
+
+
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
2019-04-03 7:00 ` [RFC PATCH v1 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg Hao Wu
@ 2019-04-03 12:05 ` Laszlo Ersek
0 siblings, 0 replies; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:05 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> This commit copies the exact 8259InterruptControllerDxe driver from
> PcAtChipsetPkg to OvmfPkg.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/8259InterruptControllerDxe/8259.inf | 52 ++
> OvmfPkg/8259InterruptControllerDxe/8259.h | 226 +++++++
> OvmfPkg/8259InterruptControllerDxe/8259.c | 628 ++++++++++++++++++++
> OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni | 22 +
> OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni | 20 +
> 5 files changed, 948 insertions(+)
>
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> new file mode 100644
> index 0000000000..1d9be675e3
> --- /dev/null
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> @@ -0,0 +1,52 @@
> +## @file
> +# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
> +#
> +# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010005
> + BASE_NAME = Legacy8259
> + MODULE_UNI_FILE = Legacy8259.uni
> + FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
When creating customized copies, we usually like to generate new
FILE_GUIDs at once -- but in this case, I agree that the GUID should
remain unchanged, as ultimately this code copy will amount to a rename /
move.
I also verified this patch with "git show --find-copies-harder".
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Thanks,
Laszlo
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = Install8259
> +
> +[Sources]
> + 8259.c
> + 8259.h
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + IntelFrameworkPkg/IntelFrameworkPkg.dec
> + PcAtChipsetPkg/PcAtChipsetPkg.dec
> +
> +[LibraryClasses]
> + UefiBootServicesTableLib
> + DebugLib
> + UefiDriverEntryPoint
> + IoLib
> + PcdLib
> +
> +[Protocols]
> + gEfiLegacy8259ProtocolGuid ## PRODUCES
> + gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
> +
> +[Pcd]
> + gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
> + gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
> +
> +[Depex]
> + TRUE
> +
> +[UserExtensions.TianoCore."ExtraFiles"]
> + Legacy8259Extra.uni
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
> new file mode 100644
> index 0000000000..0d4c1e8223
> --- /dev/null
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
> @@ -0,0 +1,226 @@
> +/** @file
> + Driver implementing the Tiano Legacy 8259 Protocol
> +
> +Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
> +This program and the accompanying materials
> +are licensed and made available under the terms and conditions of the BSD License
> +which accompanies this distribution. The full text of the license may be found at
> +http://opensource.org/licenses/bsd-license.php.
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _8259_H__
> +#define _8259_H__
> +
> +#include <FrameworkDxe.h>
> +
> +#include <Protocol/Legacy8259.h>
> +#include <Protocol/PciIo.h>
> +
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/BaseLib.h>
> +#include <Library/PcdLib.h>
> +
> +#include <IndustryStandard/Pci.h>
> +
> +// 8259 Hardware definitions
> +
> +#define LEGACY_MODE_BASE_VECTOR_MASTER 0x08
> +#define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70
> +
> +#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68
> +#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70
> +
> +#define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20
> +#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
> +#define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0
> +#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
> +#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0
> +#define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1
> +
> +#define LEGACY_8259_EOI 0x20
> +
> +// Protocol Function Prototypes
> +
> +/**
> + Sets the base address for the 8259 master and slave PICs.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
> + @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
> +
> + @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
> + @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259SetVectorBase (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN UINT8 MasterBase,
> + IN UINT8 SlaveBase
> + );
> +
> +/**
> + Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
> + @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
> +
> + @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
> + @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259GetMask (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + OUT UINT16 *LegacyMask, OPTIONAL
> + OUT UINT16 *LegacyEdgeLevel, OPTIONAL
> + OUT UINT16 *ProtectedMask, OPTIONAL
> + OUT UINT16 *ProtectedEdgeLevel OPTIONAL
> + );
> +
> +/**
> + Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
> + @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
> +
> + @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
> + @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259SetMask (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN UINT16 *LegacyMask, OPTIONAL
> + IN UINT16 *LegacyEdgeLevel, OPTIONAL
> + IN UINT16 *ProtectedMask, OPTIONAL
> + IN UINT16 *ProtectedEdgeLevel OPTIONAL
> + );
> +
> +/**
> + Sets the mode of the PICs.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Mode 16-bit real or 32-bit protected mode.
> + @param[in] Mask The value with which to set the interrupt mask.
> + @param[in] EdgeLevel The value with which to set the edge/level mask.
> +
> + @retval EFI_SUCCESS The mode was set successfully.
> + @retval EFI_INVALID_PARAMETER The mode was not set.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259SetMode (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_MODE Mode,
> + IN UINT16 *Mask, OPTIONAL
> + IN UINT16 *EdgeLevel OPTIONAL
> + );
> +
> +/**
> + Translates the IRQ into a vector.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq IRQ0-IRQ15.
> + @param[out] Vector The vector that is assigned to the IRQ.
> +
> + @retval EFI_SUCCESS The Vector that matches Irq was returned.
> + @retval EFI_INVALID_PARAMETER Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259GetVector (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq,
> + OUT UINT8 *Vector
> + );
> +
> +/**
> + Enables the specified IRQ.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq IRQ0-IRQ15.
> + @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
> +
> + @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
> + @retval EFI_INVALID_PARAMETER The Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259EnableIrq (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq,
> + IN BOOLEAN LevelTriggered
> + );
> +
> +/**
> + Disables the specified IRQ.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq IRQ0-IRQ15.
> +
> + @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
> + @retval EFI_INVALID_PARAMETER The Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259DisableIrq (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq
> + );
> +
> +/**
> + Reads the PCI configuration space to get the interrupt number that is assigned to the card.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] PciHandle PCI function for which to return the vector.
> + @param[out] Vector IRQ number that corresponds to the interrupt line.
> +
> + @retval EFI_SUCCESS The interrupt line value was read successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259GetInterruptLine (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_HANDLE PciHandle,
> + OUT UINT8 *Vector
> + );
> +
> +/**
> + Issues the End of Interrupt (EOI) commands to PICs.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq The interrupt for which to issue the EOI command.
> +
> + @retval EFI_SUCCESS The EOI command was issued.
> + @retval EFI_INVALID_PARAMETER The Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259EndOfInterrupt (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq
> + );
> +
> +#endif
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.c b/OvmfPkg/8259InterruptControllerDxe/8259.c
> new file mode 100644
> index 0000000000..a89e893649
> --- /dev/null
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.c
> @@ -0,0 +1,628 @@
> +/** @file
> + This contains the installation function for the driver.
> +
> +Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +This program and the accompanying materials
> +are licensed and made available under the terms and conditions of the BSD License
> +which accompanies this distribution. The full text of the license may be found at
> +http://opensource.org/licenses/bsd-license.php
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include "8259.h"
> +
> +//
> +// Global for the Legacy 8259 Protocol that is produced by this driver
> +//
> +EFI_LEGACY_8259_PROTOCOL mInterrupt8259 = {
> + Interrupt8259SetVectorBase,
> + Interrupt8259GetMask,
> + Interrupt8259SetMask,
> + Interrupt8259SetMode,
> + Interrupt8259GetVector,
> + Interrupt8259EnableIrq,
> + Interrupt8259DisableIrq,
> + Interrupt8259GetInterruptLine,
> + Interrupt8259EndOfInterrupt
> +};
> +
> +//
> +// Global for the handle that the Legacy 8259 Protocol is installed
> +//
> +EFI_HANDLE m8259Handle = NULL;
> +
> +UINT8 mMasterBase = 0xff;
> +UINT8 mSlaveBase = 0xff;
> +EFI_8259_MODE mMode = Efi8259ProtectedMode;
> +UINT16 mProtectedModeMask = 0xffff;
> +UINT16 mLegacyModeMask;
> +UINT16 mProtectedModeEdgeLevel = 0x0000;
> +UINT16 mLegacyModeEdgeLevel;
> +
> +//
> +// Worker Functions
> +//
> +
> +/**
> + Write to mask and edge/level triggered registers of master and slave PICs.
> +
> + @param[in] Mask low byte for master PIC mask register,
> + high byte for slave PIC mask register.
> + @param[in] EdgeLevel low byte for master PIC edge/level triggered register,
> + high byte for slave PIC edge/level triggered register.
> +
> +**/
> +VOID
> +Interrupt8259WriteMask (
> + IN UINT16 Mask,
> + IN UINT16 EdgeLevel
> + )
> +{
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, (UINT8) Mask);
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, (UINT8) (Mask >> 8));
> + IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER, (UINT8) EdgeLevel);
> + IoWrite8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE, (UINT8) (EdgeLevel >> 8));
> +}
> +
> +/**
> + Read from mask and edge/level triggered registers of master and slave PICs.
> +
> + @param[out] Mask low byte for master PIC mask register,
> + high byte for slave PIC mask register.
> + @param[out] EdgeLevel low byte for master PIC edge/level triggered register,
> + high byte for slave PIC edge/level triggered register.
> +
> +**/
> +VOID
> +Interrupt8259ReadMask (
> + OUT UINT16 *Mask,
> + OUT UINT16 *EdgeLevel
> + )
> +{
> + UINT16 MasterValue;
> + UINT16 SlaveValue;
> +
> + if (Mask != NULL) {
> + MasterValue = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
> + SlaveValue = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
> +
> + *Mask = (UINT16) (MasterValue | (SlaveValue << 8));
> + }
> +
> + if (EdgeLevel != NULL) {
> + MasterValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER);
> + SlaveValue = IoRead8 (LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE);
> +
> + *EdgeLevel = (UINT16) (MasterValue | (SlaveValue << 8));
> + }
> +}
> +
> +//
> +// Legacy 8259 Protocol Interface Functions
> +//
> +
> +/**
> + Sets the base address for the 8259 master and slave PICs.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.
> + @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.
> +
> + @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
> + @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259SetVectorBase (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN UINT8 MasterBase,
> + IN UINT8 SlaveBase
> + )
> +{
> + UINT8 Mask;
> + EFI_TPL OriginalTpl;
> +
> + OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
> + //
> + // Set vector base for slave PIC
> + //
> + if (SlaveBase != mSlaveBase) {
> + mSlaveBase = SlaveBase;
> +
> + //
> + // Initialization sequence is needed for setting vector base.
> + //
> +
> + //
> + // Preserve interrtup mask register before initialization sequence
> + // because it will be cleared during initialization
> + //
> + Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);
> +
> + //
> + // ICW1: cascade mode, ICW4 write required
> + //
> + IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x11);
> +
> + //
> + // ICW2: new vector base (must be multiple of 8)
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, mSlaveBase);
> +
> + //
> + // ICW3: slave indentification code must be 2
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x02);
> +
> + //
> + // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0x01);
> +
> + //
> + // Restore interrupt mask register
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, Mask);
> + }
> +
> + //
> + // Set vector base for master PIC
> + //
> + if (MasterBase != mMasterBase) {
> + mMasterBase = MasterBase;
> +
> + //
> + // Initialization sequence is needed for setting vector base.
> + //
> +
> + //
> + // Preserve interrtup mask register before initialization sequence
> + // because it will be cleared during initialization
> + //
> + Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);
> +
> + //
> + // ICW1: cascade mode, ICW4 write required
> + //
> + IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x11);
> +
> + //
> + // ICW2: new vector base (must be multiple of 8)
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, mMasterBase);
> +
> + //
> + // ICW3: slave PIC is cascaded on IRQ2
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x04);
> +
> + //
> + // ICW4: fully nested mode, non-buffered mode, normal EOI, IA processor
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0x01);
> +
> + //
> + // Restore interrupt mask register
> + //
> + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);
> + }
> +
> + IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
> + IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
> +
> + gBS->RestoreTPL (OriginalTpl);
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
> + @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
> +
> + @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
> + @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259GetMask (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + OUT UINT16 *LegacyMask, OPTIONAL
> + OUT UINT16 *LegacyEdgeLevel, OPTIONAL
> + OUT UINT16 *ProtectedMask, OPTIONAL
> + OUT UINT16 *ProtectedEdgeLevel OPTIONAL
> + )
> +{
> + if (LegacyMask != NULL) {
> + *LegacyMask = mLegacyModeMask;
> + }
> +
> + if (LegacyEdgeLevel != NULL) {
> + *LegacyEdgeLevel = mLegacyModeEdgeLevel;
> + }
> +
> + if (ProtectedMask != NULL) {
> + *ProtectedMask = mProtectedModeMask;
> + }
> +
> + if (ProtectedEdgeLevel != NULL) {
> + *ProtectedEdgeLevel = mProtectedModeEdgeLevel;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.
> + @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.
> + @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.
> +
> + @retval EFI_SUCCESS The 8259 PIC was programmed successfully.
> + @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259SetMask (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN UINT16 *LegacyMask, OPTIONAL
> + IN UINT16 *LegacyEdgeLevel, OPTIONAL
> + IN UINT16 *ProtectedMask, OPTIONAL
> + IN UINT16 *ProtectedEdgeLevel OPTIONAL
> + )
> +{
> + if (LegacyMask != NULL) {
> + mLegacyModeMask = *LegacyMask;
> + }
> +
> + if (LegacyEdgeLevel != NULL) {
> + mLegacyModeEdgeLevel = *LegacyEdgeLevel;
> + }
> +
> + if (ProtectedMask != NULL) {
> + mProtectedModeMask = *ProtectedMask;
> + }
> +
> + if (ProtectedEdgeLevel != NULL) {
> + mProtectedModeEdgeLevel = *ProtectedEdgeLevel;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Sets the mode of the PICs.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Mode 16-bit real or 32-bit protected mode.
> + @param[in] Mask The value with which to set the interrupt mask.
> + @param[in] EdgeLevel The value with which to set the edge/level mask.
> +
> + @retval EFI_SUCCESS The mode was set successfully.
> + @retval EFI_INVALID_PARAMETER The mode was not set.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259SetMode (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_MODE Mode,
> + IN UINT16 *Mask, OPTIONAL
> + IN UINT16 *EdgeLevel OPTIONAL
> + )
> +{
> + if (Mode == mMode) {
> + return EFI_SUCCESS;
> + }
> +
> + if (Mode == Efi8259LegacyMode) {
> + //
> + // In Efi8259ProtectedMode, mask and edge/level trigger registers should
> + // be changed through this protocol, so we can track them in the
> + // corresponding module variables.
> + //
> + Interrupt8259ReadMask (&mProtectedModeMask, &mProtectedModeEdgeLevel);
> +
> + if (Mask != NULL) {
> + //
> + // Update the Mask for the new mode
> + //
> + mLegacyModeMask = *Mask;
> + }
> +
> + if (EdgeLevel != NULL) {
> + //
> + // Update the Edge/Level triggered mask for the new mode
> + //
> + mLegacyModeEdgeLevel = *EdgeLevel;
> + }
> +
> + mMode = Mode;
> +
> + //
> + // Write new legacy mode mask/trigger level
> + //
> + Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);
> +
> + return EFI_SUCCESS;
> + }
> +
> + if (Mode == Efi8259ProtectedMode) {
> + //
> + // Save the legacy mode mask/trigger level
> + //
> + Interrupt8259ReadMask (&mLegacyModeMask, &mLegacyModeEdgeLevel);
> + //
> + // Always force Timer to be enabled after return from 16-bit code.
> + // This always insures that on next entry, timer is counting.
> + //
> + mLegacyModeMask &= 0xFFFE;
> +
> + if (Mask != NULL) {
> + //
> + // Update the Mask for the new mode
> + //
> + mProtectedModeMask = *Mask;
> + }
> +
> + if (EdgeLevel != NULL) {
> + //
> + // Update the Edge/Level triggered mask for the new mode
> + //
> + mProtectedModeEdgeLevel = *EdgeLevel;
> + }
> +
> + mMode = Mode;
> +
> + //
> + // Write new protected mode mask/trigger level
> + //
> + Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
> +
> + return EFI_SUCCESS;
> + }
> +
> + return EFI_INVALID_PARAMETER;
> +}
> +
> +/**
> + Translates the IRQ into a vector.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq IRQ0-IRQ15.
> + @param[out] Vector The vector that is assigned to the IRQ.
> +
> + @retval EFI_SUCCESS The Vector that matches Irq was returned.
> + @retval EFI_INVALID_PARAMETER Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259GetVector (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq,
> + OUT UINT8 *Vector
> + )
> +{
> + if ((UINT32)Irq > Efi8259Irq15) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if (Irq <= Efi8259Irq7) {
> + *Vector = (UINT8) (mMasterBase + Irq);
> + } else {
> + *Vector = (UINT8) (mSlaveBase + (Irq - Efi8259Irq8));
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Enables the specified IRQ.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq IRQ0-IRQ15.
> + @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.
> +
> + @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.
> + @retval EFI_INVALID_PARAMETER The Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259EnableIrq (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq,
> + IN BOOLEAN LevelTriggered
> + )
> +{
> + if ((UINT32)Irq > Efi8259Irq15) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + mProtectedModeMask = (UINT16) (mProtectedModeMask & ~(1 << Irq));
> + if (LevelTriggered) {
> + mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel | (1 << Irq));
> + } else {
> + mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
> + }
> +
> + Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Disables the specified IRQ.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq IRQ0-IRQ15.
> +
> + @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.
> + @retval EFI_INVALID_PARAMETER The Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259DisableIrq (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq
> + )
> +{
> + if ((UINT32)Irq > Efi8259Irq15) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + mProtectedModeMask = (UINT16) (mProtectedModeMask | (1 << Irq));
> +
> + mProtectedModeEdgeLevel = (UINT16) (mProtectedModeEdgeLevel & ~(1 << Irq));
> +
> + Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Reads the PCI configuration space to get the interrupt number that is assigned to the card.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] PciHandle PCI function for which to return the vector.
> + @param[out] Vector IRQ number that corresponds to the interrupt line.
> +
> + @retval EFI_SUCCESS The interrupt line value was read successfully.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259GetInterruptLine (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_HANDLE PciHandle,
> + OUT UINT8 *Vector
> + )
> +{
> + EFI_PCI_IO_PROTOCOL *PciIo;
> + UINT8 InterruptLine;
> + EFI_STATUS Status;
> +
> + Status = gBS->HandleProtocol (
> + PciHandle,
> + &gEfiPciIoProtocolGuid,
> + (VOID **) &PciIo
> + );
> + if (EFI_ERROR (Status)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + PciIo->Pci.Read (
> + PciIo,
> + EfiPciIoWidthUint8,
> + PCI_INT_LINE_OFFSET,
> + 1,
> + &InterruptLine
> + );
> + //
> + // Interrupt line is same location for standard PCI cards, standard
> + // bridge and CardBus bridge.
> + //
> + *Vector = InterruptLine;
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Issues the End of Interrupt (EOI) commands to PICs.
> +
> + @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.
> + @param[in] Irq The interrupt for which to issue the EOI command.
> +
> + @retval EFI_SUCCESS The EOI command was issued.
> + @retval EFI_INVALID_PARAMETER The Irq is not valid.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Interrupt8259EndOfInterrupt (
> + IN EFI_LEGACY_8259_PROTOCOL *This,
> + IN EFI_8259_IRQ Irq
> + )
> +{
> + if ((UINT32)Irq > Efi8259Irq15) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if (Irq >= Efi8259Irq8) {
> + IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
> + }
> +
> + IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Driver Entry point.
> +
> + @param[in] ImageHandle ImageHandle of the loaded driver.
> + @param[in] SystemTable Pointer to the EFI System Table.
> +
> + @retval EFI_SUCCESS One or more of the drivers returned a success code.
> + @retval !EFI_SUCCESS Error installing Legacy 8259 Protocol.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +Install8259 (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> + EFI_8259_IRQ Irq;
> +
> + //
> + // Initialze mask values from PCDs
> + //
> + mLegacyModeMask = PcdGet16 (Pcd8259LegacyModeMask);
> + mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);
> +
> + //
> + // Clear all pending interrupt
> + //
> + for (Irq = Efi8259Irq0; Irq <= Efi8259Irq15; Irq++) {
> + Interrupt8259EndOfInterrupt (&mInterrupt8259, Irq);
> + }
> +
> + //
> + // Set the 8259 Master base to 0x68 and the 8259 Slave base to 0x70
> + //
> + Status = Interrupt8259SetVectorBase (&mInterrupt8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);
> +
> + //
> + // Set all 8259 interrupts to edge triggered and disabled
> + //
> + Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);
> +
> + //
> + // Install 8259 Protocol onto a new handle
> + //
> + Status = gBS->InstallProtocolInterface (
> + &m8259Handle,
> + &gEfiLegacy8259ProtocolGuid,
> + EFI_NATIVE_INTERFACE,
> + &mInterrupt8259
> + );
> + return Status;
> +}
> diff --git a/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni b/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
> new file mode 100644
> index 0000000000..4db40af797
> --- /dev/null
> +++ b/OvmfPkg/8259InterruptControllerDxe/Legacy8259.uni
> @@ -0,0 +1,22 @@
> +// /** @file
> +// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
> +//
> +// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
> +//
> +// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +//
> +// This program and the accompanying materials
> +// are licensed and made available under the terms and conditions of the BSD License
> +// which accompanies this distribution. The full text of the license may be found at
> +// http://opensource.org/licenses/bsd-license.php
> +//
> +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +//
> +// **/
> +
> +
> +#string STR_MODULE_ABSTRACT #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol"
> +
> +#string STR_MODULE_DESCRIPTION #language en-US "8259 Interrupt Controller driver that provides Legacy 8259 protocol."
> +
> diff --git a/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni b/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
> new file mode 100644
> index 0000000000..f3f7d26677
> --- /dev/null
> +++ b/OvmfPkg/8259InterruptControllerDxe/Legacy8259Extra.uni
> @@ -0,0 +1,20 @@
> +// /** @file
> +// Legacy8259 Localized Strings and Content
> +//
> +// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
> +//
> +// This program and the accompanying materials
> +// are licensed and made available under the terms and conditions of the BSD License
> +// which accompanies this distribution. The full text of the license may be found at
> +// http://opensource.org/licenses/bsd-license.php
> +//
> +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +//
> +// **/
> +
> +#string STR_PROPERTIES_MODULE_NAME
> +#language en-US
> +"Legacy 8259 Interrupt Controller DXE Driver"
> +
> +
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [RFC PATCH v1 2/8] OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
2019-04-03 7:00 ` [RFC PATCH v1 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
[not found] ` <945615d3-5d8f-659a-a8c4-7320f108ab88@redhat.com>
2019-04-03 7:00 ` [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file Hao Wu
` (6 subsequent siblings)
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit copies the exact Legacy8259 protocol header file from
IntelFrameworkPkg to OvmfPkg. Also, the protocol GUID definition is
duplicated in the OvmfPkg DEC file.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/OvmfPkg.dec | 3 +-
OvmfPkg/Include/Protocol/Legacy8259.h | 297 ++++++++++++++++++++
2 files changed, 299 insertions(+), 1 deletion(-)
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index e50c6179a2..fb89ebf3ad 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -1,7 +1,7 @@
## @file
# EFI/Framework Open Virtual Machine Firmware (OVMF) platform
#
-# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -89,6 +89,7 @@
gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
+ gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
[PcdsFixedAtBuild]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
diff --git a/OvmfPkg/Include/Protocol/Legacy8259.h b/OvmfPkg/Include/Protocol/Legacy8259.h
new file mode 100644
index 0000000000..3f973f6700
--- /dev/null
+++ b/OvmfPkg/Include/Protocol/Legacy8259.h
@@ -0,0 +1,297 @@
+/** @file
+ This protocol abstracts the 8259 interrupt controller. This includes
+ PCI IRQ routing needed to program the PCI Interrupt Line register.
+
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.97.
+
+**/
+
+#ifndef _EFI_LEGACY_8259_H_
+#define _EFI_LEGACY_8259_H_
+
+
+#define EFI_LEGACY_8259_PROTOCOL_GUID \
+ { \
+ 0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \
+ }
+
+typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;
+
+typedef enum {
+ Efi8259Irq0,
+ Efi8259Irq1,
+ Efi8259Irq2,
+ Efi8259Irq3,
+ Efi8259Irq4,
+ Efi8259Irq5,
+ Efi8259Irq6,
+ Efi8259Irq7,
+ Efi8259Irq8,
+ Efi8259Irq9,
+ Efi8259Irq10,
+ Efi8259Irq11,
+ Efi8259Irq12,
+ Efi8259Irq13,
+ Efi8259Irq14,
+ Efi8259Irq15,
+ Efi8259IrqMax
+} EFI_8259_IRQ;
+
+typedef enum {
+ Efi8259LegacyMode,
+ Efi8259ProtectedMode,
+ Efi8259MaxMode
+} EFI_8259_MODE;
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This The protocol instance pointer.
+ @param MasterBase The base vector for the Master PIC in the 8259 controller.
+ @param SlaveBase The base vector for the Slave PIC in the 8259 controller.
+
+ @retval EFI_SUCCESS The new bases were programmed.
+ @retval EFI_DEVICE_ERROR A device error occured programming the vector bases.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ );
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This The protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+
+ @retval EFI_SUCCESS 8259 status returned.
+ @retval EFI_DEVICE_ERROR Error reading 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_MASK)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+ Also set the edge/level masks.
+
+ @param This The protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
+
+ @retval EFI_SUCCESS 8259 status returned.
+ @retval EFI_DEVICE_ERROR Error writing 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MASK)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ );
+
+/**
+ Set the 8259 mode of operation. The base address for the 8259 is different for
+ legacy and protected mode. The legacy mode requires the master 8259 to have a
+ master base of 0x08 and the slave base of 0x70. The protected mode base locations
+ are not defined. Interrupts must be masked by the caller before this function
+ is called. The interrupt mask from the current mode is saved. The interrupt
+ mask for the new mode is Mask, or if Mask does not exist the previously saved
+ mask is used.
+
+ @param This The protocol instance pointer.
+ @param Mode The mode of operation. i.e. the real mode or protected mode.
+ @param Mask Optional interupt mask for the new mode.
+ @param EdgeLevel Optional trigger mask for the new mode.
+
+ @retval EFI_SUCCESS 8259 programmed.
+ @retval EFI_DEVICE_ERROR Error writing to 8259.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MODE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ );
+
+/**
+ Convert from IRQ to processor interrupt vector number.
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+ @param Vector The processor vector number that matches an Irq.
+
+ @retval EFI_SUCCESS The Vector matching Irq is returned.
+ @retval EFI_INVALID_PARAMETER The Irq not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Enable Irq by unmasking interrupt in 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+ @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.
+
+ @retval EFI_SUCCESS The Irq was enabled on 8259.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ );
+
+/**
+ Disable Irq by masking interrupt in 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+
+ @retval EFI_SUCCESS The Irq was disabled on 8259.
+ @retval EFI_INVALID_PARAMETER The Irq is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ PciHandle represents a PCI config space of a PCI function. Vector
+ represents Interrupt Pin (from PCI config space) and it is the data
+ that is programmed into the Interrupt Line (from the PCI config space)
+ register.
+
+ @param This The protocol instance pointer.
+ @param PciHandle The PCI function to return the vector for.
+ @param Vector The vector for the function it matches.
+
+ @retval EFI_SUCCESS A valid Vector was returned.
+ @retval EFI_INVALID_PARAMETER PciHandle not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ );
+
+/**
+ Send an EOI to 8259
+
+ @param This The protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15.
+
+ @retval EFI_SUCCESS EOI was successfully sent to 8259.
+ @retval EFI_INVALID_PARAMETER The Irq isnot valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the 8259 and APIC hardware control between EFI usage and
+ Compatibility16 usage.
+
+ @param SetVectorBase
+ Sets the vector bases for master and slave PICs.
+
+ @param GetMask
+ Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMask
+ Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMode
+ Sets PIC mode to 16-bit real mode or 32-bit protected mode.
+
+ @param GetVector
+ Gets the base vector assigned to an IRQ.
+
+ @param EnableIrq
+ Enables an IRQ.
+
+ @param DisableIrq
+ Disables an IRQ.
+
+ @param GetInterruptLine
+ Gets an IRQ that is assigned to a PCI device.
+
+ @param EndOfInterrupt
+ Issues the end of interrupt command.
+
+**/
+struct _EFI_LEGACY_8259_PROTOCOL {
+ EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;
+ EFI_LEGACY_8259_GET_MASK GetMask;
+ EFI_LEGACY_8259_SET_MASK SetMask;
+ EFI_LEGACY_8259_SET_MODE SetMode;
+ EFI_LEGACY_8259_GET_VECTOR GetVector;
+ EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;
+ EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;
+ EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;
+ EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;
+};
+
+extern EFI_GUID gEfiLegacy8259ProtocolGuid;
+
+#endif
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
2019-04-03 7:00 ` [RFC PATCH v1 1/8] OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg Hao Wu
2019-04-03 7:00 ` [RFC PATCH v1 2/8] OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:39 ` Laszlo Ersek
2019-04-03 7:00 ` [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF Hao Wu
` (5 subsequent siblings)
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
According to the DEC file in PcAtChipsetPkg, this commit adds the two
8259-driver-related PCDs into the OvmfPkg DEC file.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/OvmfPkg.dec | 26 ++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index fb89ebf3ad..cb838422aa 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -128,6 +128,32 @@
gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
+ ## Pcd8259LegacyModeMask defines the default mask value for platform. This
+ # value is determined.
+ # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
+ # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
+ # UEFI platform.
+ # 2) If platform install CSM and use thunk module:
+ # a) If thunk call provided by CSM binary requires some legacy interrupt
+ # support, the corresponding bit should be opened as 0.
+ # For example, if keyboard interfaces provided CSM binary use legacy
+ # keyboard interrupt in 8259 bit 1, then the value should be set to
+ # 0xFFFC.
+ # b) If all thunk call provied by CSM binary do not require legacy
+ # interrupt support, value should be set to 0xFFFF or 0xFFFE.
+ #
+ # The default value of legacy mode mask could be changed by
+ # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
+ # except some special cases such as when initializing the CSM binary, it
+ # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
+ # original legacy mask value if changing is made for these special case.
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x28
+
+ ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
+ # mode's interrrupt controller.
+ # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x29
+
[PcdsDynamic, PcdsDynamicEx]
gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
2019-04-03 7:00 ` [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file Hao Wu
@ 2019-04-03 12:39 ` Laszlo Ersek
2019-04-04 2:56 ` [edk2] " Wu, Hao A
0 siblings, 1 reply; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:39 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> According to the DEC file in PcAtChipsetPkg, this commit adds the two
> 8259-driver-related PCDs into the OvmfPkg DEC file.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/OvmfPkg.dec | 26 ++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> index fb89ebf3ad..cb838422aa 100644
> --- a/OvmfPkg/OvmfPkg.dec
> +++ b/OvmfPkg/OvmfPkg.dec
> @@ -128,6 +128,32 @@
> gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
>
> + ## Pcd8259LegacyModeMask defines the default mask value for platform. This
> + # value is determined.
> + # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
> + # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
> + # UEFI platform.
> + # 2) If platform install CSM and use thunk module:
> + # a) If thunk call provided by CSM binary requires some legacy interrupt
> + # support, the corresponding bit should be opened as 0.
> + # For example, if keyboard interfaces provided CSM binary use legacy
> + # keyboard interrupt in 8259 bit 1, then the value should be set to
> + # 0xFFFC.
> + # b) If all thunk call provied by CSM binary do not require legacy
> + # interrupt support, value should be set to 0xFFFF or 0xFFFE.
> + #
> + # The default value of legacy mode mask could be changed by
> + # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
> + # except some special cases such as when initializing the CSM binary, it
> + # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
> + # original legacy mask value if changing is made for these special case.
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x28
> +
> + ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
> + # mode's interrrupt controller.
> + # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x29
> +
> [PcdsDynamic, PcdsDynamicEx]
> gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
>
Thank you for wrapping the comments so nicely!
(1) In PcAtChipsetPkg.dec, both PCDs are declared under:
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
but in OvmfPkg, this patch introduces both PCDs under just
[PcdsFixedAtBuild]
I think that's fine for now, but please mention this change in the
commit message.
(2) OVMF's PCD token space seems to have some holes, namely at: 3
decimal, 5 decimal, and 0x17.
Can you introduce the new PCDs with tokens 3 and 5, just to decrease the
fragmentation?
With (1) and (2) addressed:
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Thanks,
Laszlo
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [edk2] [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
2019-04-03 12:39 ` Laszlo Ersek
@ 2019-04-04 2:56 ` Wu, Hao A
0 siblings, 0 replies; 22+ messages in thread
From: Wu, Hao A @ 2019-04-04 2:56 UTC (permalink / raw)
To: Laszlo Ersek, devel@edk2.groups.io; +Cc: Justen, Jordan L, David Woodhouse
> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Wednesday, April 03, 2019 8:39 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Justen, Jordan L; David Woodhouse
> Subject: Re: [edk2] [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-
> related PCDs in OVMF DEC file
>
> On 04/03/19 09:00, Hao Wu wrote:
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
> >
> > According to the DEC file in PcAtChipsetPkg, this commit adds the two
> > 8259-driver-related PCDs into the OvmfPkg DEC file.
> >
> > Cc: Jordan Justen <jordan.l.justen@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: David Woodhouse <dwmw2@infradead.org>
> > Cc: Ray Ni <ray.ni@intel.com>
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> > ---
> > OvmfPkg/OvmfPkg.dec | 26 ++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> > index fb89ebf3ad..cb838422aa 100644
> > --- a/OvmfPkg/OvmfPkg.dec
> > +++ b/OvmfPkg/OvmfPkg.dec
> > @@ -128,6 +128,32 @@
> >
> gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UIN
> T32|0x1a
> >
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UI
> NT32|0x1f
> >
> > + ## Pcd8259LegacyModeMask defines the default mask value for
> platform. This
> > + # value is determined.
> > + # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
> > + # 0xFFFE; Because only clock interrupt is allowed in legacy mode in
> pure
> > + # UEFI platform.
> > + # 2) If platform install CSM and use thunk module:
> > + # a) If thunk call provided by CSM binary requires some legacy
> interrupt
> > + # support, the corresponding bit should be opened as 0.
> > + # For example, if keyboard interfaces provided CSM binary use legacy
> > + # keyboard interrupt in 8259 bit 1, then the value should be set to
> > + # 0xFFFC.
> > + # b) If all thunk call provied by CSM binary do not require legacy
> > + # interrupt support, value should be set to 0xFFFF or 0xFFFE.
> > + #
> > + # The default value of legacy mode mask could be changed by
> > + # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change
> it
> > + # except some special cases such as when initializing the CSM binary, it
> > + # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
> > + # original legacy mask value if changing is made for these special case.
> > +
> gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|
> 0x28
> > +
> > + ## Pcd8259LegacyModeEdgeLevel defines the default edge level for
> legacy
> > + # mode's interrrupt controller.
> > + # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
> > +
> gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UIN
> T16|0x29
> > +
> > [PcdsDynamic, PcdsDynamicEx]
> > gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
> >
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOL
> EAN|0x10
> >
>
> Thank you for wrapping the comments so nicely!
>
>
> (1) In PcAtChipsetPkg.dec, both PCDs are declared under:
>
> [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
>
> but in OvmfPkg, this patch introduces both PCDs under just
>
> [PcdsFixedAtBuild]
>
> I think that's fine for now, but please mention this change in the
> commit message.
Yes, I will address this one.
>
>
> (2) OVMF's PCD token space seems to have some holes, namely at: 3
> decimal, 5 decimal, and 0x17.
>
> Can you introduce the new PCDs with tokens 3 and 5, just to decrease the
> fragmentation?
Sure.
Best Regards,
Hao Wu
>
>
> With (1) and (2) addressed:
>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
>
> Thanks,
> Laszlo
^ permalink raw reply [flat|nested] 22+ messages in thread
* [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
` (2 preceding siblings ...)
2019-04-03 7:00 ` [RFC PATCH v1 3/8] OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:46 ` Laszlo Ersek
2019-04-03 7:00 ` [RFC PATCH v1 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg Hao Wu
` (4 subsequent siblings)
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
Several updates have been made to the
OvmfPkg/8259InterruptControllerDxe driver to make it build under OvmfPkg:
A) Update the driver INF file to consume PCDs defined within OvmfPkg;
B) Remove the unnecessary dependency on the IntelFrameworkPkg header file
'FrameworkDxe.h';
C) Remove the IntelFrameworkPkg & PcAtChipsetPkg DEC files dependency in
the driver INF file.
A new GUID has been updated for the INF file.
Corresponding changes have been made in OVMF DSC files as well in order to
verify the build.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/OvmfPkgIa32.dsc | 2 ++
OvmfPkg/OvmfPkgIa32X64.dsc | 2 ++
OvmfPkg/OvmfPkgX64.dsc | 2 ++
OvmfPkg/8259InterruptControllerDxe/8259.inf | 11 +++++------
OvmfPkg/8259InterruptControllerDxe/8259.h | 4 +---
5 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index f55ab5a3d2..47182f0cad 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -517,6 +517,7 @@
# IRQs 5, 9, 10, 11 are level-triggered
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -669,6 +670,7 @@
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+ OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 5c9bdf034e..d9603a7107 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -523,6 +523,7 @@
# IRQs 5, 9, 10, 11 are level-triggered
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -678,6 +679,7 @@
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+ OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 2943e9e8af..2cc39d54b0 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -522,6 +522,7 @@
# IRQs 5, 9, 10, 11 are level-triggered
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -676,6 +677,7 @@
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+ OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
index 1d9be675e3..c5a1385418 100644
--- a/OvmfPkg/8259InterruptControllerDxe/8259.inf
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
@@ -1,7 +1,7 @@
## @file
# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
#
-# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -16,7 +16,7 @@
INF_VERSION = 0x00010005
BASE_NAME = Legacy8259
MODULE_UNI_FILE = Legacy8259.uni
- FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
+ FILE_GUID = 245CB4DA-8E15-4A1B-87E3-9878FFA07520
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = Install8259
@@ -27,8 +27,7 @@
[Packages]
MdePkg/MdePkg.dec
- IntelFrameworkPkg/IntelFrameworkPkg.dec
- PcAtChipsetPkg/PcAtChipsetPkg.dec
+ OvmfPkg/OvmfPkg.dec
[LibraryClasses]
UefiBootServicesTableLib
@@ -42,8 +41,8 @@
gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
[Pcd]
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
[Depex]
TRUE
diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
index 0d4c1e8223..80a4e23959 100644
--- a/OvmfPkg/8259InterruptControllerDxe/8259.h
+++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
@@ -1,7 +1,7 @@
/** @file
Driver implementing the Tiano Legacy 8259 Protocol
-Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -15,8 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#ifndef _8259_H__
#define _8259_H__
-#include <FrameworkDxe.h>
-
#include <Protocol/Legacy8259.h>
#include <Protocol/PciIo.h>
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
2019-04-03 7:00 ` [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF Hao Wu
@ 2019-04-03 12:46 ` Laszlo Ersek
2019-04-04 3:02 ` [edk2] " Wu, Hao A
0 siblings, 1 reply; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:46 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> Several updates have been made to the
> OvmfPkg/8259InterruptControllerDxe driver to make it build under OvmfPkg:
>
> A) Update the driver INF file to consume PCDs defined within OvmfPkg;
> B) Remove the unnecessary dependency on the IntelFrameworkPkg header file
> 'FrameworkDxe.h';
> C) Remove the IntelFrameworkPkg & PcAtChipsetPkg DEC files dependency in
> the driver INF file.
>
> A new GUID has been updated for the INF file.
>
> Corresponding changes have been made in OVMF DSC files as well in order to
> verify the build.
(1) This patch is really well done, but we need an extra hint here, in
the last paragraph of the commit message, namely that the DSC and FDF
files will get a final update (= removals) later in this series.
With that spelled out:
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Thanks
Laszlo
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/OvmfPkgIa32.dsc | 2 ++
> OvmfPkg/OvmfPkgIa32X64.dsc | 2 ++
> OvmfPkg/OvmfPkgX64.dsc | 2 ++
> OvmfPkg/8259InterruptControllerDxe/8259.inf | 11 +++++------
> OvmfPkg/8259InterruptControllerDxe/8259.h | 4 +---
> 5 files changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index f55ab5a3d2..47182f0cad 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -517,6 +517,7 @@
>
> # IRQs 5, 9, 10, 11 are level-triggered
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> @@ -669,6 +670,7 @@
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> + OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index 5c9bdf034e..d9603a7107 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -523,6 +523,7 @@
>
> # IRQs 5, 9, 10, 11 are level-triggered
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> @@ -678,6 +679,7 @@
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> + OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 2943e9e8af..2cc39d54b0 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -522,6 +522,7 @@
>
> # IRQs 5, 9, 10, 11 are level-triggered
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> @@ -676,6 +677,7 @@
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> + OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> index 1d9be675e3..c5a1385418 100644
> --- a/OvmfPkg/8259InterruptControllerDxe/8259.inf
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> @@ -1,7 +1,7 @@
> ## @file
> # 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
> #
> -# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> # which accompanies this distribution. The full text of the license may be found at
> @@ -16,7 +16,7 @@
> INF_VERSION = 0x00010005
> BASE_NAME = Legacy8259
> MODULE_UNI_FILE = Legacy8259.uni
> - FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
> + FILE_GUID = 245CB4DA-8E15-4A1B-87E3-9878FFA07520
> MODULE_TYPE = DXE_DRIVER
> VERSION_STRING = 1.0
> ENTRY_POINT = Install8259
> @@ -27,8 +27,7 @@
>
> [Packages]
> MdePkg/MdePkg.dec
> - IntelFrameworkPkg/IntelFrameworkPkg.dec
> - PcAtChipsetPkg/PcAtChipsetPkg.dec
> + OvmfPkg/OvmfPkg.dec
>
> [LibraryClasses]
> UefiBootServicesTableLib
> @@ -42,8 +41,8 @@
> gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
>
> [Pcd]
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES
>
> [Depex]
> TRUE
> diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h b/OvmfPkg/8259InterruptControllerDxe/8259.h
> index 0d4c1e8223..80a4e23959 100644
> --- a/OvmfPkg/8259InterruptControllerDxe/8259.h
> +++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
> @@ -1,7 +1,7 @@
> /** @file
> Driver implementing the Tiano Legacy 8259 Protocol
>
> -Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD License
> which accompanies this distribution. The full text of the license may be found at
> @@ -15,8 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> #ifndef _8259_H__
> #define _8259_H__
>
> -#include <FrameworkDxe.h>
> -
> #include <Protocol/Legacy8259.h>
> #include <Protocol/PciIo.h>
>
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [edk2] [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
2019-04-03 12:46 ` Laszlo Ersek
@ 2019-04-04 3:02 ` Wu, Hao A
0 siblings, 0 replies; 22+ messages in thread
From: Wu, Hao A @ 2019-04-04 3:02 UTC (permalink / raw)
To: Laszlo Ersek, devel@edk2.groups.io; +Cc: Justen, Jordan L, David Woodhouse
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Laszlo Ersek
> Sent: Wednesday, April 03, 2019 8:47 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Justen, Jordan L; David Woodhouse
> Subject: Re: [edk2] [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe:
> Update to make it build for OVMF
>
> On 04/03/19 09:00, Hao Wu wrote:
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
> >
> > Several updates have been made to the
> > OvmfPkg/8259InterruptControllerDxe driver to make it build under
> OvmfPkg:
> >
> > A) Update the driver INF file to consume PCDs defined within OvmfPkg;
> > B) Remove the unnecessary dependency on the IntelFrameworkPkg
> header file
> > 'FrameworkDxe.h';
> > C) Remove the IntelFrameworkPkg & PcAtChipsetPkg DEC files
> dependency in
> > the driver INF file.
> >
> > A new GUID has been updated for the INF file.
> >
> > Corresponding changes have been made in OVMF DSC files as well in order
> to
> > verify the build.
>
> (1) This patch is really well done, but we need an extra hint here, in
> the last paragraph of the commit message, namely that the DSC and FDF
> files will get a final update (= removals) later in this series.
Agree. I will update the log message to reflect this.
Best Regards,
Hao Wu
>
> With that spelled out:
>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
>
> Thanks
> Laszlo
>
> >
> > Cc: Jordan Justen <jordan.l.justen@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: David Woodhouse <dwmw2@infradead.org>
> > Cc: Ray Ni <ray.ni@intel.com>
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> > ---
> > OvmfPkg/OvmfPkgIa32.dsc | 2 ++
> > OvmfPkg/OvmfPkgIa32X64.dsc | 2 ++
> > OvmfPkg/OvmfPkgX64.dsc | 2 ++
> > OvmfPkg/8259InterruptControllerDxe/8259.inf | 11 +++++------
> > OvmfPkg/8259InterruptControllerDxe/8259.h | 4 +---
> > 5 files changed, 12 insertions(+), 9 deletions(-)
> >
> > diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> > index f55ab5a3d2..47182f0cad 100644
> > --- a/OvmfPkg/OvmfPkgIa32.dsc
> > +++ b/OvmfPkg/OvmfPkgIa32.dsc
> > @@ -517,6 +517,7 @@
> >
> > # IRQs 5, 9, 10, 11 are level-triggered
> > gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> > + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> >
> > # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> > gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21,
> 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66,
> 0x23, 0x31 }
> > @@ -669,6 +670,7 @@
> >
> > MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> > PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> > + OvmfPkg/8259InterruptControllerDxe/8259.inf
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> > UefiCpuPkg/CpuDxe/CpuDxe.inf
> > PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> > diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc
> b/OvmfPkg/OvmfPkgIa32X64.dsc
> > index 5c9bdf034e..d9603a7107 100644
> > --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> > +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> > @@ -523,6 +523,7 @@
> >
> > # IRQs 5, 9, 10, 11 are level-triggered
> > gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> > + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> >
> > # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> > gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21,
> 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66,
> 0x23, 0x31 }
> > @@ -678,6 +679,7 @@
> >
> > MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> > PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> > + OvmfPkg/8259InterruptControllerDxe/8259.inf
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> > UefiCpuPkg/CpuDxe/CpuDxe.inf
> > PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> > diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> > index 2943e9e8af..2cc39d54b0 100644
> > --- a/OvmfPkg/OvmfPkgX64.dsc
> > +++ b/OvmfPkg/OvmfPkgX64.dsc
> > @@ -522,6 +522,7 @@
> >
> > # IRQs 5, 9, 10, 11 are level-triggered
> > gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> > + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> >
> > # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> > gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21,
> 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66,
> 0x23, 0x31 }
> > @@ -676,6 +677,7 @@
> >
> > MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> > PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> > + OvmfPkg/8259InterruptControllerDxe/8259.inf
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> > UefiCpuPkg/CpuDxe/CpuDxe.inf
> > PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> > diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.inf
> b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> > index 1d9be675e3..c5a1385418 100644
> > --- a/OvmfPkg/8259InterruptControllerDxe/8259.inf
> > +++ b/OvmfPkg/8259InterruptControllerDxe/8259.inf
> > @@ -1,7 +1,7 @@
> > ## @file
> > # 8259 Interrupt Controller driver that provides Legacy 8259 protocol.
> > #
> > -# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> > +# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> > # This program and the accompanying materials
> > # are licensed and made available under the terms and conditions of the
> BSD License
> > # which accompanies this distribution. The full text of the license may be
> found at
> > @@ -16,7 +16,7 @@
> > INF_VERSION = 0x00010005
> > BASE_NAME = Legacy8259
> > MODULE_UNI_FILE = Legacy8259.uni
> > - FILE_GUID = 79CA4208-BBA1-4a9a-8456-E1E66A81484E
> > + FILE_GUID = 245CB4DA-8E15-4A1B-87E3-9878FFA07520
> > MODULE_TYPE = DXE_DRIVER
> > VERSION_STRING = 1.0
> > ENTRY_POINT = Install8259
> > @@ -27,8 +27,7 @@
> >
> > [Packages]
> > MdePkg/MdePkg.dec
> > - IntelFrameworkPkg/IntelFrameworkPkg.dec
> > - PcAtChipsetPkg/PcAtChipsetPkg.dec
> > + OvmfPkg/OvmfPkg.dec
> >
> > [LibraryClasses]
> > UefiBootServicesTableLib
> > @@ -42,8 +41,8 @@
> > gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES
> >
> > [Pcd]
> > - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ##
> CONSUMES
> > - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ##
> CONSUMES
> > + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask ##
> CONSUMES
> > + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ##
> CONSUMES
> >
> > [Depex]
> > TRUE
> > diff --git a/OvmfPkg/8259InterruptControllerDxe/8259.h
> b/OvmfPkg/8259InterruptControllerDxe/8259.h
> > index 0d4c1e8223..80a4e23959 100644
> > --- a/OvmfPkg/8259InterruptControllerDxe/8259.h
> > +++ b/OvmfPkg/8259InterruptControllerDxe/8259.h
> > @@ -1,7 +1,7 @@
> > /** @file
> > Driver implementing the Tiano Legacy 8259 Protocol
> >
> > -Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>
> > +Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> > This program and the accompanying materials
> > are licensed and made available under the terms and conditions of the BSD
> License
> > which accompanies this distribution. The full text of the license may be
> found at
> > @@ -15,8 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF
> ANY KIND, EITHER EXPRESS OR IMPLIED.
> > #ifndef _8259_H__
> > #define _8259_H__
> >
> > -#include <FrameworkDxe.h>
> > -
> > #include <Protocol/Legacy8259.h>
> > #include <Protocol/PciIo.h>
> >
> >
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [RFC PATCH v1 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
` (3 preceding siblings ...)
2019-04-03 7:00 ` [RFC PATCH v1 4/8] OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:48 ` Laszlo Ersek
2019-04-03 7:00 ` [RFC PATCH v1 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg Hao Wu
` (3 subsequent siblings)
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
Several updates have been made to the OvmfPkg/AcpiPlatformDxe driver to
drop its dependency on PcAtChipsetPkg:
A) Consumes the PCD 'Pcd8259LegacyModeEdgeLevel' defined within OvmfPkg;
B) Remove the PcAtChipsetPkg DEC file dependency in the driver INF file.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
index 8440e7b343..24e2c0373f 100644
--- a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
+++ b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -1,7 +1,7 @@
## @file
# OVMF ACPI Platform Driver
#
-# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -42,7 +42,6 @@
MdeModulePkg/MdeModulePkg.dec
OvmfPkg/OvmfPkg.dec
UefiCpuPkg/UefiCpuPkg.dec
- PcAtChipsetPkg/PcAtChipsetPkg.dec
[LibraryClasses]
UefiLib
@@ -72,7 +71,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
+ gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress
[Depex]
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
2019-04-03 7:00 ` [RFC PATCH v1 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg Hao Wu
@ 2019-04-03 12:48 ` Laszlo Ersek
0 siblings, 0 replies; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:48 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> Several updates have been made to the OvmfPkg/AcpiPlatformDxe driver to
> drop its dependency on PcAtChipsetPkg:
>
> A) Consumes the PCD 'Pcd8259LegacyModeEdgeLevel' defined within OvmfPkg;
> B) Remove the PcAtChipsetPkg DEC file dependency in the driver INF file.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
> index 8440e7b343..24e2c0373f 100644
> --- a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
> +++ b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
> @@ -1,7 +1,7 @@
> ## @file
> # OVMF ACPI Platform Driver
> #
> -# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> # which accompanies this distribution. The full text of the license may be found at
> @@ -42,7 +42,6 @@
> MdeModulePkg/MdeModulePkg.dec
> OvmfPkg/OvmfPkg.dec
> UefiCpuPkg/UefiCpuPkg.dec
> - PcAtChipsetPkg/PcAtChipsetPkg.dec
>
> [LibraryClasses]
> UefiLib
> @@ -72,7 +71,7 @@
> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
> gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
> gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
> + gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress
>
> [Depex]
>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [RFC PATCH v1 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
` (4 preceding siblings ...)
2019-04-03 7:00 ` [RFC PATCH v1 5/8] OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:50 ` Laszlo Ersek
2019-04-03 7:00 ` [RFC PATCH v1 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF Hao Wu
` (2 subsequent siblings)
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit copies the exact 8254TimerDxe driver from PcAtChipsetPkg to
OvmfPkg.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/8254TimerDxe/8254Timer.inf | 48 +++
OvmfPkg/8254TimerDxe/Timer.h | 191 +++++++++
OvmfPkg/8254TimerDxe/Timer.c | 407 ++++++++++++++++++++
OvmfPkg/8254TimerDxe/Timer.uni | 22 ++
| 20 +
5 files changed, 688 insertions(+)
diff --git a/OvmfPkg/8254TimerDxe/8254Timer.inf b/OvmfPkg/8254TimerDxe/8254Timer.inf
new file mode 100644
index 0000000000..46cf01de39
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/8254Timer.inf
@@ -0,0 +1,48 @@
+## @file
+# 8254 timer driver that provides Timer Arch protocol.
+#
+# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = Timer
+ MODULE_UNI_FILE = Timer.uni
+ FILE_GUID = f2765dec-6b41-11d5-8e71-00902707b35e
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = TimerDriverInitialize
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ UefiBootServicesTableLib
+ BaseLib
+ DebugLib
+ UefiDriverEntryPoint
+ IoLib
+
+[Sources]
+ Timer.h
+ Timer.c
+
+[Protocols]
+ gEfiCpuArchProtocolGuid ## CONSUMES
+ gEfiLegacy8259ProtocolGuid ## CONSUMES
+ gEfiTimerArchProtocolGuid ## PRODUCES
+
+[Depex]
+ gEfiCpuArchProtocolGuid AND gEfiLegacy8259ProtocolGuid
+[UserExtensions.TianoCore."ExtraFiles"]
+ TimerExtra.uni
diff --git a/OvmfPkg/8254TimerDxe/Timer.h b/OvmfPkg/8254TimerDxe/Timer.h
new file mode 100644
index 0000000000..9d70e3aa19
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/Timer.h
@@ -0,0 +1,191 @@
+/** @file
+ Private data structures
+
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
+
+#ifndef _TIMER_H_
+#define _TIMER_H_
+
+#include <PiDxe.h>
+
+#include <Protocol/Cpu.h>
+#include <Protocol/Legacy8259.h>
+#include <Protocol/Timer.h>
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+
+//
+// The PCAT 8253/8254 has an input clock at 1.193182 MHz and Timer 0 is
+// initialized as a 16 bit free running counter that generates an interrupt(IRQ0)
+// each time the counter rolls over.
+//
+// 65536 counts
+// ---------------- * 1,000,000 uS/S = 54925.4 uS = 549254 * 100 ns
+// 1,193,182 Hz
+//
+
+//
+// The maximum tick duration for 8254 timer
+//
+#define MAX_TIMER_TICK_DURATION 549254
+//
+// The default timer tick duration is set to 10 ms = 100000 100 ns units
+//
+#define DEFAULT_TIMER_TICK_DURATION 100000
+#define TIMER_CONTROL_PORT 0x43
+#define TIMER0_COUNT_PORT 0x40
+
+//
+// Function Prototypes
+//
+/**
+ Initialize the Timer Architectural Protocol driver
+
+ @param ImageHandle ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Timer Architectural Protocol created
+ @retval EFI_OUT_OF_RESOURCES Not enough resources available to initialize driver.
+ @retval EFI_DEVICE_ERROR A device error occurred attempting to initialize the driver.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+;
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+ )
+;
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ )
+;
+
+/**
+
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+;
+
+/**
+
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+ @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ )
+;
+
+#endif
diff --git a/OvmfPkg/8254TimerDxe/Timer.c b/OvmfPkg/8254TimerDxe/Timer.c
new file mode 100644
index 0000000000..60799aadd3
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/Timer.c
@@ -0,0 +1,407 @@
+/** @file
+ Timer Architectural Protocol as defined in the DXE CIS
+
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "Timer.h"
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+EFI_HANDLE mTimerHandle = NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL mTimer = {
+ TimerDriverRegisterHandler,
+ TimerDriverSetTimerPeriod,
+ TimerDriverGetTimerPeriod,
+ TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+//
+// Pointer to the Legacy 8259 Protocol instance
+//
+EFI_LEGACY_8259_PROTOCOL *mLegacy8259;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+EFI_TIMER_NOTIFY mTimerNotifyFunction;
+
+//
+// The current period of the timer interrupt
+//
+volatile UINT64 mTimerPeriod = 0;
+
+//
+// Worker Functions
+//
+/**
+ Sets the counter value for Timer #0 in a legacy 8254 timer.
+
+ @param Count The 16-bit counter value to program into Timer #0 of the legacy 8254 timer.
+**/
+VOID
+SetPitCount (
+ IN UINT16 Count
+ )
+{
+ IoWrite8 (TIMER_CONTROL_PORT, 0x36);
+ IoWrite8 (TIMER0_COUNT_PORT, (UINT8)(Count & 0xff));
+ IoWrite8 (TIMER0_COUNT_PORT, (UINT8)((Count >> 8) & 0xff));
+}
+
+/**
+ 8254 Timer #0 Interrupt Handler.
+
+ @param InterruptType The type of interrupt that occurred
+ @param SystemContext A pointer to the system context when the interrupt occurred
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ EFI_TPL OriginalTPL;
+
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ mLegacy8259->EndOfInterrupt (mLegacy8259, Efi8259Irq0);
+
+ if (mTimerNotifyFunction != NULL) {
+ //
+ // @bug : This does not handle missed timer interrupts
+ //
+ mTimerNotifyFunction (mTimerPeriod);
+ }
+
+ gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+
+ This function registers the handler NotifyFunction so it is called every time
+ the timer interrupt fires. It also passes the amount of time since the last
+ handler call to the NotifyFunction. If NotifyFunction is NULL, then the
+ handler is unregistered. If the handler is registered, then EFI_SUCCESS is
+ returned. If the CPU does not support registering a timer interrupt handler,
+ then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not registered,
+ then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
+ register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+ is returned.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The function to call when a timer interrupt fires. This
+ function executes at TPL_HIGH_LEVEL. The DXE Core will
+ register a handler for the timer interrupt, so it can know
+ how much time has passed. This information is used to
+ signal timer based events. NULL will unregister the handler.
+
+ @retval EFI_SUCCESS The timer handler was registered.
+ @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
+ @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
+ registered.
+ @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+ previously registered.
+ @retval EFI_DEVICE_ERROR The timer handler could not be registered.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+ )
+{
+ //
+ // Check for invalid parameters
+ //
+ if (NotifyFunction == NULL && mTimerNotifyFunction == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (NotifyFunction != NULL && mTimerNotifyFunction != NULL) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ mTimerNotifyFunction = NotifyFunction;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ )
+{
+ UINT64 TimerCount;
+
+ //
+ // The basic clock is 1.19318 MHz or 0.119318 ticks per 100 ns.
+ // TimerPeriod * 0.119318 = 8254 timer divisor. Using integer arithmetic
+ // TimerCount = (TimerPeriod * 119318)/1000000.
+ //
+ // Round up to next highest integer. This guarantees that the timer is
+ // equal to or slightly longer than the requested time.
+ // TimerCount = ((TimerPeriod * 119318) + 500000)/1000000
+ //
+ // Note that a TimerCount of 0 is equivalent to a count of 65,536
+ //
+ // Since TimerCount is limited to 16 bits for IA32, TimerPeriod is limited
+ // to 20 bits.
+ //
+ if (TimerPeriod == 0) {
+ //
+ // Disable timer interrupt for a TimerPeriod of 0
+ //
+ mLegacy8259->DisableIrq (mLegacy8259, Efi8259Irq0);
+ } else {
+
+ //
+ // Convert TimerPeriod into 8254 counts
+ //
+ TimerCount = DivU64x32 (MultU64x32 (119318, (UINT32) TimerPeriod) + 500000, 1000000);
+
+ //
+ // Check for overflow
+ //
+ if (TimerCount >= 65536) {
+ TimerCount = 0;
+ TimerPeriod = MAX_TIMER_TICK_DURATION;
+ }
+ //
+ // Program the 8254 timer with the new count value
+ //
+ SetPitCount ((UINT16) TimerCount);
+
+ //
+ // Enable timer interrupt
+ //
+ mLegacy8259->EnableIrq (mLegacy8259, Efi8259Irq0, FALSE);
+ }
+ //
+ // Save the new timer period
+ //
+ mTimerPeriod = TimerPeriod;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+{
+ if (TimerPeriod == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *TimerPeriod = mTimerPeriod;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+ @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ )
+{
+ EFI_STATUS Status;
+ UINT16 IRQMask;
+ EFI_TPL OriginalTPL;
+
+ //
+ // If the timer interrupt is enabled, then the registered handler will be invoked.
+ //
+ Status = mLegacy8259->GetMask (mLegacy8259, NULL, NULL, &IRQMask, NULL);
+ ASSERT_EFI_ERROR (Status);
+ if ((IRQMask & 0x1) == 0) {
+ //
+ // Invoke the registered handler
+ //
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ if (mTimerNotifyFunction != NULL) {
+ //
+ // @bug : This does not handle missed timer interrupts
+ //
+ mTimerNotifyFunction (mTimerPeriod);
+ }
+
+ gBS->RestoreTPL (OriginalTPL);
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Initialize the Timer Architectural Protocol driver
+
+ @param ImageHandle ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Timer Architectural Protocol created
+ @retval EFI_OUT_OF_RESOURCES Not enough resources available to initialize driver.
+ @retval EFI_DEVICE_ERROR A device error occurred attempting to initialize the driver.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ UINT32 TimerVector;
+
+ //
+ // Initialize the pointer to our notify function.
+ //
+ mTimerNotifyFunction = NULL;
+
+ //
+ // Make sure the Timer Architectural Protocol is not already installed in the system
+ //
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiTimerArchProtocolGuid);
+
+ //
+ // Find the CPU architectural protocol.
+ //
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &mCpu);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Find the Legacy8259 protocol.
+ //
+ Status = gBS->LocateProtocol (&gEfiLegacy8259ProtocolGuid, NULL, (VOID **) &mLegacy8259);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Force the timer to be disabled
+ //
+ Status = TimerDriverSetTimerPeriod (&mTimer, 0);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
+ //
+ TimerVector = 0;
+ Status = mLegacy8259->GetVector (mLegacy8259, Efi8259Irq0, (UINT8 *) &TimerVector);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Install interrupt handler for 8254 Timer #0 (ISA IRQ0)
+ //
+ Status = mCpu->RegisterInterruptHandler (mCpu, TimerVector, TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Force the timer to be enabled at its default period
+ //
+ Status = TimerDriverSetTimerPeriod (&mTimer, DEFAULT_TIMER_TICK_DURATION);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Install the Timer Architectural Protocol onto a new handle
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &mTimerHandle,
+ &gEfiTimerArchProtocolGuid, &mTimer,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
diff --git a/OvmfPkg/8254TimerDxe/Timer.uni b/OvmfPkg/8254TimerDxe/Timer.uni
new file mode 100644
index 0000000000..ae50d06e5f
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/Timer.uni
@@ -0,0 +1,22 @@
+// /** @file
+// 8254 timer driver that provides Timer Arch protocol.
+//
+// 8254 timer driver that provides Timer Arch protocol.
+//
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "8254 timer driver that provides Timer Arch protocol"
+
+#string STR_MODULE_DESCRIPTION #language en-US "8254 timer driver that provides Timer Arch protocol."
+
--git a/OvmfPkg/8254TimerDxe/TimerExtra.uni b/OvmfPkg/8254TimerDxe/TimerExtra.uni
new file mode 100644
index 0000000000..06640d3274
--- /dev/null
+++ b/OvmfPkg/8254TimerDxe/TimerExtra.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Timer Localized Strings and Content
+//
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// **/
+
+#string STR_PROPERTIES_MODULE_NAME
+#language en-US
+"8254 Timer DXE Driver"
+
+
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
2019-04-03 7:00 ` [RFC PATCH v1 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg Hao Wu
@ 2019-04-03 12:50 ` Laszlo Ersek
0 siblings, 0 replies; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:50 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> This commit copies the exact 8254TimerDxe driver from PcAtChipsetPkg to
> OvmfPkg.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/8254TimerDxe/8254Timer.inf | 48 +++
> OvmfPkg/8254TimerDxe/Timer.h | 191 +++++++++
> OvmfPkg/8254TimerDxe/Timer.c | 407 ++++++++++++++++++++
> OvmfPkg/8254TimerDxe/Timer.uni | 22 ++
> OvmfPkg/8254TimerDxe/TimerExtra.uni | 20 +
> 5 files changed, 688 insertions(+)
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [RFC PATCH v1 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
` (5 preceding siblings ...)
2019-04-03 7:00 ` [RFC PATCH v1 6/8] OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:52 ` Laszlo Ersek
2019-04-03 7:00 ` [RFC PATCH v1 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg Hao Wu
2019-04-03 12:10 ` [RFC PATCH v1 0/8] Duplicate 8259/8254 components " Laszlo Ersek
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit will remove the IntelFrameworkPkg DEC file dependency in the
driver INF file.
A new GUID has been updated for the INF file.
Corresponding changes have been made in OVMF DSC files as well in order to
verify the build.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/OvmfPkgIa32.dsc | 1 +
OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
OvmfPkg/OvmfPkgX64.dsc | 1 +
OvmfPkg/8254TimerDxe/8254Timer.inf | 6 +++---
4 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 47182f0cad..d88295f9fd 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -674,6 +674,7 @@
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+ OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index d9603a7107..a83b6f448e 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -683,6 +683,7 @@
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+ OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 2cc39d54b0..ad9816a165 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -681,6 +681,7 @@
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+ OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
diff --git a/OvmfPkg/8254TimerDxe/8254Timer.inf b/OvmfPkg/8254TimerDxe/8254Timer.inf
index 46cf01de39..93bee768ed 100644
--- a/OvmfPkg/8254TimerDxe/8254Timer.inf
+++ b/OvmfPkg/8254TimerDxe/8254Timer.inf
@@ -1,7 +1,7 @@
## @file
# 8254 timer driver that provides Timer Arch protocol.
#
-# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -16,7 +16,7 @@
INF_VERSION = 0x00010005
BASE_NAME = Timer
MODULE_UNI_FILE = Timer.uni
- FILE_GUID = f2765dec-6b41-11d5-8e71-00902707b35e
+ FILE_GUID = C190FE35-44AA-41A1-8AEA-4947BC60E09D
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
@@ -24,7 +24,7 @@
[Packages]
MdePkg/MdePkg.dec
- IntelFrameworkPkg/IntelFrameworkPkg.dec
+ OvmfPkg/OvmfPkg.dec
[LibraryClasses]
UefiBootServicesTableLib
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF
2019-04-03 7:00 ` [RFC PATCH v1 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF Hao Wu
@ 2019-04-03 12:52 ` Laszlo Ersek
0 siblings, 0 replies; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:52 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> This commit will remove the IntelFrameworkPkg DEC file dependency in the
> driver INF file.
>
> A new GUID has been updated for the INF file.
>
> Corresponding changes have been made in OVMF DSC files as well in order to
> verify the build.
(1) Please add the same hint that I asked for under v1 4/8.
With that:
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Thanks
Laszlo
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/OvmfPkgIa32.dsc | 1 +
> OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
> OvmfPkg/OvmfPkgX64.dsc | 1 +
> OvmfPkg/8254TimerDxe/8254Timer.inf | 6 +++---
> 4 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index 47182f0cad..d88295f9fd 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -674,6 +674,7 @@
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> + OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index d9603a7107..a83b6f448e 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -683,6 +683,7 @@
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> + OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 2cc39d54b0..ad9816a165 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -681,6 +681,7 @@
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> + OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> diff --git a/OvmfPkg/8254TimerDxe/8254Timer.inf b/OvmfPkg/8254TimerDxe/8254Timer.inf
> index 46cf01de39..93bee768ed 100644
> --- a/OvmfPkg/8254TimerDxe/8254Timer.inf
> +++ b/OvmfPkg/8254TimerDxe/8254Timer.inf
> @@ -1,7 +1,7 @@
> ## @file
> # 8254 timer driver that provides Timer Arch protocol.
> #
> -# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.<BR>
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> # which accompanies this distribution. The full text of the license may be found at
> @@ -16,7 +16,7 @@
> INF_VERSION = 0x00010005
> BASE_NAME = Timer
> MODULE_UNI_FILE = Timer.uni
> - FILE_GUID = f2765dec-6b41-11d5-8e71-00902707b35e
> + FILE_GUID = C190FE35-44AA-41A1-8AEA-4947BC60E09D
> MODULE_TYPE = DXE_DRIVER
> VERSION_STRING = 1.0
>
> @@ -24,7 +24,7 @@
>
> [Packages]
> MdePkg/MdePkg.dec
> - IntelFrameworkPkg/IntelFrameworkPkg.dec
> + OvmfPkg/OvmfPkg.dec
>
> [LibraryClasses]
> UefiBootServicesTableLib
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [RFC PATCH v1 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
` (6 preceding siblings ...)
2019-04-03 7:00 ` [RFC PATCH v1 7/8] OvmfPkg/8254TimerDxe: Update to make it build for OVMF Hao Wu
@ 2019-04-03 7:00 ` Hao Wu
2019-04-03 12:57 ` Laszlo Ersek
2019-04-03 12:10 ` [RFC PATCH v1 0/8] Duplicate 8259/8254 components " Laszlo Ersek
8 siblings, 1 reply; 22+ messages in thread
From: Hao Wu @ 2019-04-03 7:00 UTC (permalink / raw)
To: edk2-devel
Cc: Hao Wu, Jordan Justen, Laszlo Ersek, Ard Biesheuvel,
David Woodhouse, Ray Ni
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
This commit updates the OVMF DSC/FDF files to consume the copied
8259InterruptControllerDxe and 8254TimerDxe drivers within OvmfPkg.
The unconsumed PCD:
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
is removed from DSC files as well.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Ray Ni <ray.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
OvmfPkg/OvmfPkgIa32.dsc | 3 ---
OvmfPkg/OvmfPkgIa32X64.dsc | 3 ---
OvmfPkg/OvmfPkgX64.dsc | 3 ---
OvmfPkg/OvmfPkgIa32.fdf | 4 ++--
OvmfPkg/OvmfPkgIa32X64.fdf | 4 ++--
OvmfPkg/OvmfPkgX64.fdf | 4 ++--
6 files changed, 6 insertions(+), 15 deletions(-)
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index d88295f9fd..692da9584d 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -516,7 +516,6 @@
!endif
# IRQs 5, 9, 10, 11 are level-triggered
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
@@ -669,11 +668,9 @@
}
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index a83b6f448e..01b2530064 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -522,7 +522,6 @@
!endif
# IRQs 5, 9, 10, 11 are level-triggered
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
@@ -678,11 +677,9 @@
}
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index ad9816a165..444a00c87d 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -521,7 +521,6 @@
!endif
# IRQs 5, 9, 10, 11 are level-triggered
- gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
# Point to the MdeModulePkg/Application/UiApp/UiApp.inf
@@ -676,11 +675,9 @@
}
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
- PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
OvmfPkg/8259InterruptControllerDxe/8259.inf
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
UefiCpuPkg/CpuDxe/CpuDxe.inf
- PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/8254TimerDxe/8254Timer.inf
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf
index 006ea9a415..423984b4b9 100644
--- a/OvmfPkg/OvmfPkgIa32.fdf
+++ b/OvmfPkg/OvmfPkgIa32.fdf
@@ -213,10 +213,10 @@ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+INF OvmfPkg/8259InterruptControllerDxe/8259.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+INF OvmfPkg/8254TimerDxe/8254Timer.inf
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
index 6c40540202..45eb561e3f 100644
--- a/OvmfPkg/OvmfPkgIa32X64.fdf
+++ b/OvmfPkg/OvmfPkgIa32X64.fdf
@@ -214,10 +214,10 @@ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+INF OvmfPkg/8259InterruptControllerDxe/8259.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+INF OvmfPkg/8254TimerDxe/8254Timer.inf
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index 6c40540202..45eb561e3f 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -214,10 +214,10 @@ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+INF OvmfPkg/8259InterruptControllerDxe/8259.inf
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
-INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
+INF OvmfPkg/8254TimerDxe/8254Timer.inf
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
--
2.12.0.windows.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
2019-04-03 7:00 ` [RFC PATCH v1 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg Hao Wu
@ 2019-04-03 12:57 ` Laszlo Ersek
0 siblings, 0 replies; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:57 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1496
>
> This commit updates the OVMF DSC/FDF files to consume the copied
> 8259InterruptControllerDxe and 8254TimerDxe drivers within OvmfPkg.
>
> The unconsumed PCD:
> gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel
>
> is removed from DSC files as well.
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
> OvmfPkg/OvmfPkgIa32.dsc | 3 ---
> OvmfPkg/OvmfPkgIa32X64.dsc | 3 ---
> OvmfPkg/OvmfPkgX64.dsc | 3 ---
> OvmfPkg/OvmfPkgIa32.fdf | 4 ++--
> OvmfPkg/OvmfPkgIa32X64.fdf | 4 ++--
> OvmfPkg/OvmfPkgX64.fdf | 4 ++--
> 6 files changed, 6 insertions(+), 15 deletions(-)
>
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index d88295f9fd..692da9584d 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -516,7 +516,6 @@
> !endif
>
> # IRQs 5, 9, 10, 11 are level-triggered
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> @@ -669,11 +668,9 @@
> }
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> - PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> - PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index a83b6f448e..01b2530064 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -522,7 +522,6 @@
> !endif
>
> # IRQs 5, 9, 10, 11 are level-triggered
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> @@ -678,11 +677,9 @@
> }
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> - PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> - PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index ad9816a165..444a00c87d 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -521,7 +521,6 @@
> !endif
>
> # IRQs 5, 9, 10, 11 are level-triggered
> - gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
> gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0E20
>
> # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
> @@ -676,11 +675,9 @@
> }
>
> MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> - PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> OvmfPkg/8259InterruptControllerDxe/8259.inf
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> UefiCpuPkg/CpuDxe/CpuDxe.inf
> - PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/8254TimerDxe/8254Timer.inf
> OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf
> index 006ea9a415..423984b4b9 100644
> --- a/OvmfPkg/OvmfPkgIa32.fdf
> +++ b/OvmfPkg/OvmfPkgIa32.fdf
> @@ -213,10 +213,10 @@ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> -INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> +INF OvmfPkg/8259InterruptControllerDxe/8259.inf
> INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> INF UefiCpuPkg/CpuDxe/CpuDxe.inf
> -INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> +INF OvmfPkg/8254TimerDxe/8254Timer.inf
> INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
> diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
> index 6c40540202..45eb561e3f 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.fdf
> +++ b/OvmfPkg/OvmfPkgIa32X64.fdf
> @@ -214,10 +214,10 @@ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> -INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> +INF OvmfPkg/8259InterruptControllerDxe/8259.inf
> INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> INF UefiCpuPkg/CpuDxe/CpuDxe.inf
> -INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> +INF OvmfPkg/8254TimerDxe/8254Timer.inf
> INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
> diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
> index 6c40540202..45eb561e3f 100644
> --- a/OvmfPkg/OvmfPkgX64.fdf
> +++ b/OvmfPkg/OvmfPkgX64.fdf
> @@ -214,10 +214,10 @@ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
> -INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
> +INF OvmfPkg/8259InterruptControllerDxe/8259.inf
> INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
> INF UefiCpuPkg/CpuDxe/CpuDxe.inf
> -INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
> +INF OvmfPkg/8254TimerDxe/8254Timer.inf
> INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
> INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
> INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg
2019-04-03 7:00 [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg Hao Wu
` (7 preceding siblings ...)
2019-04-03 7:00 ` [RFC PATCH v1 8/8] OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg Hao Wu
@ 2019-04-03 12:10 ` Laszlo Ersek
2019-04-03 12:13 ` Laszlo Ersek
8 siblings, 1 reply; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:10 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 09:00, Hao Wu wrote:
> This series is also available at:
> https://github.com/hwu25/edk2/tree/ovmf_8259_8254_rfcv1
>
>
> As a sub-task to remove the IntelFrameworkPkg (BZ-1604),
>
> 8259InterruptControllerDxe driver (PcAtChipsetPkg)
> Legacy8259 protocol (IntelFrameworkPkg)
> 8254TimerDxe driver (PcAtChipsetPkg)
>
> will be removed in the near future. Meanwhile, OVMF will still require
> those components (due to CSM support & HPET emulation stability concern).
>
> Thus, the series will copy the below 8259/8254 components:
>
> A. 8259InterruptControllerDxe driver (PcAtChipsetPkg)
> B. Two 8259 related PCDs (PcAtChipsetPkg)
> C. Legacy8259 protocol (IntelFrameworkPkg)
> D. 8254TimerDxe driver (PcAtChipsetPkg)
>
> in the OvmfPkg to address the above-mentioned issue.
>
>
> Tests done for the proposed series:
>
> A. OvmfPkg build pass for VS2015 & GCC5 tool chains;
> B. Boot to Shell with commands:
> qemu-system-x86_64.exe -pflash <SOME_PATH>\OVMF.fd -debugcon file:boot.log -global isa-debugcon.iobase=0x402
> qemu-system-x86_64.exe -machine q35 -pflash <SOME_PATH>\OVMF.fd -debugcon file:boot.log -global isa-debugcon.iobase=0x402
> C. 'stall X' command under Shell to verify the timer is working properly.
>
>
> (Please note that there will be a subsequent patch to remove the 8259/8254
> components after platforms dropping the dependencies on them.)
>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Ray Ni <ray.ni@intel.com>
>
>
> Hao Wu (8):
> OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
> OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg
> OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
> OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
> OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
> OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
> OvmfPkg/8254TimerDxe: Update to make it build for OVMF
> OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
While I'm reviewing the patches individually, let me make some general
comments:
- please don't push the series before April 9th (i.e., before the end of
the file addition/removal freeze due to
<https://bugzilla.tianocore.org/show_bug.cgi?id=1373>)
- if/when you push the series, please make sure that *all* files added
(copied) under OvmfPkg get the new license block format, i.e. the SPDX
license identifier only.
Thanks
Laszlo
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [RFC PATCH v1 0/8] Duplicate 8259/8254 components in OvmfPkg
2019-04-03 12:10 ` [RFC PATCH v1 0/8] Duplicate 8259/8254 components " Laszlo Ersek
@ 2019-04-03 12:13 ` Laszlo Ersek
[not found] ` <563a0d19-fcc9-3a40-c782-1b04704e3b95@redhat.com>
0 siblings, 1 reply; 22+ messages in thread
From: Laszlo Ersek @ 2019-04-03 12:13 UTC (permalink / raw)
To: Hao Wu, edk2-devel; +Cc: Jordan Justen, David Woodhouse
On 04/03/19 14:10, Laszlo Ersek wrote:
> On 04/03/19 09:00, Hao Wu wrote:
>> This series is also available at:
>> https://github.com/hwu25/edk2/tree/ovmf_8259_8254_rfcv1
>>
>>
>> As a sub-task to remove the IntelFrameworkPkg (BZ-1604),
>>
>> 8259InterruptControllerDxe driver (PcAtChipsetPkg)
>> Legacy8259 protocol (IntelFrameworkPkg)
>> 8254TimerDxe driver (PcAtChipsetPkg)
>>
>> will be removed in the near future. Meanwhile, OVMF will still require
>> those components (due to CSM support & HPET emulation stability concern).
>>
>> Thus, the series will copy the below 8259/8254 components:
>>
>> A. 8259InterruptControllerDxe driver (PcAtChipsetPkg)
>> B. Two 8259 related PCDs (PcAtChipsetPkg)
>> C. Legacy8259 protocol (IntelFrameworkPkg)
>> D. 8254TimerDxe driver (PcAtChipsetPkg)
>>
>> in the OvmfPkg to address the above-mentioned issue.
>>
>>
>> Tests done for the proposed series:
>>
>> A. OvmfPkg build pass for VS2015 & GCC5 tool chains;
>> B. Boot to Shell with commands:
>> qemu-system-x86_64.exe -pflash <SOME_PATH>\OVMF.fd -debugcon file:boot.log -global isa-debugcon.iobase=0x402
>> qemu-system-x86_64.exe -machine q35 -pflash <SOME_PATH>\OVMF.fd -debugcon file:boot.log -global isa-debugcon.iobase=0x402
>> C. 'stall X' command under Shell to verify the timer is working properly.
>>
>>
>> (Please note that there will be a subsequent patch to remove the 8259/8254
>> components after platforms dropping the dependencies on them.)
>>
>> Cc: Jordan Justen <jordan.l.justen@intel.com>
>> Cc: Laszlo Ersek <lersek@redhat.com>
>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Cc: David Woodhouse <dwmw2@infradead.org>
>> Cc: Ray Ni <ray.ni@intel.com>
>>
>>
>> Hao Wu (8):
>> OvmfPkg: Copy 8259InterruptControllerDxe driver from PcAtChipsetPkg
>> OvmfPkg: Copy Legacy8259 protocol definitions from IntelFrameworkPkg
>> OvmfPkg/OvmfPkg.dec: Add 8259-related PCDs in OVMF DEC file
>> OvmfPkg/8259InterruptControllerDxe: Update to make it build for OVMF
>> OvmfPkg/AcpiPlatformDxe: Consume the 8259 PCD defined in OvmfPkg
>> OvmfPkg: Copy 8254TimerDxe driver from PcAtChipsetPkg
>> OvmfPkg/8254TimerDxe: Update to make it build for OVMF
>> OvmfPkg: Update DSC/FDF files to consume 8259/8254 drivers in OvmfPkg
>
> While I'm reviewing the patches individually, let me make some general
> comments:
>
> - please don't push the series before April 9th (i.e., before the end of
> the file addition/removal freeze due to
> <https://bugzilla.tianocore.org/show_bug.cgi?id=1373>)
>
> - if/when you push the series, please make sure that *all* files added
> (copied) under OvmfPkg get the new license block format, i.e. the SPDX
> license identifier only.
... in fact, at that time, the license blocks under the *source*
packages (PcAtChipsetPkg and IntelFrameworkPkg) will have been updated,
so you will have to redo the copying steps anyway (and you can verify
those on your end: "git show --find-copies-harder" should show now
modifications as part of the copy operations).
Thanks
Laszlo
^ permalink raw reply [flat|nested] 22+ messages in thread