From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 746AA941604 for ; Thu, 21 Dec 2023 11:18:47 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=cBYKRB9d4VSKIQ5BkNH6rGE1VQigz2U/ZGyVgXkI5T0=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1703157526; v=1; b=ng1G7lSR5XsSe7Fs13QmP/8Oxn0EYvbIbnFZ/L9XgfzHinPN6Dwo4nbkP1eGZUjlbJZVoUS+ jtf7jRF5dotoNNX9D61Nr1pAmsAkc7UnR44mULydFNfYfiswY+NKO5Q3dYwMEkfOyd6cp3AGn/h +uPQES+j3zf4qJqr94OYAdq8= X-Received: by 127.0.0.2 with SMTP id 4NMTYY7687511xeJkSbit7LM; Thu, 21 Dec 2023 03:18:46 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web10.49434.1703157523835632733 for ; Thu, 21 Dec 2023 03:18:45 -0800 X-Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8Cx+ugMH4Rl1WkDAA--.17162S3; Thu, 21 Dec 2023 19:18:37 +0800 (CST) X-Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bx3uQHH4RlAqwDAA--.19431S3; Thu, 21 Dec 2023 19:18:31 +0800 (CST) Message-ID: Date: Thu, 21 Dec 2023 19:18:31 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: =?UTF-8?B?UmU6IOWbnuWkjTog5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIHY0IDA5LzM3XSBNZGVQa2c6IEFkZCBhIG5ldyBsaWJyYXJ5IG5hbWVkIFBlaVNlcnZpY2VzVGFibGVQb2ludGVyTGliS3Mw?= To: gaoliming , devel@edk2.groups.io, 'Michael D Kinney' Cc: 'Zhiguang Liu' , 'Laszlo Ersek' References: <20231212130932.2467028-1-lichao@loongson.cn> <17A017B459AD36A8.31409@groups.io> <00f401da327c$4c735010$e559f030$@byosoft.com.cn> <515091b3-35d9-44b0-befe-a2874f56ba75@loongson.cn> <00a801da33dd$a06ba890$e142f9b0$@byosoft.com.cn> From: "Chao Li" In-Reply-To: <00a801da33dd$a06ba890$e142f9b0$@byosoft.com.cn> X-CM-TRANSID: AQAAf8Bx3uQHH4RlAqwDAA--.19431S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAMCGWDoK4L-wABsY X-Coremail-Antispam: 1Uk129KBj9fXoW3CFWxJF1kKw17Zr48Zw4UJrc_yoW8JF1rWo WkGr4xKw15Xr15C3yUAr97XF1rXF92kFs0qF48K347GFs8tF15J34UA34rW3y7WFWIgF4D A3y5Z3WkGFZxKryxl-sFpf9Il3svdjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrnsAqx4xG67k08I80eVW5JVWrJwAqx4xG62kEwI0EY4vaYxAvb48xMc02 F40E57IF67AEF4xIwI1l5I8CrVAKz4kIr2xC04v26r1j6r4UMc02F40E42I26xC2a48xYx n0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUUb9xYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l 1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0I I2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVWUJVWUCwA2z4x0 Y4vE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84 ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAq jxCEc2xF0cIa020Ex4CE44I27wAqx4xG67k08I80eVW5JVWrJwAqx4xG62kEwI0EY4vaYx Avb48xMc02F40E57IF67AEF4xIwI1l5I8CrVAKz4kIr2xC04v26r1j6r4UMc02F40E42I2 6xC2a48xMcIj6xIIjxv20xvE14v26r106r15McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4I kC6x0Yz7v_Jr0_Gr1lF7xvr2IY64vIr41l7480Y4vEI4kI2Ix0rVAqx4xJMxAIw28IcxkI 7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_JrI_JrWlx2IqxV Cjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY 6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6x AIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY 1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUF6wZDUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lichao@loongson.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: pKNM7UYXGD9hMHT3RsEeNTG3x7686176AA= Content-Type: multipart/alternative; boundary="------------rBF3dAPStDtfb7L3uHCiJDks" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=ng1G7lSR; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --------------rBF3dAPStDtfb7L3uHCiJDks Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Liming, Sorry, I forget to CC you when I submitted the patch that modified the DebugSupport.h, I originally planned to CC you when I submitted V5. My answer: Thanks, Chao On 2023/12/21 15:16, gaoliming wrote: > > Chao: > >  For the changes in MdePkg, I have two comments here. > > 1)DebugSupport.h definition is from UEFI spec. Current definitions > match the latest spec UEFI2.10. And, current definitions follow the > same style to other archs. > I have submit the ECR to USWG(https://mantis.uefi.org/mantis/view.php?id=2431), and the ECR was marked "Added to homework pile" at 12/06/2023 USWG meeting, here is the meeting minutes link: https://members.uefi.org/wg/uswg/mail/thread/9948. The USWG meeting saied may be V2.11 will release 2024, I'm not sure, so the ECR is code first. Can I submit the code and merge the code first, and wait for the V2.11 to be release? If we wait for the V2.11 to be release first, I guss we will probably wait a long time. In fact, RISC-V also modified this file when submitting the virtual-machine code, and the code does not match to the V2.10... So, please help to merge first, please... > 2)CpuLib.h. The patch removes #if defined (MDE_CPU_IA32) || defined > (MDE_CPU_X64), then these APIs are exposed for all archs, but ARM and > RISCV don’t support them. So, I suggest to update it as below. > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) > > è > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined > (MDE_CPU_LOONGARCH64) > Agree, I will fix it in V5. > > Thanks > > Liming > > *发件人:*Chao Li > *发送时间:*2023年12月20日9:21 > *收件人:*gaoliming ; devel@edk2.groups.io; > 'Michael D Kinney' > *抄送:*'Zhiguang Liu' ; 'Laszlo Ersek' > > *主题:*Re: 回复: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library > named PeiServicesTablePointerLibKs0 > > Hi Liming, > > Yes, the code branch is in my private repo, here is the link: > https://github.com/kilaterlee/edk2/tree/push1102 > > Thanks, > Chao > > On 2023/12/19 21:07, gaoliming wrote: > > Chao: > >  Is there a branch or pull request for this patch set? I would > like to check how this new library instance be used. > > Thanks > > Liming > > *发件人:*devel@edk2.groups.io > *代表 *Chao Li > *发送时间:*2023年12月19日 21:01 > *收件人:*devel@edk2.groups.io; Michael D Kinney > ; > Liming Gao > > *抄送:*Zhiguang Liu > ; Laszlo Ersek > > *主题:*Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library > named PeiServicesTablePointerLibKs0 > > Hi Mike and Liming, > > Can you please review this patch? Thank you! > > Thanks, > Chao > > On 2023/12/12 21:11, Chao Li wrote: > > Adding PeiServicesTablePointerLibKs0 for LoongArch64, which > provides > > setting and getting the PEI service table pointer through the > CSR KS0 > > register. > > The idea of this library is derived from > > ArmPkg/Library/PeiServicesTablePointerLib/ > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 > > Cc: Michael D Kinney > > > Cc: Liming Gao > > > Cc: Zhiguang Liu > > > Cc: Laszlo Ersek > > Signed-off-by: Chao Li > > > --- > > .../Library/PeiServicesTablePointerLib.h      |  9 +- > > .../PeiServicesTablePointer.c                 | 87 > +++++++++++++++++++ > > .../PeiServicesTablePointerLibKs0.inf         | 37 ++++++++ > > .../PeiServicesTablePointerLibKs0.uni         | 20 +++++ > > MdePkg/MdePkg.dsc                             |  3 + > > 5 files changed, 152 insertions(+), 4 deletions(-) > > create mode 100644 > MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c > > create mode 100644 > MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf > > create mode 100644 > MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni > > diff --git > a/MdePkg/Include/Library/PeiServicesTablePointerLib.h > b/MdePkg/Include/Library/PeiServicesTablePointerLib.h > > index 61635eff00..f85c38363c 100644 > > --- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h > > +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h > > @@ -52,10 +52,11 @@ SetPeiServicesTablePointer ( > >    immediately preceding the Interrupt Descriptor Table (IDT) > in memory. > >    For X64 CPUs, the PEI Services Table pointer is stored in > the 8 bytes > >    immediately preceding the Interrupt Descriptor Table (IDT) > in memory. > > -  For Itanium and ARM CPUs, a the PEI Services Table Pointer > is stored in > > -  a dedicated CPU register.  This means that there is no > memory storage > > -  associated with storing the PEI Services Table pointer, so > no additional > > -  migration actions are required for Itanium or ARM CPUs. > > +  For Itanium, ARM and LoongArch CPUs, a the PEI Services > Table Pointer > > +  is stored in a dedicated CPU register.  This means that > there is no > > +  memory storage associated with storing the PEI Services > Table pointer, > > +  so no additional migration actions are required for > Itanium, ARM and > > +  LoongArch CPUs. > >  **/ > > VOID > > diff --git > a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c > b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c > > new file mode 100644 > > index 0000000000..2560b232f9 > > --- /dev/null > > +++ > b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c > > @@ -0,0 +1,87 @@ > > +/** @file > > +  PEI Services Table Pointer Library For Reigseter Mechanism. > > + > > +  This library is used for PEIM which does executed from > flash device directly but > > +  executed in memory. > > + > > +  Copyright (c) 2006 - 2010, Intel Corporation. All rights > reserved.
> > +  Copyright (c) 2011 Hewlett-Packard Corporation. All rights > reserved.
> > +  Copyright (c) 2023 Loongson Technology Corporation Limited. > All rights reserved.
> > + > > +  SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > + > > +/** > > +  Caches a pointer PEI Services Table. > > + > > +  Caches the pointer to the PEI Services Table specified by > PeiServicesTablePointer > > +  in a platform specific manner. > > + > > +  If PeiServicesTablePointer is NULL, then ASSERT(). > > + > > +  @param    PeiServicesTablePointer   The address of > PeiServices pointer. > > +**/ > > +VOID > > +EFIAPI > > +SetPeiServicesTablePointer ( > > +  IN CONST EFI_PEI_SERVICES  **PeiServicesTablePointer > > +  ) > > +{ > > +  ASSERT (PeiServicesTablePointer != NULL); > > +  CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer); > > +} > > + > > +/** > > +  Retrieves the cached value of the PEI Services Table pointer. > > + > > +  Returns the cached value of the PEI Services Table pointer > in a CPU specific manner > > +  as specified in the CPU binding section of the Platform > Initialization Pre-EFI > > +  Initialization Core Interface Specification. > > + > > +  If the cached PEI Services Table pointer is NULL, then > ASSERT(). > > + > > +  @return  The pointer to PeiServices. > > + > > +**/ > > +CONST EFI_PEI_SERVICES ** > > +EFIAPI > > +GetPeiServicesTablePointer ( > > +  VOID > > +  ) > > +{ > > +  CONST EFI_PEI_SERVICES  **PeiServices; > > + > > +  PeiServices = (CONST EFI_PEI_SERVICES **)(CsrRead > (LOONGARCH_CSR_KS0)); > > +  ASSERT (PeiServices != NULL); > > +  return PeiServices; > > +} > > + > > +/** > > +  Perform CPU specific actions required to migrate the PEI > Services Table > > +  pointer from temporary RAM to permanent RAM. > > + > > +  For IA32 CPUs, the PEI Services Table pointer is stored in > the 4 bytes > > +  immediately preceding the Interrupt Descriptor Table (IDT) > in memory. > > +  For X64 CPUs, the PEI Services Table pointer is stored in > the 8 bytes > > +  immediately preceding the Interrupt Descriptor Table (IDT) > in memory. > > +  For Itanium, ARM and LoongArch CPUs, a the PEI Services > Table Pointer > > +  is stored in a dedicated CPU register.  This means that > there is no > > +  memory storage associated with storing the PEI Services > Table pointer, > > +  so no additional migration actions are required for > Itanium, ARM and > > +  LoongArch CPUs. > > + > > +**/ > > +VOID > > +EFIAPI > > +MigratePeiServicesTablePointer ( > > +  VOID > > +  ) > > +{ > > +  return; > > +} > > diff --git > a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf > b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf > > new file mode 100644 > > index 0000000000..e8ecd4616d > > --- /dev/null > > +++ > b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf > > @@ -0,0 +1,37 @@ > > +## @file > > +# Instance of PEI Services Table Pointer Library using > register CSR KS0 for the table pointer. > > +# > > +# PEI Services Table Pointer Library implementation that > retrieves a pointer to the > > +# PEI Services Table from a CPU register. Applies to modules > that execute from > > +# read-only memory. > > +# > > +# Copyright (c) 2007 - 2018, Intel Corporation. All rights > reserved.
> > +# Copyright (c) 2011 Hewlett-Packard Corporation. All rights > reserved.
> > +# Copyright (c) 2023 Loongson Technology Corporation Limited. > All rights reserved.
> > +# > > +#  SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +# > > +## > > + > > +[Defines] > > +  INF_VERSION                    = 1.29 > > +  BASE_NAME                      = PeiServicesTablePointerLib > > +  MODULE_UNI_FILE                = > PeiServicesTablePointerLibKs0.uni > > +  FILE_GUID                      = > 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7 > > +  MODULE_TYPE                    = PEIM > > +  VERSION_STRING                 = 1.0 > > +  LIBRARY_CLASS                  = > PeiServicesTablePointerLib|PEIM PEI_CORE SEC > > + > > +# > > +#  VALID_ARCHITECTURES           = LOONGARCH64 > > +# > > + > > +[Sources] > > +  PeiServicesTablePointer.c > > + > > +[Packages] > > +  MdePkg/MdePkg.dec > > + > > +[LibraryClasses] > > +  DebugLib > > diff --git > a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni > b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni > > new file mode 100644 > > index 0000000000..2539448ce5 > > --- /dev/null > > +++ > b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni > > @@ -0,0 +1,20 @@ > > +// /** @file > > +// Instance of PEI Services Table Pointer Library using > register CSR KS0 for the table pointer. > > +// > > +// PEI Services Table Pointer Library implementation that > retrieves a pointer to the > > +// PEI Services Table from a CPU register. Applies to modules > that execute from > > +// read-only memory. > > +// > > +// Copyright (c) 2007 - 2018, Intel Corporation. All rights > reserved.
> > +// Copyright (c) 2011 Hewlett-Packard Corporation. All rights > reserved.
> > +// Copyright (c) 2023 Loongson Technology Corporation > Limited. All rights reserved.
> > +// > > +// SPDX-License-Identifier: BSD-2-Clause-Patent > > +// > > +// **/ > > + > > + > > +#string STR_MODULE_ABSTRACT             #language en-US > "Instance of PEI Services Table Pointer Library using CPU > register for the table pointer" > > + > > +#string STR_MODULE_DESCRIPTION          #language en-US "The > PEI Services Table Pointer Library implementation that > retrieves a pointer to the PEI Services Table from a CPU > register. Applies to modules that execute from read-only memory." > > + > > diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc > > index 3abd1a1e23..109224c527 100644 > > --- a/MdePkg/MdePkg.dsc > > +++ b/MdePkg/MdePkg.dsc > > @@ -200,4 +200,7 @@ > >    > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.inf > >    > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRam.inf > > +[Components.LOONGARCH64] > > +  > MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf > > + > > [BuildOptions] > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112810): https://edk2.groups.io/g/devel/message/112810 Mute This Topic: https://groups.io/mt/103296576/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=- --------------rBF3dAPStDtfb7L3uHCiJDks Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit

Hi Liming,

Sorry, I forget to CC you when I submitted the patch that modified the DebugSupport.h, I originally planned to CC you when I submitted V5.

My answer:


Thanks,
Chao
On 2023/12/21 15:16, gaoliming wrote:

Chao:

 For the changes in MdePkg, I have two comments here.

 

1)      DebugSupport.h definition is from UEFI spec. Current definitions match the latest spec UEFI2.10. And, current definitions follow the same style to other archs.

I have submit the ECR to USWG(https://mantis.uefi.org/mantis/view.php?id=2431), and the ECR was marked "Added to homework pile" at 12/06/2023 USWG meeting, here is the meeting minutes link: https://members.uefi.org/wg/uswg/mail/thread/9948.

The USWG meeting saied may be V2.11 will release 2024, I'm not sure, so the ECR is code first.

Can I submit the code and merge the code first, and wait for the V2.11 to be release? If we wait for the V2.11 to be release first, I guss we will probably wait a long time. In fact, RISC-V also modified this file when submitting the virtual-machine code, and the code does not match to the V2.10...

So, please help to merge first, please...

2)      CpuLib.h. The patch removes #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64), then these APIs are exposed for all archs, but ARM and RISCV don’t support them. So, I suggest to update it as below.  

 

#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)

è

#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (MDE_CPU_LOONGARCH64)

Agree, I will fix it in V5.

 

Thanks

Liming

发件人: Chao Li <lichao@loongson.cn>
发送时间: 2023年12月20日 9:21
收件人: gaoliming <gaoliming@byosoft.com.cn>; devel@edk2.groups.io; 'Michael D Kinney' <michael.d.kinney@intel.com>
抄送: 'Zhiguang Liu' <zhiguang.liu@intel.com>; 'Laszlo Ersek' <lersek@redhat.com>
主题: Re: 回复: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerLibKs0

 

Hi Liming,

Yes, the code branch is in my private repo, here is the link: https://github.com/kilaterlee/edk2/tree/push1102

 

Thanks,
Chao

On 2023/12/19 21:07, gaoliming wrote:

Chao:

 Is there a branch or pull request for this patch set? I would like to check how this new library instance be used.

 

Thanks

Liming

发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Chao Li
发送时间: 2023年12月19日 21:01
收件人: devel@edk2.groups.io; Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>
抄送: Zhiguang Liu <zhiguang.liu@intel.com>; Laszlo Ersek <lersek@redhat.com>
主题: Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerLibKs0

 

Hi Mike and Liming,

Can you please review this patch? Thank you!

 

Thanks,
Chao

On 2023/12/12 21:11, Chao Li wrote:

Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides
setting and getting the PEI service table pointer through the CSR KS0
register.
 
The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/
 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
 
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
 .../Library/PeiServicesTablePointerLib.h      |  9 +-
 .../PeiServicesTablePointer.c                 | 87 +++++++++++++++++++
 .../PeiServicesTablePointerLibKs0.inf         | 37 ++++++++
 .../PeiServicesTablePointerLibKs0.uni         | 20 +++++
 MdePkg/MdePkg.dsc                             |  3 +
 5 files changed, 152 insertions(+), 4 deletions(-)
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
 
diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
index 61635eff00..f85c38363c 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
   For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
-  a dedicated CPU register.  This means that there is no memory storage
-  associated with storing the PEI Services Table pointer, so no additional
-  migration actions are required for Itanium or ARM CPUs.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
 
 **/
 VOID
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
new file mode 100644
index 0000000000..2560b232f9
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
@@ -0,0 +1,87 @@
+/** @file
+  PEI Services Table Pointer Library For Reigseter Mechanism.
+
+  This library is used for PEIM which does executed from flash device directly but
+  executed in memory.
+
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Register/LoongArch64/Csr.h>
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT().
+
+  @param    PeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES  **PeiServicesTablePointer
+  )
+{
+  ASSERT (PeiServicesTablePointer != NULL);
+  CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU specific manner
+  as specified in the CPU binding section of the Platform Initialization Pre-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, then ASSERT().
+
+  @return  The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+  VOID
+  )
+{
+  CONST EFI_PEI_SERVICES  **PeiServices;
+
+  PeiServices = (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0));
+  ASSERT (PeiServices != NULL);
+  return PeiServices;
+}
+
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  return;
+}
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
new file mode 100644
index 0000000000..e8ecd4616d
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PEI Services Table Pointer Library using register CSR KS0 for the table pointer.
+#
+# PEI Services Table Pointer Library implementation that retrieves a pointer to the
+# PEI Services Table from a CPU register. Applies to modules that execute from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    = 1.29
+  BASE_NAME                      = PeiServicesTablePointerLib
+  MODULE_UNI_FILE                = PeiServicesTablePointerLibKs0.uni
+  FILE_GUID                      = 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+  MODULE_TYPE                    = PEIM
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PeiServicesTablePointerLib|PEIM PEI_CORE SEC
+
+#
+#  VALID_ARCHITECTURES           = LOONGARCH64
+#
+
+[Sources]
+  PeiServicesTablePointer.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
new file mode 100644
index 0000000000..2539448ce5
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Instance of PEI Services Table Pointer Library using register CSR KS0 for the table pointer.
+//
+// PEI Services Table Pointer Library implementation that retrieves a pointer to the
+// PEI Services Table from a CPU register. Applies to modules that execute from
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+// Copyright (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT             #language en-US "Instance of PEI Services Table Pointer Library using CPU register for the table pointer"
+
+#string STR_MODULE_DESCRIPTION          #language en-US "The PEI Services Table Pointer Library implementation that retrieves a pointer to the PEI Services Table from a CPU register. Applies to modules that execute from read-only memory."
+
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 3abd1a1e23..109224c527 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -200,4 +200,7 @@
   MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.inf
   MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRam.inf
 
+[Components.LOONGARCH64]
+  MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
+
 [BuildOptions]

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