From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.120]) by mx.groups.io with SMTP id smtpd.web12.2787.1576066877795951876 for ; Wed, 11 Dec 2019 04:21:18 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=VIQ074Lc; spf=pass (domain: redhat.com, ip: 207.211.31.120, mailfrom: philmd@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576066876; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RYY3L3cHHOL7IdGhR34op4xg/XXzT8scVRFTdtHJ5uY=; b=VIQ074LcNVJXAp5y965dfbN7ye2j34SpP270vXkDun1N12i30+hIbhNhw3xTtxav1XN7Cv mnxuOcQsG+cUvvN4jSaCDVDWmQLgn7v0LVbMrMvokPyhozWYtcInWyvLm7bBAlN5S8Z+BX wI1x3V7DVwj2qB8DZXjg4KsKv7yeZDY= Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-63-yOYMzzXuOleN26WG0D7LsQ-1; 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Wed, 11 Dec 2019 04:21:12 -0800 (PST) X-Google-Smtp-Source: APXvYqzky3m/FACqEQtnkS+49vAHZbGteuyGmRLeewxMDH9006IaKXEIVRgCPEcAB+jf8zWP6VxOqw== X-Received: by 2002:a5d:5491:: with SMTP id h17mr3671362wrv.374.1576066872162; Wed, 11 Dec 2019 04:21:12 -0800 (PST) Return-Path: Received: from [10.201.33.164] ([195.166.127.210]) by smtp.gmail.com with ESMTPSA id a127sm2185638wmh.43.2019.12.11.04.21.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Dec 2019 04:21:11 -0800 (PST) Subject: Re: [edk2-platforms][PATCH 1/5] Platform/RPi: Fix overlap of SoC registers and RAM To: Pete Batard , devel@edk2.groups.io Cc: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, andrey.warkentin@gmail.com, samer.el-haj-mahmoud@arm.com References: <20191211112552.15900-1-pete@akeo.ie> <20191211112552.15900-2-pete@akeo.ie> From: =?UTF-8?B?UGhpbGlwcGUgTWF0aGlldS1EYXVkw6k=?= Message-ID: Date: Wed, 11 Dec 2019 13:21:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: <20191211112552.15900-2-pete@akeo.ie> X-MC-Unique: yOYMzzXuOleN26WG0D7LsQ-1 X-Mimecast-Spam-Score: 0 Content-Language: en-US Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit On 12/11/19 12:25 PM, Pete Batard wrote: > From: Ard Biesheuvel > > Having RAM and SoC register regions overlap is problematic for MMIO, > since, at the very least, we don't want these regions to be declared > as cacheable. > > Signed-off-by: Pete Batard > --- > Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 36 +++++++++++++------- > 1 file changed, 23 insertions(+), 13 deletions(-) > > diff --git a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c > index cc761bea1307..781cf78b83d3 100644 > --- a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c > +++ b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c > @@ -60,7 +60,7 @@ ArmPlatformGetVirtualMemoryMap ( > { > UINTN Index = 0; > UINTN GpuIndex; > - INT64 ExtendedMemorySize; > + INT64 SystemMemorySize; > ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > // Early output of the info we got from VideoCore can prove valuable. > @@ -120,21 +120,21 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryInfo[Index].Type = RPI_MEM_RESERVED_REGION; > VirtualMemoryInfo[Index++].Name = L"GPU Reserved"; > > - // Compute the amount of extended RAM available on this platform > - ExtendedMemorySize = SIZE_256MB; > - ExtendedMemorySize <<= (mBoardRevision >> 20) & 0x07; > - ExtendedMemorySize -= SIZE_1GB; > - if (ExtendedMemorySize > 0) { > - VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdExtendedMemoryBase); > - VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > - VirtualMemoryTable[Index].Length = ExtendedMemorySize; > - VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > - VirtualMemoryInfo[Index].Type = RPI_MEM_BASIC_REGION; > - VirtualMemoryInfo[Index++].Name = L"Extended System RAM"; > - } > + // Compute the total RAM size available on this platform > + SystemMemorySize = SIZE_256MB; > + SystemMemorySize <<= (mBoardRevision >> 20) & 0x07; TIL I learn this field is 3 bits (I thought it was 4). > + > + // > + // Ensure that what we declare as System Memory doesn't overlap with the > + // Bcm2836 SoC registers. This can be achieved through a MIN () with the > + // base address since SystemMemoryBase is 0 (we assert if it isn't). Is the later comment "// On the Pi 3 the SoC registers may overlap VideoCore => fix this " still accurate? > + // > + SystemMemorySize = MIN(SystemMemorySize, BCM2836_SOC_REGISTERS); > > // Extended SoC registers (PCIe, genet, ...) > if (BCM2711_SOC_REGISTERS > 0) { > + // Same overlap protection as above for the Bcm2711 SoC registers > + SystemMemorySize = MIN(SystemMemorySize, BCM2711_SOC_REGISTERS); > VirtualMemoryTable[Index].PhysicalBase = BCM2711_SOC_REGISTERS; > VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > VirtualMemoryTable[Index].Length = BCM2711_SOC_REGISTER_LENGTH; > @@ -155,6 +155,16 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryInfo[Index].Type = RPI_MEM_RESERVED_REGION; > VirtualMemoryInfo[Index++].Name = L"SoC Reserved (283x)"; Sigh, the 2711/2838 naming is very confusing. > > + // If we have RAM above the 1 GB mark, declare it > + if (SystemMemorySize - SIZE_1GB > 0) { > + VirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdExtendedMemoryBase); > + VirtualMemoryTable[Index].VirtualBase = VirtualMemoryTable[Index].PhysicalBase; > + VirtualMemoryTable[Index].Length = SystemMemorySize - SIZE_1GB; > + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > + VirtualMemoryInfo[Index].Type = RPI_MEM_BASIC_REGION; > + VirtualMemoryInfo[Index++].Name = L"Extended System RAM"; > + } > + > // End of Table > VirtualMemoryTable[Index].PhysicalBase = 0; > VirtualMemoryTable[Index].VirtualBase = 0; > Reviewed-by: Philippe Mathieu-Daude