From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from hqemgate16.nvidia.com (hqemgate16.nvidia.com [216.228.121.65]) by mx.groups.io with SMTP id smtpd.web12.323.1571160051853710201 for ; Tue, 15 Oct 2019 10:20:51 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nvidia.com header.s=n1 header.b=sCQ3Fha+; spf=pass (domain: nvidia.com, ip: 216.228.121.65, mailfrom: ashishsingha@nvidia.com) Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 15 Oct 2019 10:20:53 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 15 Oct 2019 10:20:51 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 15 Oct 2019 10:20:51 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 15 Oct 2019 17:20:50 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 15 Oct 2019 17:20:50 +0000 Received: from ashishsingha-lnx.nvidia.com (Not Verified[10.28.48.147]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 15 Oct 2019 10:20:51 -0700 From: "Ashish Singhal" To: , , , CC: Ashish Singhal Subject: [PATCH v4 1/2] MdeModulePkg/XhciDxe: Fix Aligned Page Allocation Date: Tue, 15 Oct 2019 11:20:46 -0600 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-NVConfidentiality: public Return-Path: ashishsingha@nvidia.com MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1571160054; bh=+5WXL4U3+ADEctBsQAUVRMfIyZ7wQbk1HxSYWfeCP4A=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=sCQ3Fha+6c4Rx31NF3jeNq2mdb1AM59VyW7uuRvm6M43ooVf8DM7CVN1shuA+fnSJ cfwIPBXSzvE3iC8kQaHXGtlEOsNPZMCSycW8zJgngXFg74ascpR0ZXY1FCSoKfq0wQ TjtQFx6pq8v8v/bPxZzCF3dWlEH5vtwQwUuLUrNNhuZZ45cJiElpxMOzBldPaQLmfE 7qnurGHSU1wri6dFegvDsvPwvHudH+JtPu2wHM9/F2A30PQKge/t7ybY2dnrMhTsS0 FcemWS9rRklRYsQr+Xt3PizPpY7+jozrhlbDOl8ueMCExYc8YQMMANxPrcCE+0mNLx GbR3IOeWucleQ== Content-Type: text/plain While allocating pages aligned at an alignment higher than 4K, allocate memory taking into consideration the padding required for that alignment. The calls to free pages takes care of this already. Signed-off-by: Ashish Singhal --- MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c index fd79988..aa69c47 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c @@ -656,7 +656,7 @@ UsbHcAllocateAlignedPages ( PciIo, AllocateAnyPages, EfiBootServicesData, - Pages, + RealPages, &Memory, 0 ); -- 2.7.4