From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.101.70, mailfrom: jeremy.linton@arm.com) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by groups.io with SMTP; Wed, 17 Apr 2019 09:35:33 -0700 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 10D04A78; Wed, 17 Apr 2019 09:35:33 -0700 (PDT) Received: from [192.168.100.242] (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EF7D13F557; Wed, 17 Apr 2019 09:35:31 -0700 (PDT) Subject: Re: [edk2-devel] [PATCH] Marvell/Armada7k8k: Remove SPCR baud rate setting To: Ard Biesheuvel , edk2-devel-groups-io Cc: Marcin Wojtas , Leif Lindholm , "Kinney, Michael D" References: <20190409003327.3797-1-jeremy.linton@arm.com> From: "Jeremy Linton" Message-ID: Date: Wed, 17 Apr 2019 11:35:02 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Hi, On 4/15/19 2:50 PM, Ard Biesheuvel wrote: > On Mon, 8 Apr 2019 at 17:33, Jeremy Linton wrote: >> >> The mcbin (and likely others) have a nonstandard uart clock. >> This means that the earlycon programming will incorrectly set >> the baud rate if it is specified. The way around this is to tell >> the kernel to continue using the preprogrammed baud rate. This >> is done by setting the baud to 0. >> >> Further, the SPCR and DSDT serial port need to match the port >> address and port access type for the kernel to conclude they >> are the same. >> >> So while ARM_GAS32 is correct for earlycon (it can be used alone >> on the kernel command line) by providing the reg-shift=2 value, >> it also sets the io type to MMIO32, which doesn't match the DSDT >> defined MMIO. This means that the actual console will never appear. >> The obvious fix is to set reg-width=4 in DSDT, but that also changes >> the accesssors to 32-bits (similarly to earlycon) and results in >> console failure. >> > > Given the breakage on the BSDs and Marcin's followup patch, I'd like > to understand why this breaks. > > To me, it seems we are conflating register bit width with minimum > access size. However, as far as I can tell, mmio32 sets both the > register width and access size to 32 bits. So is the reason that it > works for earlycon that we only use it for output? Yes, I went back and looked at the SPCR/earlycon code and that is likely the core problem. It should be passing both the access width and the register size. I will look at tossing a patch in the next couple days. I'm wondering how many of the quirks are in there to work around this deficiency. As far as the mcbin, that appears to be the case, just writing the output shift register at the wrong width (32-bit rather than 8) seems to be ok (per earlycon), but anything beyond that is a problem. > >> So the less obvious fix, is to use the GAS8 specifier. This means >> that earlycon needs to be fully specified as >> earlycon=uart,mmio32,0xf0512000, but has the extremely useful feature >> that the console default works without any user interaction. >> >> If in the future marvell decides to define their own ACPI id for the >> console and upstream a quirk, the ARM_GAS8 portion of this should >> be reverted. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Jeremy Linton >> --- >> Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc b/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc >> index e78bb9036f..06c7af069c 100644 >> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc >> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Spcr.aslc >> @@ -30,11 +30,11 @@ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = { >> { EFI_ACPI_RESERVED_BYTE, >> EFI_ACPI_RESERVED_BYTE, >> EFI_ACPI_RESERVED_BYTE }, // Reserved1[3] >> - ARM_GAS32 (FixedPcdGet64(PcdSerialRegisterBase)), // BaseAddress >> + ARM_GAS8 (FixedPcdGet64(PcdSerialRegisterBase)), // BaseAddress >> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, // InterruptType >> 0, // Irq >> 51, // GlobalSystemInterrupt >> - EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, // BaudRate >> + 0, // Keep Firmware Baud >> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, // Parity >> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, // StopBits >> 0, // FlowControl >> -- >> 2.20.1 >> >> >> ------------ >> Groups.io Links: You receive all messages sent to this group. >> >> View/Reply Online (#38670): https://edk2.groups.io/g/devel/message/38670 >> Mute This Topic: https://groups.io/mt/30980002/1761188 >> Group Owner: devel+owner@edk2.groups.io >> Unsubscribe: https://edk2.groups.io/g/devel/unsub [ard.biesheuvel@linaro.org] >> ------------ >>