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X-Microsoft-Antispam-Message-Info: j2M/P2LTkJMeyRe1yg11ahVvetru86dGsjzkoJYscfGh1KXCIWtGZgsJTG/yRfMBmFEUHnjiz9dPxlq/oqTArws3Sk5jrbutyKD79Pg6nIho0Tqmp+bJLBcFqPaAS3fmcBREmKV110ImsVlSiIoDUH3jxxCQEFfkdVVL0HS5ZuFFUvJbN6ZuA0ckdYByKXcp9bb5DmTfDog3iXypqjswJchiLnnmQMtYwBgV5qPk0MMbnbOqcsUv+T7FZJb7t+aa/LBK6FLF+xoMsg2tWTJ+9L+8q/FoVdTjl4qdM9HQxVgqvRjg+/esmszTNU6ZPyNHQlvj4x0MDiLbVMm8gc/EEIek2Cr63WXn57IWDV+OnodGOu87cruXjXKW12GA+UkwYpCrDshyOCGy8BGUuQPsGWO/tmeuvMaybBzt5ol1aTDlM0qTF8fgSL19Or9hsPWHUDWPFSyl1UoV42VTk2fGiLu7Mb+2lGQBLWkljkov4vQkGpxeGzY5tdmSN5H+MSLET4T3T9e2ayq2Pss7WHl0/Sn5Gm2x8HxbBkTLeTlCnNzQecK57ENR1rm2O8RQLdZzVUlWeDOGpbXKCngLIT//Lg== X-MS-Exchange-AntiSpam-MessageData: o1ZnJb/5d176zn/tV3b8oo05WXzD185Quu5oK26unqh7IAYFYM3bOSzTysf37I0TLNnFgTRINaoT5/ErbVvnNyHac0bZ73vs84HcP/+PNVfjjc2FyHC7L5sfp+QMRrd36E9a+D4mycG1kVYunSXDjw== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: b34ce738-3305-4bc4-50ad-08d7d01a91d3 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2020 17:41:23.2995 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: TQzH179F1Kmx5MSJIcxOZ9vRTuC8EPfsrJgX0YOjkL2KXGE3qdmkv00FxAjV0B5iM4hkyoKhRCNZ4C0QPLcC8A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3915 Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Under SEV-ES, a MSR_PROT intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Add support to construct the required GHCB values to support an MSR_PROT NAE event. Parse the instruction that generated the #VC exception to determine whether it is RDMSR or WRMSR, setting the required register register values in the GHCB and creating the proper SW_EXIT_INFO1 value in the GHCB. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Signed-off-by: Tom Lendacky --- .../X64/ArchAMDSevVcHandler.c | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c index d57444b50719..26de6304a176 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c @@ -294,6 +294,51 @@ UnsupportedExit ( return Status; } +STATIC +UINT64 +MsrExit ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo1, Status; + + ExitInfo1 = 0; + + switch (*(InstructionData->OpCodes + 1)) { + case 0x30: // WRMSR + ExitInfo1 = 1; + Ghcb->SaveArea.Rax = Regs->Rax; + GhcbSetRegValid (Ghcb, GhcbRax); + Ghcb->SaveArea.Rdx = Regs->Rdx; + GhcbSetRegValid (Ghcb, GhcbRdx); + /* Fallthrough */ + case 0x32: // RDMSR + Ghcb->SaveArea.Rcx = Regs->Rcx; + GhcbSetRegValid (Ghcb, GhcbRcx); + break; + default: + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + Status = VmgExit (Ghcb, SvmExitMsr, ExitInfo1, 0); + if (Status) { + return Status; + } + + if (!ExitInfo1) { + if (!GhcbIsRegValid (Ghcb, GhcbRax) || + !GhcbIsRegValid (Ghcb, GhcbRdx)) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + Regs->Rax = Ghcb->SaveArea.Rax; + Regs->Rdx = Ghcb->SaveArea.Rdx; + } + + return 0; +} + #define IOIO_TYPE_STR (1 << 2) #define IOIO_TYPE_IN 1 #define IOIO_TYPE_INS (IOIO_TYPE_IN | IOIO_TYPE_STR) @@ -558,6 +603,10 @@ DoVcCommon ( NaeExit = IoioExit; break; + case SvmExitMsr: + NaeExit = MsrExit; + break; + default: NaeExit = UnsupportedExit; } -- 2.17.1