From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web11.2040.1649819681388236546 for ; Tue, 12 Apr 2022 20:14:41 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=M8EHKcrj; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: bo-changx.ke@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649819681; x=1681355681; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=4GDTfquPGG7wCpQDaW07YgoKAzist9d4iDQMjxM5l9k=; b=M8EHKcrjBtdejYKSW3FW8822FpopArutMsaDKQ5rQxzd7rKeKxaA8eHA 17eax8yY3fJBe4ZfCk5zhIXiTaTxA4/GMPezF0ClRO3WmdqzR2WQo3FWc azxpA+uWsY6HI+y1F3AnDTQBjFlkSOwC1rPc7uEcjXbGPRPkBF4+gqCMw F4ladJjnX6cG8bmYlDsvj4fS8+hEp9kuEyWYFhIqWeuBO6QcndmyYIZof YKTA/DaHCWszbf+G3WSt4mlcjKEdtNeoog7SMUcIK5aGw2Z/SGpWcx2zF BLkDTOleZrwPyPRHAz4e//VG+9qg1jMasH2w23zBaUFkOCccVpYIdnsxT w==; X-IronPort-AV: E=McAfee;i="6400,9594,10315"; a="323003702" X-IronPort-AV: E=Sophos;i="5.90,255,1643702400"; d="scan'208";a="323003702" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2022 20:14:40 -0700 X-IronPort-AV: E=Sophos;i="5.90,255,1643702400"; d="scan'208";a="660758892" Received: from bkex-mobl.gar.corp.intel.com ([10.215.152.23]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Apr 2022 20:14:38 -0700 From: "Bo Chang Ke" To: devel@edk2.groups.io Cc: Zhiguang Liu , Zhichao Gao , Dandan Bi , Star Zeng Subject: [PATCH v2] MdePkg: Update smbiosview type 9 with SMBIOS 3.5 fields Date: Wed, 13 Apr 2022 11:14:19 +0800 Message-Id: X-Mailer: git-send-email 2.32.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3896 update smbiosview type 9 related fileds. Signed-off-by: Bo Chang Ke Cc: Zhiguang Liu Cc: Zhichao Gao Cc: Dandan Bi Cc: Star Zeng --- MdePkg/Include/IndustryStandard/SmBios.h | 49 +++++++++++++++++++++++- 1 file changed, 48 insertions(+), 1 deletion(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h index 2b1567b052..52f2e35ee9 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -1306,6 +1306,11 @@ typedef enum { SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs. SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs. SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card. + SlotTypePCIExpressGen4SFF_8639 = 0x24, ///< U.2 + SlotTypePCIExpressGen5SFF_8639 = 0x25, ///< U.2 + SlotTypeOCPNIC30SmallFormFactor = 0x26, ///< SFF + SlotTypeOCPNIC30LargeFormFactor = 0x27, ///< LFF + SlotTypeOCPNICPriorto30 = 0x28, SlotTypeCXLFlexbus10 = 0x30, SlotTypePC98C20 = 0xA0, SlotTypePC98C24 = 0xA1, @@ -1335,7 +1340,16 @@ typedef enum { SlotTypePciExpressGen4X2 = 0xBA, SlotTypePciExpressGen4X4 = 0xBB, SlotTypePciExpressGen4X8 = 0xBC, - SlotTypePciExpressGen4X16 = 0xBD + SlotTypePciExpressGen4X16 = 0xBD, + SlotTypePCIExpressGen5 = 0xBE, + SlotTypePCIExpressGen5X1 = 0xBF, + SlotTypePCIExpressGen5X2 = 0xC0, + SlotTypePCIExpressGen5X4 = 0xC1, + SlotTypePCIExpressGen5X8 = 0xC2, + SlotTypePCIExpressGen5X16 = 0xC3, + SlotTypePCIExpressGen6andBeyond = 0xC4, + SlotTypeEnterpriseandDatacenter1UE1FormFactorSlot = 0xC5, + SlotTypeEnterpriseandDatacenter3E3FormFactorSlot = 0xC6 } MISC_SLOT_TYPE; /// @@ -1358,6 +1372,39 @@ typedef enum { SlotDataBusWidth32X = 0x0E ///< Or X32 } MISC_SLOT_DATA_BUS_WIDTH; +/// +/// System Slots - Slot Physical Width. +/// +typedef enum { + SlotPhysicalWidthOther = 0x01, + SlotPhysicalWidthUnknown = 0x02, + SlotPhysicalWidth8Bit = 0x03, + SlotPhysicalWidth16Bit = 0x04, + SlotPhysicalWidth32Bit = 0x05, + SlotPhysicalWidth64Bit = 0x06, + SlotPhysicalWidth128Bit = 0x07, + SlotPhysicalWidth1X = 0x08, ///< Or X1 + SlotPhysicalWidth2X = 0x09, ///< Or X2 + SlotPhysicalWidth4X = 0x0A, ///< Or X4 + SlotPhysicalWidth8X = 0x0B, ///< Or X8 + SlotPhysicalWidth12X = 0x0C, ///< Or X12 + SlotPhysicalWidth16X = 0x0D, ///< Or X16 + SlotPhysicalWidth32X = 0x0E ///< Or X32 +} MISC_SLOT_PHYSICAL_WIDTH; + +/// +/// System Slots - Slot Information. +/// +typedef enum { + others = 0x00, + Gen1 = 0x01, + Gen2 = 0x01, + Gen3 = 0x03, + Gen4 = 0x04, + Gen5 = 0x05, + Gen6 = 0x06 +} MISC_SLOT_INFORMATION; + /// /// System Slots - Current Usage. /// -- 2.32.0.windows.1