From: "Gerd Hoffmann" <kraxel@redhat.com>
To: xieyuanh <yuanhao.xie@intel.com>
Cc: devel@edk2.groups.io, Eric Dong <eric.dong@intel.com>,
Ray Ni <ray.ni@intel.com>, Rahul Kumar <rahul1.kumar@intel.com>
Subject: Re: [edk2-devel] [Patch V4] UefiCpuPkg/MpInitLib: Enable execute disable bit.
Date: Mon, 13 Nov 2023 11:54:23 +0100 [thread overview]
Message-ID: <bo6iugtrgspk4yzvttlvvlmxrhtamu4tuhfosfzs22soracvcr@bthqsovmob4j> (raw)
In-Reply-To: <20231113055948.1773-1-yuanhao.xie@intel.com>
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> index 9a6ec5db5c..f29e66a14f 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> @@ -910,9 +910,16 @@ DxeApEntryPoint (
> CPU_MP_DATA *CpuMpData
> )
> {
> - UINTN ProcessorNumber;
> + UINTN ProcessorNumber;
> + MSR_IA32_EFER_REGISTER EferMsr;
>
> GetProcessorNumber (CpuMpData, &ProcessorNumber);
> + if (CpuMpData->EnableExecuteDisableForSwitchContext) {
> + EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
> + EferMsr.Bits.NXE = 1;
> + AsmWriteMsr64 (MSR_IA32_EFER, EferMsr.Uint64);
> + }
It helps reviewers if you document changes from one version to the next.
This code block was moved (compared to v3). Why?
take care,
Gerd
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next prev parent reply other threads:[~2023-11-13 10:54 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-13 5:59 [edk2-devel] [Patch V4] UefiCpuPkg/MpInitLib: Enable execute disable bit Yuanhao Xie
2023-11-13 10:54 ` Gerd Hoffmann [this message]
2023-11-13 11:08 ` Yuanhao Xie
2023-11-13 12:28 ` Gerd Hoffmann
2023-11-13 18:02 ` Laszlo Ersek
2023-11-17 7:01 ` Ni, Ray
2023-11-17 8:38 ` Laszlo Ersek
2023-11-20 4:57 ` Yuanhao Xie
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