From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.7416.1663772098923805014 for ; Wed, 21 Sep 2022 07:54:59 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pierre.gondois@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B66C13D5; Wed, 21 Sep 2022 07:55:04 -0700 (PDT) Received: from [10.57.78.205] (unknown [10.57.78.205]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A3A723F73B; Wed, 21 Sep 2022 07:54:56 -0700 (PDT) Message-ID: Date: Wed, 21 Sep 2022 16:54:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v4 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object To: Jeff Brasen , devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, Alexei.Fedorov@arm.com, nd@arm.com, sami.mujawar@arm.com References: From: "PierreGondois" In-Reply-To: Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit One last thing: On 9/20/22 00:01, Jeff Brasen wrote: > Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects. > This allows to describe CPC information, as described in ACPI 6.4, > s8.4.7.1 "_CPC (Continuous Performance Control)". > > Signed-off-by: Jeff Brasen > --- > .../Include/ArmNameSpaceObjects.h | 60 ++++++--- > DynamicTablesPkg/Include/Library/AmlCpcInfo.h | 124 ++++++++++++++++++ > .../ConfigurationManagerObjectParser.c | 80 +++++++++++ > 3 files changed, 247 insertions(+), 17 deletions(-) > create mode 100644 DynamicTablesPkg/Include/Library/AmlCpcInfo.h > > diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h > index 102e0f96be..ea5bf81070 100644 > --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h > +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h > @@ -14,6 +14,7 @@ > #define ARM_NAMESPACE_OBJECTS_H_ > > #include > +#include > > #pragma pack(1) > > @@ -63,6 +64,7 @@ typedef enum ArmObjectID { > EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info > EArmObjRmr, ///< 40 - Reserved Memory Range Node > EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor > + EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info > EArmObjMax > } EARM_OBJECT_ID; > > @@ -97,99 +99,105 @@ typedef struct CmArmPowerManagementProfileInfo { > */ > typedef struct CmArmGicCInfo { > /// The GIC CPU Interface number. > - UINT32 CPUInterfaceNumber; > + UINT32 CPUInterfaceNumber; > > /** The ACPI Processor UID. This must match the > _UID of the CPU Device object information described > in the DSDT/SSDT for the CPU. > */ > - UINT32 AcpiProcessorUid; > + UINT32 AcpiProcessorUid; > > /** The flags field as described by the GICC structure > in the ACPI Specification. > */ > - UINT32 Flags; > + UINT32 Flags; > > /** The parking protocol version field as described by > the GICC structure in the ACPI Specification. > */ > - UINT32 ParkingProtocolVersion; > + UINT32 ParkingProtocolVersion; > > /** The Performance Interrupt field as described by > the GICC structure in the ACPI Specification. > */ > - UINT32 PerformanceInterruptGsiv; > + UINT32 PerformanceInterruptGsiv; > > /** The CPU Parked address field as described by > the GICC structure in the ACPI Specification. > */ > - UINT64 ParkedAddress; > + UINT64 ParkedAddress; > > /** The base address for the GIC CPU Interface > as described by the GICC structure in the > ACPI Specification. > */ > - UINT64 PhysicalBaseAddress; > + UINT64 PhysicalBaseAddress; > > /** The base address for GICV interface > as described by the GICC structure in the > ACPI Specification. > */ > - UINT64 GICV; > + UINT64 GICV; > > /** The base address for GICH interface > as described by the GICC structure in the > ACPI Specification. > */ > - UINT64 GICH; > + UINT64 GICH; > > /** The GICV maintenance interrupt > as described by the GICC structure in the > ACPI Specification. > */ > - UINT32 VGICMaintenanceInterrupt; > + UINT32 VGICMaintenanceInterrupt; > > /** The base address for GICR interface > as described by the GICC structure in the > ACPI Specification. > */ > - UINT64 GICRBaseAddress; > + UINT64 GICRBaseAddress; > > /** The MPIDR for the CPU > as described by the GICC structure in the > ACPI Specification. > */ > - UINT64 MPIDR; > + UINT64 MPIDR; > > /** The Processor Power Efficiency class > as described by the GICC structure in the > ACPI Specification. > */ > - UINT8 ProcessorPowerEfficiencyClass; > + UINT8 ProcessorPowerEfficiencyClass; > > /** Statistical Profiling Extension buffer overflow GSIV. Zero if > unsupported by this processor. This field was introduced in > ACPI 6.3 (MADT revision 5) and is therefore ignored when > generating MADT revision 4 or lower. > */ > - UINT16 SpeOverflowInterrupt; > + UINT16 SpeOverflowInterrupt; > > /** The proximity domain to which the logical processor belongs. > This field is used to populate the GICC affinity structure > in the SRAT table. > */ > - UINT32 ProximityDomain; > + UINT32 ProximityDomain; > > /** The clock domain to which the logical processor belongs. > This field is used to populate the GICC affinity structure > in the SRAT table. > */ > - UINT32 ClockDomain; > + UINT32 ClockDomain; > > /** The GICC Affinity flags field as described by the GICC Affinity structure > in the SRAT table. > */ > - UINT32 AffinityFlags; > + UINT32 AffinityFlags; > + > + /** Optional field: Reference Token for the Cpc info of this processor. > + Token identifying a CM_ARM_OBJ_REF structure, itself referencing > + CM_ARM_CPC_INFO objects. > + */ > + CM_OBJECT_TOKEN CpcToken; This field should be added to the GicC CmObjectParser. > } CM_ARM_GICC_INFO; > > /** A structure that describes the