From: Laszlo Ersek <lersek@redhat.com>
To: Andrew Fish <afish@apple.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>,
edk2-devel@lists.01.org,
Anthony Perard <anthony.perard@citrix.com>,
Peter Fang <peter.fang@intel.com>
Subject: Re: [PATCH] OvmfPkg/Sec: Clear the Cache Disable flag in the CR0 register
Date: Wed, 20 Feb 2019 10:46:49 +0100 [thread overview]
Message-ID: <c5ca6150-5132-77a2-b2bf-9e6996b27005@redhat.com> (raw)
In-Reply-To: <8426BEC3-E35D-45D2-9632-4C33817D4B36@apple.com>
On 02/19/19 20:51, Andrew Fish wrote:
>
>
>> On Feb 18, 2019, at 5:23 AM, Laszlo Ersek <lersek@redhat.com> wrote:
>>
>> generic comment (applies to all NASM usage I guess):
>>
>> On 02/18/19 11:10, Jordan Justen wrote:
>>
>>> + mov eax, cr0
>>> + and eax, ~(1 << 30)
>>> + mov cr0, eax
>>
>>> + mov rax, cr0
>>> + and eax, ~(1 << 30)
>>> + mov cr0, rax
>>
>> I've read up on the << and ~ operators in the NASM documentation, and I
>> think the above build-time calculations of the masks are well-defined
>> and correct.
>>
>> - bit shifts are always unsigned
>> - given bit position 30, ~(1 << 30) will be a value with 32 bits
>> - bit-neg simply flips bits (one's complement)
>>
>> On the other hand, I find these NASM specifics counter-intuitive. The
>> expression ~(1 << 30) looks like valid C, but in C, it means a quite
>> different thing.
>>
>> I think calculating the mask with "strict dword" somehow (not exactly
>> sure how) would make this more readable; or else the BTR instruction would.
>>
>> Opinions? (Again, pertaining to all NASM usage in edk2.)
>>
>
> Lazlo,
>
> I guess comments, or #defines, are other options?
Good point! They are.
Thanks,
Laszlo
> Thanks,
>
> Andrew Fish
>
>> Thanks
>> Laszlo
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
>
next prev parent reply other threads:[~2019-02-20 9:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-18 10:10 [PATCH] OvmfPkg/Sec: Clear the Cache Disable flag in the CR0 register Jordan Justen
2019-02-18 12:17 ` Laszlo Ersek
2019-02-19 19:45 ` Jordan Justen
[not found] ` <A8BCA9AAD7459841B9233774078C8C06020CEBFF@ORSMSX112.amr.corp.intel.com>
2019-02-20 9:37 ` Laszlo Ersek
2019-02-18 13:23 ` Laszlo Ersek
2019-02-19 19:51 ` Andrew Fish
2019-02-20 9:46 ` Laszlo Ersek [this message]
2019-02-19 19:59 ` Jordan Justen
2019-02-20 9:44 ` Laszlo Ersek
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