From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 11DE8941EF2 for ; Mon, 11 Dec 2023 23:37:53 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=aGUXoHlpCcd+E9OSQ3BMTqabtDE75gH0ndh49APZxBk=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Language; s=20140610; t=1702337872; v=1; b=UkSvrdI6PpykzCXyxDR9NNHL3P+bnhzRjfqS6S59q3JyaiUIK/aRk+1hPSoMKNyfL0O/5WfY fRtciaM6w6m7R33TGDxYvrVascFNrX6j7P/Qh3JbM3CjY9DYVNv4TTBzuZWj6jInRV4qfMpH5Z2 nwo98S9kINwdH/gnAPpxH4+Y= X-Received: by 127.0.0.2 with SMTP id d4M2YY7687511xzjPZ4lha7U; Mon, 11 Dec 2023 15:37:52 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.6688.1702337871570424971 for ; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 5hImNmamunlBuzc9RR8IeBJyx7686176AA= Content-Type: multipart/mixed; boundary="------------RAM0kYbVlv7HAaR3FbeldGPF" Content-Language: en-US X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=UkSvrdI6; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --------------RAM0kYbVlv7HAaR3FbeldGPF Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On 12/8/23 13:04, Gerd Hoffmann wrote: > On Thu, Dec 07, 2023 at 05:16:10PM +0100, Ard Biesheuvel wrote: >> Hi Gerd, >> >> On Thu, 7 Dec 2023 at 10:44, Gerd Hoffmann wrote: >>> >>> Extend the ValidateFvHeader function, additionally to the header checks >>> walk over the list of variables and sanity check them. >>> >>> In case we find inconsistencies indicating variable store corruption >>> return EFI_NOT_FOUND so the variable store will be re-initialized. >>> >>> Signed-off-by: Gerd Hoffmann >> >> This seems like a good idea to me, and the change looks generally >> fine, except for one nit below: >=20 >>> + case VAR_HEADER_VALID_ONLY: >>> + VarState =3D "header-ok"; >>> + VarName =3D L""; >>> + break; >>> + case VAR_ADDED: >>> + VarState =3D "ok"; >>> + break; >>> + case VAR_ADDED &VAR_IN_DELETED_TRANSITION: >> >> This looks odd, so please add a comment explaining why these constants >> are constructed this way. >=20 > The VAR_HEADER_VALID_ONLY and VAR_ADDED states are applied using an > assignment, i.e. "State =3D VAR_...". >=20 > The other two are used to clear bits, i.e. "State &=3D VAR_...". >=20 > So the usual livecycle for the State field is: >=20 > (1) 0x7f (VAR_HEADER_VALID_ONLY) > (2) 0x3f (VAR_ADDED) > (3) 0x3e (VAR_ADDED & VAR_IN_DELETED_TRANSITION) > (4) 0x3c (VAR_ADDED & VAR_IN_DELETED_TRANSITION & VAR_DELETED) >=20 > Seems it can also happen that variable entries jump directly from (2) to > (4), resulting in 0x3d (VAR_ADDED & VAR_DELETED) being an possible > alternative value for (4). >=20 > I'm not fully sure what happens to VAR_HEADER_VALID_ONLY entries, i.e. > whenever they go through the (3) + (4) deletion cycles too or whenever > they are garbage-collected in some other way. I suspect the latter, > given that the reclaim logic in the variable driver looks at the > variable names, but VAR_HEADER_VALID_ONLY entries don't have a valid > variable name. >=20 >=20 > BTW: Is there any good documentation on the design of the variable > driver and the fault tolerant flash writes? Is the variable flash > supposed to be in a consistent state at any given time, even if > interrupted in the middle of some update operation? I have two references: (1) A Tour Beyond BIOS: Implementing UEFI Authenticated Variables in SMM with EDKII Part III - Variable https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-white-pape= rs https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_B= eyond_BIOS_Implementing_UEFI_Authenticated_Variables_in_SMM_with_EDKII_V2.p= df It discusses Fault Tolerant Write too. And yes, in theory, FTW is supposed = to protect against power loss at any particular stage. (2) Some messages from 2013-2014, when the list was still on sourceforge.ne= t. I think the public archives from that time are all lost, but I'm attachi= ng the one relevant message I could find locally. >=20 > The qemu flash emulation is a bit sloppy, specifically block writes can > be half-completed when a reset happens in the middle of the operation. > Which maybe is the root cause for varstore corruption. >=20 > On the other hand the edk2 flash code does not look like it carefully > chooses blocks when updating flash, so I'm not sure it actually depends > on atomic block updates to ensure consistency. Can't comment on these, alas. Laszlo -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112341): https://edk2.groups.io/g/devel/message/112341 Mute This Topic: https://groups.io/mt/103031342/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/19134562= 12/xyzzy [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --------------RAM0kYbVlv7HAaR3FbeldGPF Content-Transfer-Encoding: 8bit content-type: message/rfc822; name="[edk2] Firmware Volume Block and Fault Tolerant Write question..eml" content-disposition: attachment; filename="[edk2] Firmware Volume Block and Fault Tolerant Write question..eml" Message-ID: <5355073E.90406@redhat.com> Date: Mon, 21 Apr 2014 13:55:42 +0200 From: Laszlo Ersek User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Garrett.Kirkendall@amd.com CC: edk2-devel@lists.sourceforge.net Subject: Re: [edk2] Firmware Volume Block and Fault Tolerant Write question. References: In-Reply-To: Content-Type: multipart/mixed; boundary="------------060409090906030104080306" This is a multi-part message in MIME format. --------------060409090906030104080306 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit On 04/18/14 21:32, Kirkendall, Garrett wrote: > Is there any good documentation for how the Fault Tolerant Write is > supposed to work? > > I understand that NV storage, FTW working space and FTW spare space are > supposed to be in the same Firmware Volume. > > I’m having trouble deciphering how big the FTW working and spare areas > should be in relation to the NV storage space. > > Also, in a bunch of places, it looks like the code was written such that > the working space must fit within one block size. What happens if need > space spanning multiple blocks? Below are parts from two functions that > end in an ASSERT because only one block gets read and returns an error > when the requested FVB->Read input size is larger than one block of data. If it's any help, here's a diagram I derived last December, while I was hunting down : On 12/17/13 07:16, Laszlo Ersek wrote: > During reclaim, the following data movements take place (I'm skipping > the erasures and the in-memory buffer manipulations): > > +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ L: event log > LIVE | varstore |L|W| W: working block > +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > SPARE | | > +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ > > (1) copy LIVE to MyBuffer > (2) copy SPARE to SpareBuffer > (3) copy MyBuffer to SPARE > (4) copy SPARE to Buffer > (5) copy Buffer to LIVE > (6) copy SpareBuffer to SPARE (MyBuffer, SpareBuffer, and Buffer are temporary memory buffers.) In OVMF, the block size is 4K. The varstore is 14 blocks (56K), plus we got one block (4K) for the event log and one block (4K) for the working block. In total, 64K in the live half. The spare half is the same size, giving 128K total for the firmware volume. I'm also attaching the debug patch I wrote at that time for the FTW and auth variable services, plus its output (which I annotated during analysis) that helped me understand what was happening. Maybe you can reuse something from them. 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FvbGetVolumeAttributes: exit @ 320, Status=Success, Attributes=0x4FEFF FvbProtocolGetAttributes: exit @ 704, Status=Success FvbProtocolGetPhysicalAddress: enter FvbGetPhysicalAddress: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success FvbGetPhysicalAddress: exit @ 275, Status=Success, Address=0xFFE00000 FvbProtocolGetPhysicalAddress: exit @ 620, Status=Success FvbProtocolGetAttributes: enter FvbGetVolumeAttributes: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success FvbGetVolumeAttributes: exit @ 320, Status=Success, Attributes=0x4FEFF FvbProtocolGetAttributes: exit @ 704, Status=Success FvbProtocolGetPhysicalAddress: enter FvbGetPhysicalAddress: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success FvbGetPhysicalAddress: exit @ 275, Status=Success, Address=0xFFE00000 FvbProtocolGetPhysicalAddress: exit @ 620, Status=Success FvbProtocolGetPhysicalAddress: enter FvbGetPhysicalAddress: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success FvbGetPhysicalAddress: exit @ 275, Status=Success, Address=0xFFE00000 FvbProtocolGetPhysicalAddress: exit @ 620, Status=Success FtwWrite: enter, Lba=0x0 Offset=0x48 Length=0xDFB8 PrivateData=0 FvBlockHandle=9F58E798 Buffer=9F7BE060 WorkSpaceRefresh: enter FvbProtocolRead: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9EBEF0E0 QemuFlashRead: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9EBEF0E0 QemuFlashPtr: enter, Lba=0xF Offset=0x0 QemuFlashPtr: exit, Ret=FFE0F000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FtwGetLastWriteHeader: enter, FtwWorkSpaceSize=0x1000 FtwGetLastWriteHeader: exit @ 881, Status=Success Ftw: Remaining work space size - 590 FtwGetLastWriteRecord: enter FtwGetLastWriteRecord: exit @ 924, Status=Success WorkSpaceRefresh: exit 6 IsErasedFlashBuffer: enter, Buffer=9EBEFB50 BufferSize=0x28 IsErasedFlashBuffer: exit, IsEmpty=1 FtwAllocate: enter, CallerId=FE5CEA76-4F72-49E8-986F-2CD899DFFE5D, PrivateDataSize=0x0, NumberOfWrites=0x1 WorkSpaceRefresh: enter FvbProtocolRead: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9EBEF0E0 QemuFlashRead: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9EBEF0E0 QemuFlashPtr: enter, Lba=0xF Offset=0x0 QemuFlashPtr: exit, Ret=FFE0F000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FtwGetLastWriteHeader: enter, FtwWorkSpaceSize=0x1000 FtwGetLastWriteHeader: exit @ 881, Status=Success Ftw: Remaining work space size - 590 FtwGetLastWriteRecord: enter FtwGetLastWriteRecord: exit @ 924, Status=Success WorkSpaceRefresh: exit 6 FvbProtocolWrite: enter, Lba=0xF Offset=0xA70 NumBytes=0x28 Buffer=9EBEFB50 QemuFlashWrite: enter, Lba=0xF Offset=0xA70 NumBytes=0x28 Buffer=9EBEFB50 QemuFlashPtr: enter, Lba=0xF Offset=0xA70 QemuFlashPtr: exit, Ret=FFE0FA70 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x28 FtwUpdateFvState: enter, Lba=0xF Offset=0xA70 NewBit=2 FvbProtocolRead: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852647 QemuFlashRead: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852647 QemuFlashPtr: enter, Lba=0xF Offset=0xA70 QemuFlashPtr: exit, Ret=FFE0FA70 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852647 QemuFlashWrite: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852647 QemuFlashPtr: enter, Lba=0xF Offset=0xA70 QemuFlashPtr: exit, Ret=FFE0FA70 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success Ftw: Allocate() success, Caller:FE5CEA76-4F72-49E8-986F-2CD899DFFE5D, # 1 FtwAllocate: exit 7 FtwGetFvbByHandle: enter FtwGetFvbByHandle: exit: Success FvbProtocolGetPhysicalAddress: enter FvbGetPhysicalAddress: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success FvbGetPhysicalAddress: exit @ 275, Status=Success, Address=0xFFE00000 FvbProtocolGetPhysicalAddress: exit @ 620, Status=Success IsBootBlock: enter, Lba=0x0 FtwGetSarProtocol: enter FtwGetSarProtocol: exit: Not Found IsBootBlock: exit 2: Not Found FvbProtocolWrite: enter, Lba=0xF Offset=0xA98 NumBytes=0x28 Buffer=9EBEFB78 QemuFlashWrite: enter, Lba=0xF Offset=0xA98 NumBytes=0x28 Buffer=9EBEFB78 QemuFlashPtr: enter, Lba=0xF Offset=0xA98 QemuFlashPtr: exit, Ret=FFE0FA98 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x28 // // Read all original data from target block to memory buffer // FvbProtocolRead: enter, Lba=0x0 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashRead: enter, Lba=0x0 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashPtr: enter, Lba=0x0 Offset=0x0 QemuFlashPtr: exit, Ret=FFE00000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashRead: enter, Lba=0x1 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashPtr: enter, Lba=0x1 Offset=0x0 QemuFlashPtr: exit, Ret=FFE01000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x2 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashRead: enter, Lba=0x2 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashPtr: enter, Lba=0x2 Offset=0x0 QemuFlashPtr: exit, Ret=FFE02000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x3 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashRead: enter, Lba=0x3 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashPtr: enter, Lba=0x3 Offset=0x0 QemuFlashPtr: exit, Ret=FFE03000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x4 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashRead: enter, Lba=0x4 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashPtr: enter, Lba=0x4 Offset=0x0 QemuFlashPtr: exit, Ret=FFE04000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x5 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashRead: enter, Lba=0x5 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashPtr: enter, Lba=0x5 Offset=0x0 QemuFlashPtr: exit, Ret=FFE05000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x6 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashRead: enter, Lba=0x6 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashPtr: enter, Lba=0x6 Offset=0x0 QemuFlashPtr: exit, Ret=FFE06000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x7 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashRead: enter, Lba=0x7 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashPtr: enter, Lba=0x7 Offset=0x0 QemuFlashPtr: exit, Ret=FFE07000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x8 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashRead: enter, Lba=0x8 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashPtr: enter, Lba=0x8 Offset=0x0 QemuFlashPtr: exit, Ret=FFE08000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x9 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashRead: enter, Lba=0x9 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashPtr: enter, Lba=0x9 Offset=0x0 QemuFlashPtr: exit, Ret=FFE09000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0xA Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashRead: enter, Lba=0xA Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashPtr: enter, Lba=0xA Offset=0x0 QemuFlashPtr: exit, Ret=FFE0A000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0xB Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashRead: enter, Lba=0xB Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashPtr: enter, Lba=0xB Offset=0x0 QemuFlashPtr: exit, Ret=FFE0B000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0xC Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashRead: enter, Lba=0xC Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashPtr: enter, Lba=0xC Offset=0x0 QemuFlashPtr: exit, Ret=FFE0C000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0xD Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashRead: enter, Lba=0xD Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashPtr: enter, Lba=0xD Offset=0x0 QemuFlashPtr: exit, Ret=FFE0D000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0xE Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashRead: enter, Lba=0xE Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashPtr: enter, Lba=0xE Offset=0x0 QemuFlashPtr: exit, Ret=FFE0E000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashRead: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashPtr: enter, Lba=0xF Offset=0x0 QemuFlashPtr: exit, Ret=FFE0F000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 // // Try to keep the content of spare block // Save spare block into a spare backup memory buffer (Sparebuffer) // FvbProtocolRead: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C7F5018 QemuFlashRead: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C7F5018 QemuFlashPtr: enter, Lba=0x10 Offset=0x0 QemuFlashPtr: exit, Ret=FFE10000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C7F6018 QemuFlashRead: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C7F6018 QemuFlashPtr: enter, Lba=0x11 Offset=0x0 QemuFlashPtr: exit, Ret=FFE11000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C7F7018 QemuFlashRead: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C7F7018 QemuFlashPtr: enter, Lba=0x12 Offset=0x0 QemuFlashPtr: exit, Ret=FFE12000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C7F8018 QemuFlashRead: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C7F8018 QemuFlashPtr: enter, Lba=0x13 Offset=0x0 QemuFlashPtr: exit, Ret=FFE13000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C7F9018 QemuFlashRead: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C7F9018 QemuFlashPtr: enter, Lba=0x14 Offset=0x0 QemuFlashPtr: exit, Ret=FFE14000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C7FA018 QemuFlashRead: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C7FA018 QemuFlashPtr: enter, Lba=0x15 Offset=0x0 QemuFlashPtr: exit, Ret=FFE15000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C7FB018 QemuFlashRead: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C7FB018 QemuFlashPtr: enter, Lba=0x16 Offset=0x0 QemuFlashPtr: exit, Ret=FFE16000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C7FC018 QemuFlashRead: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C7FC018 QemuFlashPtr: enter, Lba=0x17 Offset=0x0 QemuFlashPtr: exit, Ret=FFE17000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C7FD018 QemuFlashRead: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C7FD018 QemuFlashPtr: enter, Lba=0x18 Offset=0x0 QemuFlashPtr: exit, Ret=FFE18000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C7FE018 QemuFlashRead: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C7FE018 QemuFlashPtr: enter, Lba=0x19 Offset=0x0 QemuFlashPtr: exit, Ret=FFE19000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C7FF018 QemuFlashRead: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C7FF018 QemuFlashPtr: enter, Lba=0x1A Offset=0x0 QemuFlashPtr: exit, Ret=FFE1A000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C800018 QemuFlashRead: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C800018 QemuFlashPtr: enter, Lba=0x1B Offset=0x0 QemuFlashPtr: exit, Ret=FFE1B000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C801018 QemuFlashRead: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C801018 QemuFlashPtr: enter, Lba=0x1C Offset=0x0 QemuFlashPtr: exit, Ret=FFE1C000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C802018 QemuFlashRead: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C802018 QemuFlashPtr: enter, Lba=0x1D Offset=0x0 QemuFlashPtr: exit, Ret=FFE1D000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C803018 QemuFlashRead: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C803018 QemuFlashPtr: enter, Lba=0x1E Offset=0x0 QemuFlashPtr: exit, Ret=FFE1E000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C804018 QemuFlashRead: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C804018 QemuFlashPtr: enter, Lba=0x1F Offset=0x0 QemuFlashPtr: exit, Ret=FFE1F000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 // // Write the memory buffer to spare block // FtwEraseSpareBlock: enter FvbProtocolEraseBlocks: enter GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success QemuFlashEraseBlock: enter, Lba=0x10 QemuFlashPtr: enter, Lba=0x10 Offset=0x0 QemuFlashPtr: exit, Ret=FFE10000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x11 QemuFlashPtr: enter, Lba=0x11 Offset=0x0 QemuFlashPtr: exit, Ret=FFE11000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x12 QemuFlashPtr: enter, Lba=0x12 Offset=0x0 QemuFlashPtr: exit, Ret=FFE12000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x13 QemuFlashPtr: enter, Lba=0x13 Offset=0x0 QemuFlashPtr: exit, Ret=FFE13000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x14 QemuFlashPtr: enter, Lba=0x14 Offset=0x0 QemuFlashPtr: exit, Ret=FFE14000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x15 QemuFlashPtr: enter, Lba=0x15 Offset=0x0 QemuFlashPtr: exit, Ret=FFE15000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x16 QemuFlashPtr: enter, Lba=0x16 Offset=0x0 QemuFlashPtr: exit, Ret=FFE16000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x17 QemuFlashPtr: enter, Lba=0x17 Offset=0x0 QemuFlashPtr: exit, Ret=FFE17000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x18 QemuFlashPtr: enter, Lba=0x18 Offset=0x0 QemuFlashPtr: exit, Ret=FFE18000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x19 QemuFlashPtr: enter, Lba=0x19 Offset=0x0 QemuFlashPtr: exit, Ret=FFE19000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1A QemuFlashPtr: enter, Lba=0x1A Offset=0x0 QemuFlashPtr: exit, Ret=FFE1A000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1B QemuFlashPtr: enter, Lba=0x1B Offset=0x0 QemuFlashPtr: exit, Ret=FFE1B000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1C QemuFlashPtr: enter, Lba=0x1C Offset=0x0 QemuFlashPtr: exit, Ret=FFE1C000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1D QemuFlashPtr: enter, Lba=0x1D Offset=0x0 QemuFlashPtr: exit, Ret=FFE1D000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1E QemuFlashPtr: enter, Lba=0x1E Offset=0x0 QemuFlashPtr: exit, Ret=FFE1E000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1F QemuFlashPtr: enter, Lba=0x1F Offset=0x0 QemuFlashPtr: exit, Ret=FFE1F000 QemuFlashEraseBlock: exit 2 FvbProtocolEraseBlocks: exit @ 839, Status=Success FtwEraseSpareBlock: exit: Success FvbProtocolWrite: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashWrite: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashPtr: enter, Lba=0x10 Offset=0x0 QemuFlashPtr: exit, Ret=FFE10000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashWrite: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashPtr: enter, Lba=0x11 Offset=0x0 QemuFlashPtr: exit, Ret=FFE11000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashWrite: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashPtr: enter, Lba=0x12 Offset=0x0 QemuFlashPtr: exit, Ret=FFE12000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashWrite: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashPtr: enter, Lba=0x13 Offset=0x0 QemuFlashPtr: exit, Ret=FFE13000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashWrite: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashPtr: enter, Lba=0x14 Offset=0x0 QemuFlashPtr: exit, Ret=FFE14000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashWrite: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashPtr: enter, Lba=0x15 Offset=0x0 QemuFlashPtr: exit, Ret=FFE15000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashWrite: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashPtr: enter, Lba=0x16 Offset=0x0 QemuFlashPtr: exit, Ret=FFE16000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashWrite: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashPtr: enter, Lba=0x17 Offset=0x0 QemuFlashPtr: exit, Ret=FFE17000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashWrite: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashPtr: enter, Lba=0x18 Offset=0x0 QemuFlashPtr: exit, Ret=FFE18000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashWrite: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashPtr: enter, Lba=0x19 Offset=0x0 QemuFlashPtr: exit, Ret=FFE19000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashWrite: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashPtr: enter, Lba=0x1A Offset=0x0 QemuFlashPtr: exit, Ret=FFE1A000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashWrite: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashPtr: enter, Lba=0x1B Offset=0x0 QemuFlashPtr: exit, Ret=FFE1B000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashWrite: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashPtr: enter, Lba=0x1C Offset=0x0 QemuFlashPtr: exit, Ret=FFE1C000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashWrite: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashPtr: enter, Lba=0x1D Offset=0x0 QemuFlashPtr: exit, Ret=FFE1D000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashWrite: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashPtr: enter, Lba=0x1E Offset=0x0 QemuFlashPtr: exit, Ret=FFE1E000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 !!! out-of-varstore write !!! FvbProtocolWrite: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashWrite: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashPtr: enter, Lba=0x1F Offset=0x0 QemuFlashPtr: exit, Ret=FFE1F000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 // // Set the SpareComplete in the FTW record, // FtwUpdateFvState: enter, Lba=0xF Offset=0xA98 NewBit=2 FvbProtocolRead: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F8526C7 QemuFlashRead: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F8526C7 QemuFlashPtr: enter, Lba=0xF Offset=0xA98 QemuFlashPtr: exit, Ret=FFE0FA98 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F8526C7 QemuFlashWrite: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F8526C7 QemuFlashPtr: enter, Lba=0xF Offset=0xA98 QemuFlashPtr: exit, Ret=FFE0FA98 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success // // Since the content has already backuped in spare block, the write is // guaranteed to be completed with fault tolerant manner. // FtwWriteRecord: enter // // IF target block is working block, THEN Flush Spare Block To Working Block; // ELSE flush spare block to target block, which may be boot block after all. // IsWorkingBlock: enter, Lba=0x0 IsWorkingBlock: exit: 1 FtwUpdateFvState: enter, Lba=0x1F Offset=0xA98 NewBit=2 FvbProtocolRead: enter, Lba=0x1F Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashRead: enter, Lba=0x1F Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashPtr: enter, Lba=0x1F Offset=0xA98 QemuFlashPtr: exit, Ret=FFE1FA98 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0x1F Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashWrite: enter, Lba=0x1F Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashPtr: enter, Lba=0x1F Offset=0xA98 QemuFlashPtr: exit, Ret=FFE1FA98 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success FlushSpareBlockToWorkingBlock: enter FtwUpdateFvState: enter, Lba=0x1F Offset=0x14 NewBit=1 FvbProtocolRead: enter, Lba=0x1F Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashRead: enter, Lba=0x1F Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashPtr: enter, Lba=0x1F Offset=0x14 QemuFlashPtr: exit, Ret=FFE1F014 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0x1F Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashWrite: enter, Lba=0x1F Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashPtr: enter, Lba=0x1F Offset=0x14 QemuFlashPtr: exit, Ret=FFE1F014 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success // // Read from spare block to memory buffer // FvbProtocolRead: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashRead: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashPtr: enter, Lba=0x10 Offset=0x0 QemuFlashPtr: exit, Ret=FFE10000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashRead: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashPtr: enter, Lba=0x11 Offset=0x0 QemuFlashPtr: exit, Ret=FFE11000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashRead: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashPtr: enter, Lba=0x12 Offset=0x0 QemuFlashPtr: exit, Ret=FFE12000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashRead: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashPtr: enter, Lba=0x13 Offset=0x0 QemuFlashPtr: exit, Ret=FFE13000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashRead: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashPtr: enter, Lba=0x14 Offset=0x0 QemuFlashPtr: exit, Ret=FFE14000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashRead: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashPtr: enter, Lba=0x15 Offset=0x0 QemuFlashPtr: exit, Ret=FFE15000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashRead: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashPtr: enter, Lba=0x16 Offset=0x0 QemuFlashPtr: exit, Ret=FFE16000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashRead: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashPtr: enter, Lba=0x17 Offset=0x0 QemuFlashPtr: exit, Ret=FFE17000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashRead: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashPtr: enter, Lba=0x18 Offset=0x0 QemuFlashPtr: exit, Ret=FFE18000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashRead: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashPtr: enter, Lba=0x19 Offset=0x0 QemuFlashPtr: exit, Ret=FFE19000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashRead: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashPtr: enter, Lba=0x1A Offset=0x0 QemuFlashPtr: exit, Ret=FFE1A000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashRead: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashPtr: enter, Lba=0x1B Offset=0x0 QemuFlashPtr: exit, Ret=FFE1B000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashRead: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashPtr: enter, Lba=0x1C Offset=0x0 QemuFlashPtr: exit, Ret=FFE1C000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashRead: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashPtr: enter, Lba=0x1D Offset=0x0 QemuFlashPtr: exit, Ret=FFE1D000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashRead: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashPtr: enter, Lba=0x1E Offset=0x0 QemuFlashPtr: exit, Ret=FFE1E000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 FvbProtocolRead: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashRead: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashPtr: enter, Lba=0x1F Offset=0x0 QemuFlashPtr: exit, Ret=FFE1F000 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1000 // // Clear the CRC and STATE, copy data from spare to working block. // InitWorkSpaceHeader: enter InitWorkSpaceHeader: exit 2 // // target block is working block, then // Set WorkingBlockInvalid in EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER // before erase the working block. // FtwUpdateFvState: enter, Lba=0xF Offset=0x14 NewBit=2 FvbProtocolRead: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashRead: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashPtr: enter, Lba=0xF Offset=0x14 QemuFlashPtr: exit, Ret=FFE0F014 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashWrite: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashPtr: enter, Lba=0xF Offset=0x14 QemuFlashPtr: exit, Ret=FFE0F014 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success // // Erase the working block // FtwEraseBlock: enter, Lba=0x0 FvbProtocolEraseBlocks: enter GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success QemuFlashEraseBlock: enter, Lba=0x0 QemuFlashPtr: enter, Lba=0x0 Offset=0x0 QemuFlashPtr: exit, Ret=FFE00000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1 QemuFlashPtr: enter, Lba=0x1 Offset=0x0 QemuFlashPtr: exit, Ret=FFE01000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x2 QemuFlashPtr: enter, Lba=0x2 Offset=0x0 QemuFlashPtr: exit, Ret=FFE02000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x3 QemuFlashPtr: enter, Lba=0x3 Offset=0x0 QemuFlashPtr: exit, Ret=FFE03000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x4 QemuFlashPtr: enter, Lba=0x4 Offset=0x0 QemuFlashPtr: exit, Ret=FFE04000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x5 QemuFlashPtr: enter, Lba=0x5 Offset=0x0 QemuFlashPtr: exit, Ret=FFE05000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x6 QemuFlashPtr: enter, Lba=0x6 Offset=0x0 QemuFlashPtr: exit, Ret=FFE06000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x7 QemuFlashPtr: enter, Lba=0x7 Offset=0x0 QemuFlashPtr: exit, Ret=FFE07000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x8 QemuFlashPtr: enter, Lba=0x8 Offset=0x0 QemuFlashPtr: exit, Ret=FFE08000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x9 QemuFlashPtr: enter, Lba=0x9 Offset=0x0 QemuFlashPtr: exit, Ret=FFE09000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0xA QemuFlashPtr: enter, Lba=0xA Offset=0x0 QemuFlashPtr: exit, Ret=FFE0A000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0xB QemuFlashPtr: enter, Lba=0xB Offset=0x0 QemuFlashPtr: exit, Ret=FFE0B000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0xC QemuFlashPtr: enter, Lba=0xC Offset=0x0 QemuFlashPtr: exit, Ret=FFE0C000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0xD QemuFlashPtr: enter, Lba=0xD Offset=0x0 QemuFlashPtr: exit, Ret=FFE0D000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0xE QemuFlashPtr: enter, Lba=0xE Offset=0x0 QemuFlashPtr: exit, Ret=FFE0E000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0xF QemuFlashPtr: enter, Lba=0xF Offset=0x0 QemuFlashPtr: exit, Ret=FFE0F000 QemuFlashEraseBlock: exit 2 FvbProtocolEraseBlocks: exit @ 839, Status=Success FtwEraseBlock: exit: Success // // Write memory buffer to working block, using the FvbBlock protocol interface // FvbProtocolWrite: enter, Lba=0x0 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashWrite: enter, Lba=0x0 Offset=0x0 NumBytes=0x1000 Buffer=9C806018 QemuFlashPtr: enter, Lba=0x0 Offset=0x0 QemuFlashPtr: exit, Ret=FFE00000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashWrite: enter, Lba=0x1 Offset=0x0 NumBytes=0x1000 Buffer=9C807018 QemuFlashPtr: enter, Lba=0x1 Offset=0x0 QemuFlashPtr: exit, Ret=FFE01000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x2 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashWrite: enter, Lba=0x2 Offset=0x0 NumBytes=0x1000 Buffer=9C808018 QemuFlashPtr: enter, Lba=0x2 Offset=0x0 QemuFlashPtr: exit, Ret=FFE02000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x3 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashWrite: enter, Lba=0x3 Offset=0x0 NumBytes=0x1000 Buffer=9C809018 QemuFlashPtr: enter, Lba=0x3 Offset=0x0 QemuFlashPtr: exit, Ret=FFE03000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x4 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashWrite: enter, Lba=0x4 Offset=0x0 NumBytes=0x1000 Buffer=9C80A018 QemuFlashPtr: enter, Lba=0x4 Offset=0x0 QemuFlashPtr: exit, Ret=FFE04000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x5 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashWrite: enter, Lba=0x5 Offset=0x0 NumBytes=0x1000 Buffer=9C80B018 QemuFlashPtr: enter, Lba=0x5 Offset=0x0 QemuFlashPtr: exit, Ret=FFE05000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x6 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashWrite: enter, Lba=0x6 Offset=0x0 NumBytes=0x1000 Buffer=9C80C018 QemuFlashPtr: enter, Lba=0x6 Offset=0x0 QemuFlashPtr: exit, Ret=FFE06000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x7 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashWrite: enter, Lba=0x7 Offset=0x0 NumBytes=0x1000 Buffer=9C80D018 QemuFlashPtr: enter, Lba=0x7 Offset=0x0 QemuFlashPtr: exit, Ret=FFE07000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x8 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashWrite: enter, Lba=0x8 Offset=0x0 NumBytes=0x1000 Buffer=9C80E018 QemuFlashPtr: enter, Lba=0x8 Offset=0x0 QemuFlashPtr: exit, Ret=FFE08000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x9 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashWrite: enter, Lba=0x9 Offset=0x0 NumBytes=0x1000 Buffer=9C80F018 QemuFlashPtr: enter, Lba=0x9 Offset=0x0 QemuFlashPtr: exit, Ret=FFE09000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0xA Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashWrite: enter, Lba=0xA Offset=0x0 NumBytes=0x1000 Buffer=9C810018 QemuFlashPtr: enter, Lba=0xA Offset=0x0 QemuFlashPtr: exit, Ret=FFE0A000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0xB Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashWrite: enter, Lba=0xB Offset=0x0 NumBytes=0x1000 Buffer=9C811018 QemuFlashPtr: enter, Lba=0xB Offset=0x0 QemuFlashPtr: exit, Ret=FFE0B000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0xC Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashWrite: enter, Lba=0xC Offset=0x0 NumBytes=0x1000 Buffer=9C812018 QemuFlashPtr: enter, Lba=0xC Offset=0x0 QemuFlashPtr: exit, Ret=FFE0C000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0xD Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashWrite: enter, Lba=0xD Offset=0x0 NumBytes=0x1000 Buffer=9C813018 QemuFlashPtr: enter, Lba=0xD Offset=0x0 QemuFlashPtr: exit, Ret=FFE0D000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0xE Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashWrite: enter, Lba=0xE Offset=0x0 NumBytes=0x1000 Buffer=9C814018 QemuFlashPtr: enter, Lba=0xE Offset=0x0 QemuFlashPtr: exit, Ret=FFE0E000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashWrite: enter, Lba=0xF Offset=0x0 NumBytes=0x1000 Buffer=9C815018 QemuFlashPtr: enter, Lba=0xF Offset=0x0 QemuFlashPtr: exit, Ret=FFE0F000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 // // Update the VALID of the working block // FtwUpdateFvState: enter, Lba=0xF Offset=0x14 NewBit=1 FvbProtocolRead: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashRead: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashPtr: enter, Lba=0xF Offset=0x14 QemuFlashPtr: exit, Ret=FFE0F014 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashWrite: enter, Lba=0xF Offset=0x14 NumBytes=0x1 Buffer=9F8525D7 QemuFlashPtr: enter, Lba=0xF Offset=0x14 QemuFlashPtr: exit, Ret=FFE0F014 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success FlushSpareBlockToWorkingBlock: exit @ 765, Status=Success // // Record the DestionationComplete in record // FtwUpdateFvState: enter, Lba=0xF Offset=0xA98 NewBit=4 FvbProtocolRead: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashRead: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashPtr: enter, Lba=0xF Offset=0xA98 QemuFlashPtr: exit, Ret=FFE0FA98 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashWrite: enter, Lba=0xF Offset=0xA98 NumBytes=0x1 Buffer=9F852657 QemuFlashPtr: enter, Lba=0xF Offset=0xA98 QemuFlashPtr: exit, Ret=FFE0FA98 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success // // If this is the last Write in these write sequence, // set the complete flag of write header. // IsLastRecordOfWrites: enter IsLastRecordOfWrites: exit: 1 FtwUpdateFvState: enter, Lba=0xF Offset=0xA70 NewBit=4 FvbProtocolRead: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852657 QemuFlashRead: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852657 QemuFlashPtr: enter, Lba=0xF Offset=0xA70 QemuFlashPtr: exit, Ret=FFE0FA70 QemuFlashRead: exit 2 FvbProtocolRead: exit @ 944, Status=Success, NumBytes=0x1 FvbProtocolWrite: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852657 QemuFlashWrite: enter, Lba=0xF Offset=0xA70 NumBytes=0x1 Buffer=9F852657 QemuFlashPtr: enter, Lba=0xF Offset=0xA70 QemuFlashPtr: exit, Ret=FFE0FA70 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1 FtwUpdateFvState: exit @ 824, Status=Success FtwWriteRecord: exit 5 // // Restore spare backup buffer into spare block , if no failure happened during FtwWrite. // FtwEraseSpareBlock: enter FvbProtocolEraseBlocks: enter GetFvbInstance: enter, Instance=0x0, Global=9F7DAF18, Virtual=0 GetFvbInstance: exit @ 229, Status=Success QemuFlashEraseBlock: enter, Lba=0x10 QemuFlashPtr: enter, Lba=0x10 Offset=0x0 QemuFlashPtr: exit, Ret=FFE10000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x11 QemuFlashPtr: enter, Lba=0x11 Offset=0x0 QemuFlashPtr: exit, Ret=FFE11000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x12 QemuFlashPtr: enter, Lba=0x12 Offset=0x0 QemuFlashPtr: exit, Ret=FFE12000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x13 QemuFlashPtr: enter, Lba=0x13 Offset=0x0 QemuFlashPtr: exit, Ret=FFE13000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x14 QemuFlashPtr: enter, Lba=0x14 Offset=0x0 QemuFlashPtr: exit, Ret=FFE14000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x15 QemuFlashPtr: enter, Lba=0x15 Offset=0x0 QemuFlashPtr: exit, Ret=FFE15000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x16 QemuFlashPtr: enter, Lba=0x16 Offset=0x0 QemuFlashPtr: exit, Ret=FFE16000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x17 QemuFlashPtr: enter, Lba=0x17 Offset=0x0 QemuFlashPtr: exit, Ret=FFE17000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x18 QemuFlashPtr: enter, Lba=0x18 Offset=0x0 QemuFlashPtr: exit, Ret=FFE18000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x19 QemuFlashPtr: enter, Lba=0x19 Offset=0x0 QemuFlashPtr: exit, Ret=FFE19000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1A QemuFlashPtr: enter, Lba=0x1A Offset=0x0 QemuFlashPtr: exit, Ret=FFE1A000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1B QemuFlashPtr: enter, Lba=0x1B Offset=0x0 QemuFlashPtr: exit, Ret=FFE1B000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1C QemuFlashPtr: enter, Lba=0x1C Offset=0x0 QemuFlashPtr: exit, Ret=FFE1C000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1D QemuFlashPtr: enter, Lba=0x1D Offset=0x0 QemuFlashPtr: exit, Ret=FFE1D000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1E QemuFlashPtr: enter, Lba=0x1E Offset=0x0 QemuFlashPtr: exit, Ret=FFE1E000 QemuFlashEraseBlock: exit 2 QemuFlashEraseBlock: enter, Lba=0x1F QemuFlashPtr: enter, Lba=0x1F Offset=0x0 QemuFlashPtr: exit, Ret=FFE1F000 QemuFlashEraseBlock: exit 2 FvbProtocolEraseBlocks: exit @ 839, Status=Success FtwEraseSpareBlock: exit: Success FvbProtocolWrite: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C7F5018 QemuFlashWrite: enter, Lba=0x10 Offset=0x0 NumBytes=0x1000 Buffer=9C7F5018 QemuFlashPtr: enter, Lba=0x10 Offset=0x0 QemuFlashPtr: exit, Ret=FFE10000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C7F6018 QemuFlashWrite: enter, Lba=0x11 Offset=0x0 NumBytes=0x1000 Buffer=9C7F6018 QemuFlashPtr: enter, Lba=0x11 Offset=0x0 QemuFlashPtr: exit, Ret=FFE11000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C7F7018 QemuFlashWrite: enter, Lba=0x12 Offset=0x0 NumBytes=0x1000 Buffer=9C7F7018 QemuFlashPtr: enter, Lba=0x12 Offset=0x0 QemuFlashPtr: exit, Ret=FFE12000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C7F8018 QemuFlashWrite: enter, Lba=0x13 Offset=0x0 NumBytes=0x1000 Buffer=9C7F8018 QemuFlashPtr: enter, Lba=0x13 Offset=0x0 QemuFlashPtr: exit, Ret=FFE13000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C7F9018 QemuFlashWrite: enter, Lba=0x14 Offset=0x0 NumBytes=0x1000 Buffer=9C7F9018 QemuFlashPtr: enter, Lba=0x14 Offset=0x0 QemuFlashPtr: exit, Ret=FFE14000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C7FA018 QemuFlashWrite: enter, Lba=0x15 Offset=0x0 NumBytes=0x1000 Buffer=9C7FA018 QemuFlashPtr: enter, Lba=0x15 Offset=0x0 QemuFlashPtr: exit, Ret=FFE15000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C7FB018 QemuFlashWrite: enter, Lba=0x16 Offset=0x0 NumBytes=0x1000 Buffer=9C7FB018 QemuFlashPtr: enter, Lba=0x16 Offset=0x0 QemuFlashPtr: exit, Ret=FFE16000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C7FC018 QemuFlashWrite: enter, Lba=0x17 Offset=0x0 NumBytes=0x1000 Buffer=9C7FC018 QemuFlashPtr: enter, Lba=0x17 Offset=0x0 QemuFlashPtr: exit, Ret=FFE17000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C7FD018 QemuFlashWrite: enter, Lba=0x18 Offset=0x0 NumBytes=0x1000 Buffer=9C7FD018 QemuFlashPtr: enter, Lba=0x18 Offset=0x0 QemuFlashPtr: exit, Ret=FFE18000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C7FE018 QemuFlashWrite: enter, Lba=0x19 Offset=0x0 NumBytes=0x1000 Buffer=9C7FE018 QemuFlashPtr: enter, Lba=0x19 Offset=0x0 QemuFlashPtr: exit, Ret=FFE19000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C7FF018 QemuFlashWrite: enter, Lba=0x1A Offset=0x0 NumBytes=0x1000 Buffer=9C7FF018 QemuFlashPtr: enter, Lba=0x1A Offset=0x0 QemuFlashPtr: exit, Ret=FFE1A000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C800018 QemuFlashWrite: enter, Lba=0x1B Offset=0x0 NumBytes=0x1000 Buffer=9C800018 QemuFlashPtr: enter, Lba=0x1B Offset=0x0 QemuFlashPtr: exit, Ret=FFE1B000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C801018 QemuFlashWrite: enter, Lba=0x1C Offset=0x0 NumBytes=0x1000 Buffer=9C801018 QemuFlashPtr: enter, Lba=0x1C Offset=0x0 QemuFlashPtr: exit, Ret=FFE1C000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C802018 QemuFlashWrite: enter, Lba=0x1D Offset=0x0 NumBytes=0x1000 Buffer=9C802018 QemuFlashPtr: enter, Lba=0x1D Offset=0x0 QemuFlashPtr: exit, Ret=FFE1D000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 FvbProtocolWrite: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C803018 QemuFlashWrite: enter, Lba=0x1E Offset=0x0 NumBytes=0x1000 Buffer=9C803018 QemuFlashPtr: enter, Lba=0x1E Offset=0x0 QemuFlashPtr: exit, Ret=FFE1E000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 !!! out-of-varstore write !!! FvbProtocolWrite: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C804018 QemuFlashWrite: enter, Lba=0x1F Offset=0x0 NumBytes=0x1000 Buffer=9C804018 QemuFlashPtr: enter, Lba=0x1F Offset=0x0 QemuFlashPtr: exit, Ret=FFE1F000 QemuFlashWrite: exit 2 FvbProtocolWrite: exit @ 891, Status=Success, NumBytes=0x1000 // // All success. // Ftw: Write() success, (Lba:Offset)=(0:0x48), Length: 0xDFB8 FtwWrite: exit 20 FtwVariableSpace: exit @ 167, Status=Success --------------060409090906030104080306-- --------------RAM0kYbVlv7HAaR3FbeldGPF--