From: "Pete Batard" <pete@akeo.ie>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
edk2-devel-groups-io <devel@edk2.groups.io>
Cc: Leif Lindholm <leif@nuviainc.com>, Laszlo Ersek <lersek@redhat.com>
Subject: Re: [PATCH 1/1] ArmPlatformPkg/PrePi: replace set/way cache ops with by-VA ones
Date: Wed, 26 Feb 2020 01:34:24 +0000 [thread overview]
Message-ID: <c7307344-010d-72a3-81fe-4315cf3586d0@akeo.ie> (raw)
In-Reply-To: <CAKv+Gu_KAAW1s+gtytJ9ROHo+L=Vr5X7OtCsFkW1edtK_P+xrA@mail.gmail.com>
Hi Ard,
On 2020.02.25 22:27, Ard Biesheuvel wrote:
> On Tue, 25 Feb 2020 at 19:31, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>>
>> On Tue, 25 Feb 2020 at 19:28, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>>>
>>> Cache maintenance operations by set/way are only intended to be used
>>> in the context of on/offlining a core, while it has been taken out of
>>> the coherency domain. Any use intended to ensure that the contents of
>>> the cache have made it to main memory is unreliable, since cacheline
>>> migration and non-architected system caches may cause these contents
>>> to linger elsewhere, without being visible in main memory once the
>>> MMU and caches are disabled.
>>>
>>> In KVM on Linux, there are horrid hacks in place to ensure that such
>>> set/way operations are trapped, and replaced with a single by-VA
>>> clean/invalidate of the entire guest VA space once the MMU state
>>> changes, which can be costly, and is unnecessary if we manage the
>>> caches a bit more carefully, and perform maintenance by virtual
>>> address only.
>>>
>>> So let's get rid of the call to ArmInvalidateDataCache () in the
>>> PrePeiCore startup code, and instead, invalidate the UEFI memory
>>> region by virtual address, which is the only memory region we will
>>> be touching with the caches and MMU both disabled and enabled.
>>> (This will lead to data corruption if data written with the MMU off
>>> is shadowed by clean, stale cachelines that stick around when the
>>> MMU is enabled again.)
>>>
>>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>> ---
>>
>> Forgot to add a note that this is the *PrePi* version, not the
>> PrePeiCore one that I sent before.
>>
>> @Pete: this might affect RPi3 and RPi4, and I am currently not able to
>> test it. If it's not too much trouble, I'd appreciate a Tested-by. If
>> not, I'll test it myself, but it may take me a while to get around to
>> it.
>>
>
> Actually, I decided to dedicate some of my evening to have a go at this myself.
>
> This patch works for me on RPi4, as well as the BCM GENET with the
> latest changes, and the version of the driver that turned up in
> net-next today
>
> I am getting around 100 - 150 Mbit/s - is that what I should expect?
Not sure what device you're running your system from, because I'm easily
reaching 700 Mbit/s when running a large Samba copy from a USB 3.0
drive, which I hope should work well enough as a stress test.
Tested both for read and write, with and without the patch (but only on
Pi 4). No noticeable reduction in speed as far as I can tell.
With this:
Tested-By: Pete Batard <pete@akeo.ie>
Regards,
/Pete
next prev parent reply other threads:[~2020-02-26 1:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-25 18:28 [PATCH 1/1] ArmPlatformPkg/PrePi: replace set/way cache ops with by-VA ones Ard Biesheuvel
2020-02-25 18:31 ` Ard Biesheuvel
2020-02-25 22:27 ` Ard Biesheuvel
2020-02-26 1:34 ` Pete Batard [this message]
2020-02-26 6:57 ` Ard Biesheuvel
2020-02-26 0:44 ` [edk2-devel] " Laszlo Ersek
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