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Subject: Re: [PATCH edk2-platforms 01/16] Silicon/NXP/NxpQoriqLs.dec: Add PCIe related PCDs.
To: "Wasim Khan (OSS)" <wasim.khan@oss.nxp.com>
Cc: "devel@edk2.groups.io" <devel@edk2.groups.io>,
 Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
 Vabhav Sharma <vabhav.sharma@nxp.com>, Varun Sethi <V.Sethi@nxp.com>,
 "leif@nuviainc.com" <leif@nuviainc.com>,
 "jon@solid-run.com" <jon@solid-run.com>
References: <1590102139-16588-1-git-send-email-wasim.khan@oss.nxp.com>
 <1590102139-16588-2-git-send-email-wasim.khan@oss.nxp.com>
 <6e03fc55-38b3-cc18-fb7a-e09b42091070@arm.com>
 <VE1PR04MB67025C04527714547B48941790B20@VE1PR04MB6702.eurprd04.prod.outlook.com>
From: "Ard Biesheuvel" <ard.biesheuvel@arm.com>
Message-ID: <c7b85c9c-7d44-67cd-da4b-4aad7927ad99@arm.com>
Date: Tue, 26 May 2020 08:16:01 +0200
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On 5/24/20 8:31 PM, Wasim Khan (OSS) wrote:
> 
> 
>> -----Original Message-----
>> From: Ard Biesheuvel <ard.biesheuvel@arm.com>
>> Sent: Friday, May 22, 2020 2:42 PM
>> To: Wasim Khan (OSS) <wasim.khan@oss.nxp.com>; devel@edk2.groups.io;
>> Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>; Vabhav Sharma
>> <vabhav.sharma@nxp.com>; Varun Sethi <V.Sethi@nxp.com>;
>> leif@nuviainc.com; jon@solid-run.com
>> Cc: Wasim Khan <wasim.khan@nxp.com>
>> Subject: Re: [PATCH edk2-platforms 01/16] Silicon/NXP/NxpQoriqLs.dec: Add
>> PCIe related PCDs.
>>
>> On 5/22/20 1:02 AM, Wasim Khan wrote:
>>> From: Wasim Khan <wasim.khan@nxp.com>
>>>
>>> Add PCIe related PCDs.
>>>
>>> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
>>
>> Please drop this signoff. This is not the correct way to acknowledge (co-
>> )authorship.
> 
> Co-authored-by: Vabhav Sharma <vabhav.sharma@nxp.com>
> Co-authored-by: Wasim Khan <wasim.khan@nxp.com>
> Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> 
> Is this OK ?
> 

Yes that is fine.

>>
>>> Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
>>> ---
>>>    Silicon/NXP/NxpQoriqLs.dec | 9 +++++++++
>>>    1 file changed, 9 insertions(+)
>>>
>>> diff --git a/Silicon/NXP/NxpQoriqLs.dec b/Silicon/NXP/NxpQoriqLs.dec
>>> index 0722f59ef4f6..bafdfd9f4298 100644
>>> --- a/Silicon/NXP/NxpQoriqLs.dec
>>> +++ b/Silicon/NXP/NxpQoriqLs.dec
>>> @@ -27,3 +27,12 @@ [Guids.common]
>>>    [PcdsFeatureFlag]
>>>
>> gNxpQoriqLsTokenSpaceGuid.PcdI2cErratumA009203|FALSE|BOOLEAN|0x0000
>> 0315
>>>
>>>
>> gNxpQoriqLsTokenSpaceGuid.PcdDcfgBigEndian|FALSE|BOOLEAN|0x00000316
>>> +
>>> +
>> gNxpQoriqLsTokenSpaceGuid.PcdPciLutBigEndian|FALSE|BOOLEAN|0x0000031
>>> + 7
>>> +
>>> +[PcdsFixedAtBuild.common]
>>> +  # Pcds for PCI Express
>>> +
>> gNxpQoriqLsTokenSpaceGuid.PcdPciExp1BaseAddr|0x0|UINT64|0x00000500
>>> +  gNxpQoriqLsTokenSpaceGuid.PcdNumPciController|0|UINT32|0x00000501
>>> +  gNxpQoriqLsTokenSpaceGuid.PcdPcieLutBase|0x0|UINT32|0x00000502
>>> +  gNxpQoriqLsTokenSpaceGuid.PcdPcieLutDbg|0x0|UINT32|0x00000503
>>> +  gNxpQoriqLsTokenSpaceGuid.PcdPciDebug|FALSE|BOOLEAN|0x00000504
>>>
>