From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 7AF3CAC172E for ; Tue, 19 Dec 2023 13:01:34 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=WcriIu7MDkrty20O8HDd//QZ2PPwj0GqxjoaGIcJwm4=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:From:To:Cc:Reply-To:References:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1702990893; v=1; b=PA8WWL0rs0IQcBSaI6PM0Ln3qusGvhnX73ZtD8qHBJw3gXmmzAsPWUbALghAbEnbTn5xF+uY We/bJ2V97y3noqoiglvztDJoYXAa3MUJzjuhdMr/MHYWK8OwZQcaFKinjYPZqOyej3iGb6lFkS6 gzKZOxWoQPIadUHuJbPhT3tI= X-Received: by 127.0.0.2 with SMTP id ozYkYY7687511xFea9cwt2PR; Tue, 19 Dec 2023 05:01:33 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.11313.1702990891582568254 for ; Tue, 19 Dec 2023 05:01:32 -0800 X-Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8Cx9OonlIFlyZ0CAA--.8933S3; Tue, 19 Dec 2023 21:01:27 +0800 (CST) X-Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxbOQnlIFli1oAAA--.2560S3; Tue, 19 Dec 2023 21:01:27 +0800 (CST) Message-ID: Date: Tue, 19 Dec 2023 21:01:27 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerLibKs0 From: "Chao Li" To: devel@edk2.groups.io, Michael D Kinney , Liming Gao Cc: Zhiguang Liu , Laszlo Ersek Reply-To: devel@edk2.groups.io,lichao@loongson.cn References: <20231212130932.2467028-1-lichao@loongson.cn> <17A017B459AD36A8.31409@groups.io> In-Reply-To: <17A017B459AD36A8.31409@groups.io> X-CM-TRANSID: AQAAf8CxbOQnlIFli1oAAA--.2560S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAKCGWA-a4JlgAIsi X-Coremail-Antispam: 1Uk129KBj93XoWxKFy3Xry5CFy7try7ZFy7Jwc_yoWfWF15pw 4UGF4ktr15JrySgry2qa1rAF45uan7ur98Crs2yF18C34kArWjqr12qFyrKF1ruan5Aw1I grWayw48ua4kXFcCm3ZEXasCq-sJn29KB7ZKAUJUUUUr529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnRJUUUvGb4IE77IF4wAF F20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r 1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAF wI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67 AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AKxVWxJr0_GcWln4kS14v26r1Y6r17 M2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1lYx0E2Ix0cI 8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvEwIxGrwCjr7xvwVCIw2I0I7xG6c02F41l42xK82IYc2Ij64vIr41l4I8I3I0E4I kC6x0Yz7v_Jr0_Gr1l4IxYO2xFxVAFwI0_Jrv_JF1lx2IqxVAqx4xG67AKxVWUGVWUWwC2 0s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMI IF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF 0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87 Iv6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxU7wZ2DUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 2ZRyirWMr8lRtxo4Tq2aHlZAx7686176AA= Content-Type: multipart/alternative; boundary="------------uKAc2BrIMXqHlicql1bprEnR" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=PA8WWL0r; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --------------uKAc2BrIMXqHlicql1bprEnR Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hi Mike and Liming, Can you please review this patch? Thank you! Thanks, Chao On 2023/12/12 21:11, Chao Li wrote: > Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides > setting and getting the PEI service table pointer through the CSR KS0 > register. > > The idea of this library is derived from > ArmPkg/Library/PeiServicesTablePointerLib/ > > BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584 > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Cc: Laszlo Ersek > Signed-off-by: Chao Li > --- > .../Library/PeiServicesTablePointerLib.h | 9 +- > .../PeiServicesTablePointer.c | 87 +++++++++++++++++++ > .../PeiServicesTablePointerLibKs0.inf | 37 ++++++++ > .../PeiServicesTablePointerLibKs0.uni | 20 +++++ > MdePkg/MdePkg.dsc | 3 + > 5 files changed, 152 insertions(+), 4 deletions(-) > create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServ= icesTablePointer.c > create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServ= icesTablePointerLibKs0.inf > create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServ= icesTablePointerLibKs0.uni > > diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg= /Include/Library/PeiServicesTablePointerLib.h > index 61635eff00..f85c38363c 100644 > --- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h > +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h > @@ -52,10 +52,11 @@ SetPeiServicesTablePointer ( > immediately preceding the Interrupt Descriptor Table (IDT) in memory. > For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes > immediately preceding the Interrupt Descriptor Table (IDT) in memory. > - For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored i= n > - a dedicated CPU register. This means that there is no memory storage > - associated with storing the PEI Services Table pointer, so no addition= al > - migration actions are required for Itanium or ARM CPUs. > + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer > + is stored in a dedicated CPU register. This means that there is no > + memory storage associated with storing the PEI Services Table pointer, > + so no additional migration actions are required for Itanium, ARM and > + LoongArch CPUs. > =20 > **/ > VOID > diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTabl= ePointer.c b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointer.c > new file mode 100644 > index 0000000000..2560b232f9 > --- /dev/null > +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointe= r.c > @@ -0,0 +1,87 @@ > +/** @file > + PEI Services Table Pointer Library For Reigseter Mechanism. > + > + This library is used for PEIM which does executed from flash device di= rectly but > + executed in memory. > + > + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
> + Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved. > + Copyright (c) 2023 Loongson Technology Corporation Limited. All rights= reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > +#include > +#include > + > +/** > + Caches a pointer PEI Services Table. > + > + Caches the pointer to the PEI Services Table specified by PeiServicesT= ablePointer > + in a platform specific manner. > + > + If PeiServicesTablePointer is NULL, then ASSERT(). > + > + @param PeiServicesTablePointer The address of PeiServices pointer= . > +**/ > +VOID > +EFIAPI > +SetPeiServicesTablePointer ( > + IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer > + ) > +{ > + ASSERT (PeiServicesTablePointer !=3D NULL); > + CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer); > +} > + > +/** > + Retrieves the cached value of the PEI Services Table pointer. > + > + Returns the cached value of the PEI Services Table pointer in a CPU sp= ecific manner > + as specified in the CPU binding section of the Platform Initialization= Pre-EFI > + Initialization Core Interface Specification. > + > + If the cached PEI Services Table pointer is NULL, then ASSERT(). > + > + @return The pointer to PeiServices. > + > +**/ > +CONST EFI_PEI_SERVICES ** > +EFIAPI > +GetPeiServicesTablePointer ( > + VOID > + ) > +{ > + CONST EFI_PEI_SERVICES **PeiServices; > + > + PeiServices =3D (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0= )); > + ASSERT (PeiServices !=3D NULL); > + return PeiServices; > +} > + > +/** > + Perform CPU specific actions required to migrate the PEI Services Tabl= e > + pointer from temporary RAM to permanent RAM. > + > + For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes > + immediately preceding the Interrupt Descriptor Table (IDT) in memory. > + For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes > + immediately preceding the Interrupt Descriptor Table (IDT) in memory. > + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer > + is stored in a dedicated CPU register. This means that there is no > + memory storage associated with storing the PEI Services Table pointer, > + so no additional migration actions are required for Itanium, ARM and > + LoongArch CPUs. > + > +**/ > +VOID > +EFIAPI > +MigratePeiServicesTablePointer ( > + VOID > + ) > +{ > + return; > +} > diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTabl= ePointerLibKs0.inf b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServic= esTablePointerLibKs0.inf > new file mode 100644 > index 0000000000..e8ecd4616d > --- /dev/null > +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointe= rLibKs0.inf > @@ -0,0 +1,37 @@ > +## @file > +# Instance of PEI Services Table Pointer Library using register CSR KS0 = for the table pointer. > +# > +# PEI Services Table Pointer Library implementation that retrieves a poi= nter to the > +# PEI Services Table from a CPU register. Applies to modules that execut= e from > +# read-only memory. > +# > +# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved. > +# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights= reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +# > +## > + > +[Defines] > + INF_VERSION =3D 1.29 > + BASE_NAME =3D PeiServicesTablePointerLib > + MODULE_UNI_FILE =3D PeiServicesTablePointerLibKs0.uni > + FILE_GUID =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B= 7 > + MODULE_TYPE =3D PEIM > + VERSION_STRING =3D 1.0 > + LIBRARY_CLASS =3D PeiServicesTablePointerLib|PEIM PEI= _CORE SEC > + > +# > +# VALID_ARCHITECTURES =3D LOONGARCH64 > +# > + > +[Sources] > + PeiServicesTablePointer.c > + > +[Packages] > + MdePkg/MdePkg.dec > + > +[LibraryClasses] > + DebugLib > diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTabl= ePointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServic= esTablePointerLibKs0.uni > new file mode 100644 > index 0000000000..2539448ce5 > --- /dev/null > +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointe= rLibKs0.uni > @@ -0,0 +1,20 @@ > +// /** @file > +// Instance of PEI Services Table Pointer Library using register CSR KS0= for the table pointer. > +// > +// PEI Services Table Pointer Library implementation that retrieves a po= inter to the > +// PEI Services Table from a CPU register. Applies to modules that execu= te from > +// read-only memory. > +// > +// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. > +// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<= BR> > +// Copyright (c) 2023 Loongson Technology Corporation Limited. All right= s reserved.
> +// > +// SPDX-License-Identifier: BSD-2-Clause-Patent > +// > +// **/ > + > + > +#string STR_MODULE_ABSTRACT #language en-US "Instance of PEI= Services Table Pointer Library using CPU register for the table pointer" > + > +#string STR_MODULE_DESCRIPTION #language en-US "The PEI Service= s Table Pointer Library implementation that retrieves a pointer to the PEI = Services Table from a CPU register. Applies to modules that execute from re= ad-only memory." > + > diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc > index 3abd1a1e23..109224c527 100644 > --- a/MdePkg/MdePkg.dsc > +++ b/MdePkg/MdePkg.dsc > @@ -200,4 +200,7 @@ > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbi= Lib.inf > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbi= LibRam.inf > =20 > +[Components.LOONGARCH64] > + MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLi= bKs0.inf > + > [BuildOptions] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112723): https://edk2.groups.io/g/devel/message/112723 Mute This Topic: https://groups.io/mt/103261665/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --------------uKAc2BrIMXqHlicql1bprEnR Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Hi Mike and Liming,

Can you please review this patch? Thank you!


=
Thanks,
Chao
On 2023/12/12 21:11, Chao Li wrote:
Adding PeiServicesTablePointer=
LibKs0 for LoongArch64, which provides
setting and getting the PEI service table pointer through the CSR KS0
register.

The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=
=3D4584

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
 .../Library/PeiServicesTablePointerLib.h      |  9 +-
 .../PeiServicesTablePointer.c                 | 87 +++++++++++++++++++
 .../PeiServicesTablePointerLibKs0.inf         | 37 ++++++++
 .../PeiServicesTablePointerLibKs0.uni         | 20 +++++
 MdePkg/MdePkg.dsc                             |  3 +
 5 files changed, 152 insertions(+), 4 deletions(-)
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService=
sTablePointer.c
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService=
sTablePointerLibKs0.inf
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService=
sTablePointerLibKs0.uni

diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/I=
nclude/Library/PeiServicesTablePointerLib.h
index 61635eff00..f85c38363c 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
   For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
-  a dedicated CPU register.  This means that there is no memory storage
-  associated with storing the PEI Services Table pointer, so no additional
-  migration actions are required for Itanium or ARM CPUs.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
=20
 **/
 VOID
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP=
ointer.c b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePoi=
nter.c
new file mode 100644
index 0000000000..2560b232f9
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.=
c
@@ -0,0 +1,87 @@
+/** @file
+  PEI Services Table Pointer Library For Reigseter Mechanism.
+
+  This library is used for PEIM which does executed from flash device dire=
ctly but
+  executed in memory.
+
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR=
>
+  Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<=
BR>
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r=
eserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Register/LoongArch64/Csr.h>
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by PeiServicesTab=
lePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT().
+
+  @param    PeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES  **PeiServicesTablePointer
+  )
+{
+  ASSERT (PeiServicesTablePointer !=3D NULL);
+  CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU spec=
ific manner
+  as specified in the CPU binding section of the Platform Initialization P=
re-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, then ASSERT().
+
+  @return  The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+  VOID
+  )
+{
+  CONST EFI_PEI_SERVICES  **PeiServices;
+
+  PeiServices =3D (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0))=
;
+  ASSERT (PeiServices !=3D NULL);
+  return PeiServices;
+}
+
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  return;
+}
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP=
ointerLibKs0.inf b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServices=
TablePointerLibKs0.inf
new file mode 100644
index 0000000000..e8ecd4616d
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL=
ibKs0.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PEI Services Table Pointer Library using register CSR KS0 fo=
r the table pointer.
+#
+# PEI Services Table Pointer Library implementation that retrieves a point=
er to the
+# PEI Services Table from a CPU register. Applies to modules that execute =
from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR=
>
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<=
BR>
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r=
eserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    =3D 1.29
+  BASE_NAME                      =3D PeiServicesTablePointerLib
+  MODULE_UNI_FILE                =3D PeiServicesTablePointerLibKs0.uni
+  FILE_GUID                      =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+  MODULE_TYPE                    =3D PEIM
+  VERSION_STRING                 =3D 1.0
+  LIBRARY_CLASS                  =3D PeiServicesTablePointerLib|PEIM PEI_C=
ORE SEC
+
+#
+#  VALID_ARCHITECTURES           =3D LOONGARCH64
+#
+
+[Sources]
+  PeiServicesTablePointer.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP=
ointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServices=
TablePointerLibKs0.uni
new file mode 100644
index 0000000000..2539448ce5
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL=
ibKs0.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Instance of PEI Services Table Pointer Library using register CSR KS0 f=
or the table pointer.
+//
+// PEI Services Table Pointer Library implementation that retrieves a poin=
ter to the
+// PEI Services Table from a CPU register. Applies to modules that execute=
 from
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<B=
R>
+// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<=
;BR>
+// Copyright (c) 2023 Loongson Technology Corporation Limited. All rights =
reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT             #language en-US "Instance of PEI S=
ervices Table Pointer Library using CPU register for the table pointer"
+
+#string STR_MODULE_DESCRIPTION          #language en-US "The PEI Services =
Table Pointer Library implementation that retrieves a pointer to the PEI Se=
rvices Table from a CPU register. Applies to modules that execute from read=
-only memory."
+
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 3abd1a1e23..109224c527 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -200,4 +200,7 @@
   MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib=
.inf
   MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib=
Ram.inf
=20
+[Components.LOONGARCH64]
+  MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibK=
s0.inf
+
 [BuildOptions]
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