From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=66.187.233.73; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C816A21125009 for ; Fri, 7 Sep 2018 03:31:49 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 04E7968801; Fri, 7 Sep 2018 10:31:49 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-152.rdu2.redhat.com [10.10.120.152]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6A581637B5; Fri, 7 Sep 2018 10:31:48 +0000 (UTC) To: Ruiyu Ni , edk2-devel@lists.01.org Cc: Dandan Bi References: <20180907101323.50584-1-ruiyu.ni@intel.com> From: Laszlo Ersek Message-ID: Date: Fri, 7 Sep 2018 12:31:47 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180907101323.50584-1-ruiyu.ni@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Fri, 07 Sep 2018 10:31:49 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Fri, 07 Sep 2018 10:31:49 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'lersek@redhat.com' RCPT:'' Subject: Re: [PATCH] UefiCpuPkg/PeiCpuException: Fix coding style issue X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Sep 2018 10:31:51 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 09/07/18 12:13, Ruiyu Ni wrote: > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Dandan Bi > --- > UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c > index 5dd8423d2f..8f4d5b5e0a 100644 > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c > @@ -45,7 +45,7 @@ GetExceptionHandlerData ( > > AsmReadIdtr (&IdtDescriptor); > IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base; > - > + > Exception0StubHeader = (EXCEPTION0_STUB_HEADER *)ArchGetIdtHandler (&IdtTable[0]); > return Exception0StubHeader->ExceptionHandlerData; > } > @@ -57,7 +57,7 @@ GetExceptionHandlerData ( > exception handler data. The new allocated memory layout follows structure EXCEPTION0_STUB_HEADER. > The code assumes that all processors uses the same exception handler for #0 exception. > > - @param pointer to exception handler data. > + @param ExceptionHandlerData pointer to exception handler data. > **/ > VOID > SetExceptionHandlerData ( > @@ -73,7 +73,7 @@ SetExceptionHandlerData ( > // > AsmReadIdtr (&IdtDescriptor); > IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base; > - > + > Exception0StubHeader = AllocatePool (sizeof (*Exception0StubHeader)); > ASSERT (Exception0StubHeader != NULL); > CopyMem ( > Reviewed-by: Laszlo Ersek