From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DCBE721CEB0F5 for ; Mon, 11 Sep 2017 19:51:11 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Sep 2017 19:54:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,381,1500966000"; d="scan'208";a="310575973" Received: from shwdeopenpsi011.ccr.corp.intel.com (HELO SHWDEOPENPSI011.local) ([10.239.9.21]) by fmsmga004.fm.intel.com with SMTP; 11 Sep 2017 19:54:06 -0700 Date: Tue, 12 Sep 2017 10:54:07 +0800 From: lushifex CC: david.wei@intel.com; Sender: lushifex To: edk2-devel@lists.01.org Message-ID: X-Mailer: TortoiseGit MIME-Version: 1.0 Subject: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] Change Reset Type X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Sep 2017 02:51:12 -0000 Content-Type: text/plain; Change Reset Type according to different Board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex --- .../Board/BensonGlacier/BoardInitPostMem/BoardInit.c | 7 +++++++ .../Board/BensonGlacier/BoardInitPostMem/BoardInit.h | 1 + .../Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf | 1 + .../BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c | 7 +++++++ .../BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.h | 1 + .../Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf | 3 ++- .../Board/MinnowBoard3/BoardInitPostMem/BoardInit.c | 7 +++++++ .../Board/MinnowBoard3/BoardInitPostMem/BoardInit.h | 1 + .../Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf | 3 ++- .../BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c | 2 +- .../Common/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf | 2 ++ .../Common/PlatformSettings/PlatformSetupDxe/SystemComponent.vfi | 2 ++ Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec | 1 + .../BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c | 6 +++--- .../BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.h | 3 ++- .../BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.inf | 3 ++- 16 files changed, 42 insertions(+), 8 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c index 729a158..a4f3414 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c @@ -48,6 +48,7 @@ BensonGlacierPostMemInitCallback ( VOID *Instance; UINT8 BoardId; UINT8 FabId; + UINT8 ResetType; Status = PeiServicesLocatePpi ( &gBoardPostMemInitDoneGuid, @@ -76,6 +77,12 @@ BensonGlacierPostMemInitCallback ( PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) BensonMultiPlatformInfoInit); // + // Set Reset Type according to different Board + // + ResetType = V_RST_CNT_HARDRESET; + PcdSet8 (PcdResetType, (UINT8) ResetType); + + // // Add init steps here // // diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.h index 870f9c3..c065ed2 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.h @@ -33,6 +33,7 @@ #include #include "BoardInitMiscs.h" +#include VOID BensonGpioTest (VOID); diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf index def40bf..32849c0 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf @@ -61,6 +61,7 @@ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc gPlatformModuleTokenSpaceGuid.PcdBoardId gPlatformModuleTokenSpaceGuid.PcdFabId + gSiPkgTokenSpaceGuid.PcdResetType [Guids] gEfiPlatformInfoGuid diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c index 501e810..e591b1d 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c @@ -56,6 +56,7 @@ LeafHillPostMemInitCallback ( VOID *Instance; UINT8 BoardId; UINT8 FabId; + UINT8 ResetType; Status = PeiServicesLocatePpi ( &gBoardPostMemInitDoneGuid, @@ -82,6 +83,12 @@ LeafHillPostMemInitCallback ( // Set init function PCD // PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) LeafHillMultiPlatformInfoInit); + + // + // Set Reset Type according to different Board + // + ResetType = V_RST_CNT_FULLRESET; + PcdSet8 (PcdResetType, (UINT8) ResetType); // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.h index 298613a..5b92f75 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.h @@ -22,6 +22,7 @@ #include #include #include +#include VOID LeafHillGpioTest (VOID); diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf index a613fda..3578d4b 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf @@ -3,7 +3,7 @@ # # It will detect the board ID. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -59,6 +59,7 @@ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc gPlatformModuleTokenSpaceGuid.PcdBoardId gPlatformModuleTokenSpaceGuid.PcdFabId + gSiPkgTokenSpaceGuid.PcdResetType [Guids] gEfiPlatformInfoGuid diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c index ac6bf58..ef14216 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c @@ -56,6 +56,7 @@ MinnowBoard3PostMemInitCallback ( VOID *Instance; UINT8 BoardId; UINT8 FabId; + UINT8 ResetType; Status = PeiServicesLocatePpi ( &gBoardPostMemInitDoneGuid, @@ -82,6 +83,12 @@ MinnowBoard3PostMemInitCallback ( // Set init function PCD // PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) Minnow3MultiPlatformInfoInit); + + // + // Set Reset Type according to different Board + // + ResetType = V_RST_CNT_FULLRESET; + PcdSet8 (PcdResetType, (UINT8) ResetType); // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.h index b00f53e..196d140 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.h @@ -22,6 +22,7 @@ #include #include #include +#include VOID Minnow3GpioTest (VOID); diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf index d7ba739..f9dc676 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf @@ -2,7 +2,7 @@ # Board detected module for Intel(R) Atom(TM) x5 Processor Series. # It will detect the board ID. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -57,6 +57,7 @@ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc gPlatformModuleTokenSpaceGuid.PcdBoardId gPlatformModuleTokenSpaceGuid.PcdFabId + gSiPkgTokenSpaceGuid.PcdResetType [Guids] gEfiPlatformInfoGuid diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c index 3007132..d3c10b1 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c @@ -656,7 +656,7 @@ PlatformUpdateTables ( case EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: pFACP = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *) Table; - pFACP->ResetValue = mSystemConfiguration.ResetSelect; + pFACP->ResetValue = (UINT8) PcdGet8 (PcdResetType); pFACP->Flags |= BIT10; DEBUG ((DEBUG_INFO, "FACP ResetValue = %x\n", pFACP->ResetValue)); diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf index 31c2a77..e70b843 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf @@ -45,6 +45,7 @@ DxeVtdLib SteppingLib SeCLib + PcdLib [Guids] gACPIOSFRMfgStringVariableGuid @@ -84,6 +85,7 @@ gEfiBxtTokenSpaceGuid.PcdScAcpiIoPortBaseAddress gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress + gSiPkgTokenSpaceGuid.PcdResetType [Depex] gEfiAcpiSupportProtocolGuid AND diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SystemComponent.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SystemComponent.vfi index 16822f6..9bd93d3 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SystemComponent.vfi +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/SystemComponent.vfi @@ -45,12 +45,14 @@ form formid = SYSTEM_COMPONENT_FORM_ID, option text = STRING_TOKEN(STR_PNP_POWER_PERFORMANCE_STRING), value = 3, flags = MANUFACTURING | DEFAULT | RESET_REQUIRED; endoneof; +suppressif TRUE; oneof varid = Setup.ResetSelect, prompt = STRING_TOKEN(STR_RESET_SELECT), help = STRING_TOKEN(STR_RESET_SELECT_HELP), option text = STRING_TOKEN(STR_WARM_RESET), value = 0x6, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; option text = STRING_TOKEN(STR_COLD_RESET), value = 0xE, flags = RESET_REQUIRED; endoneof; +endif; // Embedded Power Instrumentation oneof varid = Setup.EPIEnable, diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec index f17a3e0..69036e7 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec @@ -332,6 +332,7 @@ gEfiBxtTokenSpaceGuid.PcdSetCoreCount|0|UINT32|0x10000223 gEfiBxtTokenSpaceGuid.PcdVtdGfxBaseAddress|0xFED64000|UINT32|0x10000224 gSiPkgTokenSpaceGuid.PcdForceVolatileVariable|FALSE|BOOLEAN|0x30000012 + gSiPkgTokenSpaceGuid.PcdResetType|0x0E|UINT8|0x30000013 [PcdsFeatureFlag] gBxtRefCodePkgTokenSpaceGuid.PcdCeAtaSupport|FALSE|BOOLEAN|0x12 diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c index 2bac0a5..64598b8 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c @@ -1,7 +1,7 @@ /** @file Reset Architectural Protocol implementation. - Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -114,7 +114,7 @@ InitializeScReset ( mResetInstance->AcpiBar = (UINT16) PcdGet16 (PcdScAcpiIoPortBaseAddress); - mResetInstance->ResetSelect = (UINT8) GeneralConfig->ResetSelect; + mResetInstance->ResetSelect = (UINT8) PcdGet8 (PcdResetType); // // Make sure the Reset Architectural Protocol is not already installed in the system @@ -296,7 +296,7 @@ IntelScResetSystem ( case EfiResetCold: InitialData = V_RST_CNT_HARDSTARTSTATE; - OutputData = V_RST_CNT_HARDRESET; + OutputData = PcdGet8 (PcdResetType); break; case EfiResetShutdown: diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.h index 0c90d11..dd27e6d 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.h +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.h @@ -1,7 +1,7 @@ /** @file Header file definitions for SC reset. - Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -30,6 +30,7 @@ #include #include "ScAccess.h" #include +#include // // Driver private data diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.inf index 9e4a4df..51b973e 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.inf +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.inf @@ -1,7 +1,7 @@ ## @file # Sc Reset driver. # -# Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -52,6 +52,7 @@ [Pcd] gEfiBxtTokenSpaceGuid.PcdScAcpiIoPortBaseAddress ## SOMETIMES_CONSUMES gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress ## SOMETIMES_CONSUMES + gSiPkgTokenSpaceGuid.PcdResetType [Depex] TRUE -- 2.7.0.windows.1