From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web10.11870.1671194824336805327 for ; Fri, 16 Dec 2022 04:47:05 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=QaZfoKhg; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: ted.kuo@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671194825; x=1702730825; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6URkwMtQUYoZyfsI+pCDqFKEss++fmKrXC8e3o1TJgc=; b=QaZfoKhgUguPDlMI92D3FSJsL2byjCcYoymvwNcOklhHBoa/oPlfFMEP aSjyh82pzINTXUfWVHfq1FvT0uC+pwuI9NAvs2Yx+KNgDP03PDAMgQwAh vStXi6za13g8mz6tmxMAwCDes8O1ZowOWrQ1ddSyHJnysIH4G3p++j1fu Zz23zbSe9q1VCCu/l7b1iBVS+hnKAIEeRJKnwChAaAxyYU6SCFtoSsNk4 hDdhrOyNyUz5/8V6hdkor48FgfcB4j2FAE2L1sKJa7ip94loyFe9bcU7t NaSrxzYNu2yPDBJZIDXWj1BeHAL9gezO8nSuoIiXSQvUJ34A/1gZjQkIY w==; X-IronPort-AV: E=McAfee;i="6500,9779,10562"; a="346041875" X-IronPort-AV: E=Sophos;i="5.96,249,1665471600"; d="scan'208";a="346041875" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2022 04:47:05 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10562"; a="738526315" X-IronPort-AV: E=Sophos;i="5.96,249,1665471600"; d="scan'208";a="738526315" Received: from tedkuo1-win10.gar.corp.intel.com ([10.5.215.0]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2022 04:47:03 -0800 From: "Kuo, Ted" To: devel@edk2.groups.io Cc: Ray Ni , Zhiguang Liu , Chasel Chiu , Nate DeSimone , Star Zeng , Ashraf Ali S , Chinni B Duggapu Subject: [edk2-devel][PATCH v2 1/2] UefiCpuPkg: Supporting S3 in 64bit PEI Date: Fri, 16 Dec 2022 20:46:26 +0800 Message-Id: X-Mailer: git-send-email 2.35.3.windows.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable https://bugzilla.tianocore.org/show_bug.cgi?id=3D4195 1.Updated the GDT table in VTF0 to align with the one in S3Resume2Pei. By doing so can simplify the changes to enable S3 in 64bit PEI. 2.Use SwitchStack() between PEI and SMM in S3 resume path when both are in the same execution mode. 3.Transfer from PEI to OS waking vector by calling SwitchStack() when both are in the same execution mode. 4.Removed the debug assertion in S3Resume.c to support 64bit PEI. Cc: Ray Ni Cc: Zhiguang Liu Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ashraf Ali S Cc: Chinni B Duggapu Signed-off-by: Ted Kuo --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 13 ++- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 + .../ResetVector/Vtf0/Ia16/Real16ToFlat32.asm | 63 ++++++++---- .../Universal/Acpi/S3Resume2Pei/S3Resume.c | 97 ++++++++++++------- 4 files changed, 117 insertions(+), 57 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/= CpuS3.c index 9b45c442c9..fb4a44eab6 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -1,7 +1,7 @@ /** @file=0D Code for Processor S3 restoration=0D =0D -Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
=0D +Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -783,7 +783,11 @@ SmmRestoreCpu ( SmmS3ResumeState =3D mSmmS3ResumeState;=0D ASSERT (SmmS3ResumeState !=3D NULL);=0D =0D - if (SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_64) {=0D + //=0D + // Setup 64bit IDT in 64bit SMM env when called from 32bit PEI.=0D + // Note: 64bit PEI and 32bit DXE is not a supported combination.=0D + //=0D + if ((SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_64) && (Featur= ePcdGet (PcdDxeIplSwitchToLongMode) =3D=3D TRUE)) {=0D //=0D // Save the IA32 IDT Descriptor=0D //=0D @@ -846,9 +850,10 @@ SmmRestoreCpu ( DEBUG ((DEBUG_INFO, "SMM S3 Return Stack Pointer =3D %x\n", SmmS3Res= umeState->ReturnStackPointer));=0D =0D //=0D - // If SMM is in 32-bit mode, then use SwitchStack() to resume PEI Phase= =0D + // If SMM is in 32-bit mode or PcdDxeIplSwitchToLongMode is FALSE, then = use SwitchStack() to resume PEI Phase.=0D + // Note: 64bit PEI and 32bit DXE is not a supported combination.=0D //=0D - if (SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_32) {=0D + if ((SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_32) || (Featur= ePcdGet (PcdDxeIplSwitchToLongMode) =3D=3D FALSE)) {=0D DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI = Phase\n"));=0D =0D SwitchStack (=0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf index deef00f9c6..b4b327f60c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -124,6 +124,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable ## CONS= UMES=0D gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer ## CONS= UMES=0D gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock ## CONS= UMES=0D + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONS= UMES=0D =0D [Pcd]=0D gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## SOME= TIMES_CONSUMES=0D diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm b/UefiCpuP= kg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm index 0e79a3984b..f59fc6ead4 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm @@ -2,7 +2,7 @@ ; @file=0D ; Transition from 16 bit real mode into 32 bit flat protected mode=0D ;=0D -; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.
=0D +; Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.
=0D ; SPDX-License-Identifier: BSD-2-Clause-Patent=0D ;=0D ;-------------------------------------------------------------------------= -----=0D @@ -92,7 +92,7 @@ ALIGN 16 =0D GDT_BASE:=0D ; null descriptor=0D -NULL_SEL equ $-GDT_BASE=0D +NULL_SEL equ $-GDT_BASE ; Selector [0x0]=0D DW 0 ; limit 15:0=0D DW 0 ; base 15:0=0D DB 0 ; base 23:16=0D @@ -100,42 +100,67 @@ NULL_SEL equ $-GDT_BASE DB 0 ; limit 19:16, flags=0D DB 0 ; base 31:24=0D =0D +; Spare segment descriptor=0D +SPARE1_SEL equ $-GDT_BASE ; Selector [0x8]=0D + DW 0 ; limit 15:0=0D + DW 0 ; base 15:0=0D + DB 0 ; base 23:16=0D + DB 0 ; sys flag, dpl, type=0D + DB 0 ; limit 19:16, flags=0D + DB 0 ; base 31:24=0D +=0D +; linear code segment descriptor=0D +LINEAR_CODE_SEL equ $-GDT_BASE ; Selector [0x10]=0D + DW 0xffff ; limit 15:0=0D + DW 0 ; base 15:0=0D + DB 0 ; base 23:16=0D + DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE) = ; 09Bh=0D + DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIM= IT(0xf) ; 0CFh=0D + DB 0 ; base 31:24=0D +=0D ; linear data segment descriptor=0D -LINEAR_SEL equ $-GDT_BASE=0D +LINEAR_SEL equ $-GDT_BASE ; Selector [0x18]=0D DW 0xffff ; limit 15:0=0D DW 0 ; base 15:0=0D DB 0 ; base 23:16=0D - DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)=0D - DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIM= IT(0xf)=0D + DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE) = ; 093h=0D + DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIM= IT(0xf) ; 0CFh=0D DB 0 ; base 31:24=0D =0D -; linear code segment descriptor=0D -LINEAR_CODE_SEL equ $-GDT_BASE=0D +; Spare segment descriptor=0D +SPARE2_SEL equ $-GDT_BASE ; Selector [0x20]=0D + DW 0 ; limit 15:0=0D + DW 0 ; base 15:0=0D + DB 0 ; base 23:16=0D + DB 0 ; sys flag, dpl, type=0D + DB 0 ; limit 19:16, flags=0D + DB 0 ; base 31:24=0D +=0D +; linear code (16-bit) segment descriptor=0D +LINEAR_CODE16_SEL equ $-GDT_BASE ; Selector [0x28]=0D DW 0xffff ; limit 15:0=0D DW 0 ; base 15:0=0D DB 0 ; base 23:16=0D - DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)=0D - DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIM= IT(0xf)=0D + DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE) = ; 09Bh=0D + DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(0)|UPPER_LIM= IT(0xf) ; 08Fh=0D DB 0 ; base 31:24=0D =0D -%ifdef ARCH_X64=0D -; linear code (64-bit) segment descriptor=0D -LINEAR_CODE64_SEL equ $-GDT_BASE=0D +; linear data (16-bit) segment descriptor=0D +LINEAR_DATA16_SEL equ $-GDT_BASE ; Selector [0x30]=0D DW 0xffff ; limit 15:0=0D DW 0 ; base 15:0=0D DB 0 ; base 23:16=0D - DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)=0D - DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIM= IT(0xf)=0D + DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE) = ; 093h=0D + DB 0=0D DB 0 ; base 31:24=0D -%endif=0D =0D -; linear code segment descriptor=0D -LINEAR_CODE16_SEL equ $-GDT_BASE=0D +; linear code (64-bit) segment descriptor=0D +LINEAR_CODE64_SEL equ $-GDT_BASE ; Selector [0x38]=0D DW 0xffff ; limit 15:0=0D DW 0 ; base 15:0=0D DB 0 ; base 23:16=0D - DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)=0D - DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(0)|UPPER_LIM= IT(0xf)=0D + DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE) = ; 09Bh=0D + DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIM= IT(0xf) ; 0AFh=0D DB 0 ; base 31:24=0D =0D GDT_END:=0D diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg= /Universal/Acpi/S3Resume2Pei/S3Resume.c index 8419a4e32a..ec6fdc2d4c 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c @@ -4,7 +4,7 @@ This module will execute the boot script saved during last boot and afte= r that,=0D control is passed to OS waking up handler.=0D =0D - Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
=0D + Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
=0D Copyright (c) 2017, AMD Incorporated. All rights reserved.
=0D =0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D @@ -332,9 +332,8 @@ IsLongModeWakingVector ( ((Facs->OspmFlags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) !=3D 0))=0D {=0D // Both BIOS and OS wants 64bit vector=0D - if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {=0D - return TRUE;=0D - }=0D + ASSERT ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINT= N) =3D=3D sizeof (UINT64)));=0D + return TRUE;=0D }=0D }=0D =0D @@ -521,8 +520,11 @@ S3ResumeBootOs ( //=0D // X64 long mode waking vector=0D //=0D - DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (= UINTN)Facs->XFirmwareWakingVector));=0D + DEBUG ((DEBUG_INFO, "Transfer from PEI to 64bit OS waking vector - %= x\r\n", (UINTN)Facs->XFirmwareWakingVector));=0D if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {=0D + //=0D + // 32bit PEI calls to 64bit OS S3 waking vector=0D + //=0D AsmEnablePaging64 (=0D 0x38,=0D Facs->XFirmwareWakingVector,=0D @@ -531,29 +533,58 @@ S3ResumeBootOs ( (UINT64)(UINTN)TempStackTop=0D );=0D } else {=0D - //=0D - // Report Status code that no valid waking vector is found=0D - //=0D - REPORT_STATUS_CODE (=0D - EFI_ERROR_CODE | EFI_ERROR_MAJOR,=0D - (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)=0D - );=0D - DEBUG ((DEBUG_ERROR, "Unsupported for 32bit DXE transfer to 64bit = OS waking vector!\r\n"));=0D - ASSERT (FALSE);=0D - CpuDeadLoop ();=0D - return;=0D + if (sizeof (UINTN) =3D=3D sizeof (UINT64)) {=0D + //=0D + // 64bit PEI calls to 64bit OS S3 waking vector=0D + //=0D + SwitchStack (=0D + (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,= =0D + NULL,=0D + NULL,=0D + (VOID *)(UINTN)TempStackTop=0D + );=0D + } else {=0D + //=0D + // Report Status code that no valid waking vector is found.=0D + // Note: 32bit PEI + 32bit DXE firmware calling to 64bit OS S3 w= aking vector is an invalid configuration.=0D + //=0D + REPORT_STATUS_CODE (=0D + EFI_ERROR_CODE | EFI_ERROR_MAJOR,=0D + (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)=0D + );=0D + DEBUG ((DEBUG_ERROR, "Unsupported for 32bit DXE transfer to 64bi= t OS waking vector!\r\n"));=0D + ASSERT (FALSE);=0D + CpuDeadLoop ();=0D + return;=0D + }=0D }=0D } else {=0D //=0D // IA32 protected mode waking vector (Page disabled)=0D //=0D DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (= UINTN)Facs->XFirmwareWakingVector));=0D - SwitchStack (=0D - (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,=0D - NULL,=0D - NULL,=0D - (VOID *)(UINTN)TempStackTop=0D - );=0D + if (sizeof (UINTN) =3D=3D sizeof (UINT64)) {=0D + //=0D + // 64bit PEI calls to 32bit OS S3 waking vector=0D + //=0D + AsmDisablePaging64 (=0D + 0x10,=0D + (UINT32)Facs->XFirmwareWakingVector,=0D + 0,=0D + 0,=0D + (UINT32)TempStackTop=0D + );=0D + } else {=0D + //=0D + // 32bit PEI calls to 32bit OS S3 waking vector=0D + //=0D + SwitchStack (=0D + (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,=0D + NULL,=0D + NULL,=0D + (VOID *)(UINTN)TempStackTop=0D + );=0D + }=0D }=0D } else {=0D //=0D @@ -579,7 +610,7 @@ S3ResumeBootOs ( =0D /**=0D Restore S3 page table because we do not trust ACPINvs content.=0D - If BootScriptExector driver will not run in 64-bit mode, this function w= ill do nothing.=0D + If BootScriptExecutor driver will not run in 64-bit mode, this function = will do nothing.=0D =0D @param S3NvsPageTableAddress PageTableAddress in ACPINvs=0D @param Build4GPageTableOnly If BIOS just build 4G page table only=0D @@ -590,7 +621,7 @@ RestoreS3PageTables ( IN BOOLEAN Build4GPageTableOnly=0D )=0D {=0D - if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {=0D + if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) =3D= =3D sizeof (UINT64))) {=0D UINT32 RegEax;=0D UINT32 RegEdx;=0D UINT8 PhysicalAddressBits;=0D @@ -825,7 +856,7 @@ S3ResumeExecuteBootScript ( SignalToSmmByCommunication (&gEdkiiS3SmmInitDoneGuid);=0D }=0D =0D - if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {=0D + if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) =3D= =3D sizeof (UINT64))) {=0D AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);=0D }=0D =0D @@ -1021,7 +1052,7 @@ S3RestoreConfig2 ( CpuDeadLoop ();=0D }=0D =0D - if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {=0D + if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) =3D= =3D sizeof (UINT64))) {=0D //=0D // Need reconstruct page table here, since we do not trust ACPINvs.=0D //=0D @@ -1039,13 +1070,6 @@ S3RestoreConfig2 ( //=0D GuidHob =3D GetFirstGuidHob (&gEfiAcpiVariableGuid);=0D if (GuidHob !=3D NULL) {=0D - //=0D - // Below SwitchStack/AsmEnablePaging64 function has=0D - // assumption that it's in 32 bits mode now.=0D - // Add ASSERT code to indicate this assumption.=0D - //=0D - ASSERT (sizeof (UINTN) =3D=3D sizeof (UINT32));=0D -=0D Status =3D PeiServicesLocatePpi (=0D &gPeiSmmAccessPpiGuid,=0D 0,=0D @@ -1079,7 +1103,12 @@ S3RestoreConfig2 ( DEBUG ((DEBUG_INFO, "SMM S3 Return Stack Pointer =3D %x\n", SmmS3R= esumeState->ReturnStackPointer));=0D DEBUG ((DEBUG_INFO, "SMM S3 Smst =3D %x\n", SmmS3R= esumeState->Smst));=0D =0D - if (SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_32) {=0D + //=0D + // Directly do the switch stack when PEI and SMM env run in the same e= xecution mode.=0D + //=0D + if (((SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_32) && (siz= eof (UINTN) =3D=3D sizeof (UINT32))) ||=0D + ((SmmS3ResumeState->Signature =3D=3D SMM_S3_RESUME_SMM_64) && (siz= eof (UINTN) =3D=3D sizeof (UINT64))))=0D + {=0D SwitchStack (=0D (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntr= yPoint,=0D (VOID *)AcpiS3Context,=0D --=20 2.35.3.windows.1