From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BC1CD2097DD18 for ; Tue, 17 Jul 2018 03:02:11 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jul 2018 03:02:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,365,1526367600"; d="scan'208";a="72033911" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.4]) ([10.239.9.4]) by fmsmga004.fm.intel.com with ESMTP; 17 Jul 2018 03:02:09 -0700 To: Eric Dong , edk2-devel@lists.01.org Cc: Laszlo Ersek References: <20180716030851.13752-1-eric.dong@intel.com> <20180716030851.13752-2-eric.dong@intel.com> From: "Ni, Ruiyu" Message-ID: Date: Tue, 17 Jul 2018 18:02:41 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.0 MIME-Version: 1.0 In-Reply-To: <20180716030851.13752-2-eric.dong@intel.com> Subject: Re: [Patch v3 1/3] UefiCpuPkg/MpInitLib: Relocate uCode to memory to save time. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Jul 2018 10:02:11 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 7/16/2018 11:08 AM, Eric Dong wrote: > Read uCode from memory has better performance than from flash. > But it needs extra effort to let BSP copy uCode from flash to > memory. Also BSP already enable cache in SEC phase, so it use > less time to relocate uCode from flash to memory. After > verification, if system has more than one processor, it will > reduce some time if load uCode from memory. > > This change enable this optimization. > > V3 changes: > Remove the ASSERT which is not correct. > > Cc: Laszlo Ersek > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Eric Dong > --- > UefiCpuPkg/Library/MpInitLib/MpLib.c | 33 ++++++++++++++++++++++++++++++++- > 1 file changed, 32 insertions(+), 1 deletion(-) > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c > index 108eea0a6f..d8b56f149f 100644 > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c > @@ -1520,6 +1520,7 @@ MpInitLibInitialize ( > UINTN ApResetVectorSize; > UINTN BackupBufferAddr; > UINTN ApIdtBase; > + VOID *MicrocodePatchInRam; > > OldCpuMpData = GetCpuMpDataFromGuidedHob (); > if (OldCpuMpData == NULL) { > @@ -1587,8 +1588,38 @@ MpInitLibInitialize ( > CpuMpData->SwitchBspFlag = FALSE; > CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1); > CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber); > - CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress); > CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize); > + // > + // If platform has more than one CPU, relocate microcode to memory to reduce > + // loading microcode time. > + // > + MicrocodePatchInRam = NULL; > + if (MaxLogicalProcessorNumber > 1) { > + MicrocodePatchInRam = AllocatePages ( > + EFI_SIZE_TO_PAGES ( > + (UINTN)CpuMpData->MicrocodePatchRegionSize > + ) > + ); > + } > + if (MicrocodePatchInRam == NULL) { > + // > + // there is only one processor, or no microcode patch is available, or > + // memory allocation failed > + // > + CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress); > + } else { > + // > + // there are multiple processors, and a microcode patch is available, and > + // memory allocation succeeded > + // > + CopyMem ( > + MicrocodePatchInRam, > + (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress), > + (UINTN)CpuMpData->MicrocodePatchRegionSize > + ); > + CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam; > + } > + > InitializeSpinLock(&CpuMpData->MpLock); > > // > Reviewed-by: Ruiyu Ni -- Thanks, Ray