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Subject: Re: [PATCH 1/1] UefiCpuPkg/PiSmmCpuDxeSmm: Add check for pointer Pml5Entry
To: Shenglei Zhang <shenglei.zhang@intel.com>, devel@edk2.groups.io,
 edk2-devel@lists.01.org
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>
References: <20190731055630.14956-1-shenglei.zhang@intel.com>
From: "Laszlo Ersek" <lersek@redhat.com>
Message-ID: <cd562b09-1787-78bf-17ce-095d0a733bb7@redhat.com>
Date: Wed, 31 Jul 2019 13:28:55 +0200
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On 07/31/19 07:56, Shenglei Zhang wrote:
> The pointer Pml5Entry, returned from call to function
> AllocatePageTableMemory, may be null.
> So add check for it.
> 
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> index a3b62f778741..d7af3b6d7941 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> @@ -375,6 +375,7 @@ SmmInitPageTable (
>      // Fill PML5 entry
>      //
>      Pml5Entry = (UINT64*)AllocatePageTableMemory (1);
> +    ASSERT (Pml5Entry != NULL);
>      *Pml5Entry = (UINTN) Pml4Entry | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
>      ZeroMem (Pml5Entry + 1, EFI_PAGE_SIZE - sizeof (*Pml5Entry));
>      //
> 

I'm quite unhappy about this *pattern* in "PageTbl.c", but I must agree
that this patch at least makes the new 5-level paging code consistent
with the pattern.

Laszlo